bcma_write32
bcma_write32(bcm47xx_bus.bcma.bus.drv_mips.core,
bcma_write32(mdev, BCMA_MIPS_MIPS74K_INTMASK(0),
bcma_write32(mdev, BCMA_MIPS_MIPS74K_INTMASK(oldirq), 0);
bcma_write32(mdev, BCMA_MIPS_MIPS74K_INTMASK(0),
bcma_write32(mdev, BCMA_MIPS_MIPS74K_INTMASK(irq),
bcma_write32(core, phy_ctl_addr, tmp);
bcma_write32(bgmac->bcma.core, BGMAC_INT_STATUS, BGMAC_IS_MDIO);
bcma_write32(core, phy_access_addr, tmp);
bcma_write32(core, phy_ctl_addr, tmp);
bcma_write32(core, phy_access_addr, tmp);
bcma_write32(bgmac->bcma.core, offset, value);
bcma_write32(dev->bdev, offset, value);
bcma_write32(cc, CHIPCREGOFFS(gpiopullup), 0);
bcma_write32(cc, CHIPCREGOFFS(gpiopulldown), 0);
bcma_write32(cc, CHIPCREGOFFS(pll_on_delay), pll_on_delay);
bcma_write32(cc, CHIPCREGOFFS(fref_sel_delay), fref_sel_delay);
bcma_write32(di->core, DMA64RXREGOFFS(di, ptr),
bcma_write32(di->core, DMA64TXREGOFFS(di, control), D64_XC_SE);
bcma_write32(di->core, DMA64TXREGOFFS(di, control), 0);
bcma_write32(di->core, DMA64RXREGOFFS(di, control), 0);
bcma_write32(di->core, DMA64TXREGOFFS(di, ptr),
bcma_write32(di->core, DMA64TXREGOFFS(di, ptr),
bcma_write32(di->core, DMA64TXREGOFFS(di, control),
bcma_write32(di->core, DMA64TXREGOFFS(di, control),
bcma_write32(di->core, DMA64TXREGOFFS(di, addrlow), 0xff0);
bcma_write32(di->core, DMA64RXREGOFFS(di, addrlow), 0xff0);
bcma_write32(di->core, DMA64TXREGOFFS(di, addrlow),
bcma_write32(di->core, DMA64TXREGOFFS(di, addrhigh),
bcma_write32(di->core, DMA64RXREGOFFS(di, addrlow),
bcma_write32(di->core, DMA64RXREGOFFS(di, addrhigh),
bcma_write32(di->core, DMA64TXREGOFFS(di, addrlow),
bcma_write32(di->core, DMA64TXREGOFFS(di, addrhigh),
bcma_write32(di->core, DMA64RXREGOFFS(di, addrlow),
bcma_write32(di->core, DMA64RXREGOFFS(di, addrhigh),
bcma_write32(di->core, DMA64RXREGOFFS(di, control),
bcma_write32(wlc_hw->d11core, D11REGOFFS(maccontrol),
bcma_write32(core, D11REGOFFS(tplatewrptr), offset);
bcma_write32(core, D11REGOFFS(tplatewrdata), word);
bcma_write32(wlc_hw->d11core, D11REGOFFS(objaddr),
bcma_write32(wlc_hw->d11core, D11REGOFFS(objdata), newmin);
bcma_write32(wlc_hw->d11core, D11REGOFFS(objaddr),
bcma_write32(wlc_hw->d11core, D11REGOFFS(objdata), newmax);
bcma_write32(core, D11REGOFFS(objaddr),
bcma_write32(core, D11REGOFFS(objdata), le32_to_cpu(ucode[i]));
bcma_write32(core,
bcma_write32(wlc_hw->d11core, D11REGOFFS(macintmask), wlc->macintmask);
bcma_write32(wlc_hw->d11core, D11REGOFFS(macintmask), 0);
bcma_write32(wlc_hw->d11core, D11REGOFFS(macintmask), wlc->macintmask);
bcma_write32(core, D11REGOFFS(macintmask), 0);
bcma_write32(core, D11REGOFFS(macintstatus), macintstatus);
bcma_write32(core, D11REGOFFS(intctrlregs[RX_FIFO].intstatus),
bcma_write32(core, D11REGOFFS(macintstatus), MI_MACSSPNDD);
bcma_write32(core, D11REGOFFS(objaddr), OBJADDR_SHM_SEL | 0);
bcma_write32(core, D11REGOFFS(objaddr), OBJADDR_SHM_SEL | 0);
bcma_write32(core, D11REGOFFS(objdata), (u32) 0xaa5555aa);
bcma_write32(core, D11REGOFFS(objaddr), OBJADDR_SHM_SEL | 0);
bcma_write32(core, D11REGOFFS(objaddr), OBJADDR_SHM_SEL | 0);
bcma_write32(core, D11REGOFFS(objdata), (u32) 0x55aaaa55);
bcma_write32(core, D11REGOFFS(objaddr), OBJADDR_SHM_SEL | 0);
bcma_write32(core, D11REGOFFS(objaddr), OBJADDR_SHM_SEL | 0);
bcma_write32(core, D11REGOFFS(objdata), w);
bcma_write32(core, D11REGOFFS(tsf_cfpstart), 0);
bcma_write32(core, D11REGOFFS(objaddr), sel | (offset >> 2));
bcma_write32(core, D11REGOFFS(objaddr), sel | (offset >> 2));
bcma_write32(wlc_hw->d11core, D11REGOFFS(objaddr),
bcma_write32(wlc_hw->d11core, D11REGOFFS(objdata), wlc_hw->SRL);
bcma_write32(wlc_hw->d11core, D11REGOFFS(objaddr),
bcma_write32(wlc_hw->d11core, D11REGOFFS(objdata), wlc_hw->LRL);
bcma_write32(core, D11REGOFFS(macintstatus), -1);
bcma_write32(core, D11REGOFFS(intrcvlazy[0]), (1 << IRL_FC_SHIFT));
bcma_write32(core, D11REGOFFS(tsf_cfprep),
bcma_write32(core, D11REGOFFS(tsf_cfpstart), bcnint_us);
bcma_write32(core, D11REGOFFS(macintstatus), MI_GP1);
bcma_write32(core, D11REGOFFS(intctrlregs[RX_FIFO].intmask),
bcma_write32(core, D11REGOFFS(objaddr),
bcma_write32(core, D11REGOFFS(objdata), wlc_hw->SRL);
bcma_write32(core, D11REGOFFS(objaddr),
bcma_write32(core, D11REGOFFS(objdata), wlc_hw->LRL);
bcma_write32(wlc->hw->d11core, D11REGOFFS(tsf_cfprep),
bcma_write32(wlc->hw->d11core, D11REGOFFS(tsf_cfpstart), bcnint_us);
bcma_write32(core, offset, value);
bcma_write32(core, D11REGOFFS(macintstatus), MI_BCNTPL);
bcma_write32(wlc->hw->d11core, D11REGOFFS(tsf_timerlow), tsf_l);
bcma_write32(wlc->hw->d11core, D11REGOFFS(tsf_timerhigh), tsf_h);
bcma_write32(core, D11REGOFFS(gptimer), 0);
bcma_write32(core, D11REGOFFS(tsf_cfprep),
bcma_write32(core, D11REGOFFS(rfdisabledly), RFDISABLE_DEFAULT);
bcma_write32(pi->d11core, D11REGOFFS(phyregaddr), addr | (val << 16));
bcma_write32(pi->d11core, D11REGOFFS(tplatewrptr), strptr);
bcma_write32(pi->d11core, D11REGOFFS(clk_ctl_st),
bcma_write32(pi->d11core, D11REGOFFS(maccontrol), mc);
bcma_write32(core, CHIPCREGOFFS(pmu_xtalfreq),
bcma_write32(core, CHIPCREGOFFS(pmu_xtalfreq), 0);
bcma_write32(dev, 0x1e0, tmp);
bcma_write32(dev, 0x200, 0x4ff);
bcma_write32(dev, 0x200, 0x6ff);
bcma_write32(dev, 0x524, 0x6b);
bcma_write32(dev, 0x524, 0xab);
bcma_write32(dev, 0x524, 0x2b);
bcma_write32(dev, 0x524, 0x10ab);
bcma_write32(dev, 0x528, 0x80000000);
bcma_write32(dev, 0x200, 0x7ff);
bcma_write32(dev, 0x510, 0);
bcma_write32(dev, 0x200, 0x7ff);
bcma_write32(core, BCMA_CLKCTLST, BCMA_CLKCTLST_FORCEHT |
bcma_write32(core, 0x510, 0xc7f85000);
bcma_write32(core, 0x510, 0xc7f85003);
bcma_write32(pmu_core, BCMA_CC_PMU_PLLCTL_ADDR, 0x6);
bcma_write32(pmu_core, BCMA_CC_PMU_PLLCTL_DATA, 0x005360c1);
bcma_write32(pmu_core, BCMA_CC_PMU_PLLCTL_ADDR, 0x7);
bcma_write32(pmu_core, BCMA_CC_PMU_PLLCTL_DATA, 0x0);
bcma_write32(core, 0x510, 0x7f8d007);
bcma_write32(core, 0x200, 0x4ff);
bcma_write32(core, 0x200, 0x6ff);
bcma_write32(core, 0x200, 0x7ff);
bcma_write32(dev, 0x94, val);
bcma_write32(dev, 0x9c, val);
bcma_write32(dev, 0x524, 0x1); /* write sel to enable */
bcma_write32(dev, 0x524, tmp);
bcma_write32(dev, 0x524, 0x4ab);
bcma_write32(dev, 0x528, 0x80000000);
bcma_write32(cc, offset, bcma_read32(cc, offset) & mask);
bcma_write32(cc, offset, bcma_read32(cc, offset) | set);
bcma_write32(cc, offset, (bcma_read32(cc, offset) & mask) | set);
bcma_write32((cc)->core, offset, val)
bcma_write32((cc)->pmu.core, offset, val)
#define gmac_cmn_write32(gc, offset, val) bcma_write32((gc)->core, offset, val)
#define pcicore_write32(pc, offset, val) bcma_write32((pc)->core, offset, val)
#define pcie2_write32(pcie2, offset, val) bcma_write32((pcie2)->core, offset, val)