atl2_write_phy_reg
atl2_write_phy_reg(hw, MII_ADVERTISE, hw->mii_autoneg_adv_reg);
atl2_write_phy_reg(hw, MII_BMCR, MII_CR_RESET | MII_CR_AUTO_NEG_EN |
return atl2_write_phy_reg(hw, MII_ADVERTISE, mii_autoneg_adv_reg);
ret_val = atl2_write_phy_reg(hw, MII_BMCR, phy_data);
atl2_write_phy_reg(hw, MII_DBG_ADDR, 0);
atl2_write_phy_reg(hw, MII_DBG_DATA, phy_val);
ret_val = atl2_write_phy_reg(hw, 18, 0xC00);
atl2_write_phy_reg(hw, MII_DBG_ADDR, 0);
atl2_write_phy_reg(hw, MII_DBG_DATA, phy_val | 0x1000);
atl2_write_phy_reg(hw, MII_DBG_ADDR, 2);
atl2_write_phy_reg(hw, MII_DBG_DATA, 0x3000);
atl2_write_phy_reg(hw, MII_DBG_ADDR, 3);
atl2_write_phy_reg(hw, MII_DBG_DATA, 0);
if (atl2_write_phy_reg(&adapter->hw, data->reg_num,
static s32 atl2_write_phy_reg(struct atl2_hw *hw, u32 reg_addr, u16 phy_data);