at91_adc_readl
acr = at91_adc_readl(st, ACR);
val = at91_adc_readl(st, XPOSR);
val = at91_adc_readl(st, YPOSR);
val = at91_adc_readl(st, PRESSR);
u32 status = at91_adc_readl(st, TRGR);
at91_adc_readl(st, LCDR);
at91_adc_readl(st, OVER);
u32 status = at91_adc_readl(st, ISR);
mr = at91_adc_readl(st, MR);
status = at91_adc_readl(st, XPOSR);
status = at91_adc_readl(st, YPOSR);
status = at91_adc_readl(st, PRESSR);
at91_adc_readl(st, LCDR);
tmp = at91_adc_readl(st, ACR);
cur_cor = at91_adc_readl(st, COR);
*status = at91_adc_readl(st, ISR);
*eoc = at91_adc_readl(st, EOC_ISR);
*status = at91_adc_readl(st, IMR);
*eoc = at91_adc_readl(st, EOC_IMR);
emr = at91_adc_readl(st, EMR);
st->buffer[j] = at91_adc_readl(st, AT91_ADC_CHAN(st, chan->channel));
at91_adc_readl(st, AT91_ADC_LCDR);
st->last_value = at91_adc_readl(st, AT91_ADC_CHAN(st, st->chnb));
at91_adc_readl(st, AT91_ADC_LCDR);
reg = at91_adc_readl(st, AT91_ADC_TSXPOSR);
reg = at91_adc_readl(st, AT91_ADC_TSYPOSR);
reg = at91_adc_readl(st, AT91_ADC_TSPRESSR);
u32 status = at91_adc_readl(st, st->registers->status_register);
status &= at91_adc_readl(st, AT91_ADC_IMR);
reg = at91_adc_readl(st, AT91_ADC_MR);
reg = at91_adc_readl(st, AT91_ADC_MR);
st->ts_prev_absx = at91_adc_readl(st, AT91_ADC_CHAN(st, 3))
st->ts_prev_absx /= at91_adc_readl(st, AT91_ADC_CHAN(st, 2));
st->ts_prev_absy = at91_adc_readl(st, AT91_ADC_CHAN(st, 1))
st->ts_prev_absy /= at91_adc_readl(st, AT91_ADC_CHAN(st, 0));
u32 status = at91_adc_readl(st, st->registers->status_register);
at91_adc_readl(st, AT91_ADC_TSXPOSR);
at91_adc_readl(st, AT91_ADC_TSYPOSR);
at91_adc_readl(st, AT91_ADC_TSPRESSR);
u32 status = at91_adc_readl(st, reg->trigger_register);
reg = at91_adc_readl(st, AT91_ADC_MR);