A17
ASPEED_PINCTRL_PIN(A17),
SIG_EXPR_LIST_DECL_SINGLE(A17, SD2DAT1, SD2, SD2_DESC);
ASPEED_SB_PINCONF(PIN_CONFIG_INPUT_DEBOUNCE, B17, A17, SCUA8, 21),
SIG_EXPR_LIST_DECL_DUAL(A17, GPID2OUT, GPID2, GPID);
PIN_DECL_2(A17, GPIOD3, SD2DAT1, GPID2OUT);
FUNC_GROUP_DECL(GPID2, B17, A17);
FUNC_GROUP_DECL(SD2, A18, D16, B17, A17, C16, B16, A16, E15);
FUNC_GROUP_DECL(GPID, A18, D16, B17, A17, C16, B16, A16, E15);
ASPEED_PINCTRL_PIN(A17),
SIG_EXPR_LIST_DECL_SINGLE(A17, DASHA17, DASHA17, COND1, SIG_DESC_SET(SCU94, 7));
SIG_EXPR_LIST_DECL_SINGLE(A17, NDTR6, UART6, COND1, UART6_DESC);
PIN_DECL_2(A17, GPIOH4, DASHA17, NDTR6);
FUNC_GROUP_DECL(UART6, A18, B18, D17, C17, A17, B17, A16, D18);
ASPEED_PINCTRL_PIN(A17),
ASPEED_PULL_DOWN_PINCONF(A17, SCU614, 27),
SIG_EXPR_LIST_DECL_SESG(A17, SGPM1I, SGPM1, SIG_DESC_SET(SCU414, 27));
PIN_DECL_1(A17, GPIOH3, SGPM1I);
FUNC_GROUP_DECL(SGPM1, A18, B18, C18, A17);
PINMUX_IPSR_GPSR(IP6_11_8, A17),
PINMUX_IPSR_GPSR(IP0_28, A17),
PINMUX_SINGLE(A17),
PINMUX_IPSR_GPSR(IP3_22_20, A17),
PINMUX_IPSR_GPSR(IP1_28_26, A17),
PINMUX_SINGLE(A17),
PINMUX_IPSR_GPSR(IP2_23_21, A17),
#define GPSR1_17 F_(A17, IP4_3_0)
#define IP4_3_0 FM(A17) FM(LCDOUT9) F_(0, 0) F_(0, 0) FM(VI4_VSYNC_N) F_(0, 0) FM(DU_DG1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
PINMUX_IPSR_GPSR(IP4_3_0, A17),
#define GPSR1_17 F_(A17, IP4_3_0)
#define IP4_3_0 FM(A17) FM(LCDOUT9) F_(0, 0) F_(0, 0) FM(VI4_VSYNC_N) F_(0, 0) FM(DU_DG1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
PINMUX_IPSR_GPSR(IP4_3_0, A17),
#define GPSR1_17 F_(A17, IP4_3_0)
#define IP4_3_0 FM(A17) FM(LCDOUT9) F_(0, 0) F_(0, 0) FM(VI4_VSYNC_N) F_(0, 0) FM(DU_DG1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
PINMUX_IPSR_GPSR(IP4_3_0, A17),
#define IP2_7_4 FM(DU_DB7) F_(0, 0) F_(0, 0) FM(A17) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
PINMUX_IPSR_GPSR(IP2_7_4, A17),
#define IP2_7_4 FM(DU_DB7) FM(MSIOF3_TXD) F_(0, 0) FM(A17) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
PINMUX_IPSR_GPSR(IP2_7_4, A17),
#define IP5_3_0 FM(A17) FM(MSIOF1_RXD) F_(0, 0) FM(VI4_DATA20) FM(VI5_DATA6_A) FM(DU_DB6) F_(0, 0) F_(0, 0) FM(LCDOUT6) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
PINMUX_IPSR_GPSR(IP5_3_0, A17),
#define GPSR1_17 F_(A17, IP5_3_0)
#define IP2SR1_7_4 FM(MSIOF1_SS2) FM(HTX3) FM(TX3) F_(0, 0) FM(DU_DG7) FM(A17) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
PINMUX_IPSR_GPSR(IP2SR1_7_4, A17),
GPIO_FN(A17),
GPIO_FN(A17),
GPIO_FN(A17), GPIO_FN(ST1_VCO_CLKIN), GPIO_FN(LCD_CL1_A),
PINMUX_IPSR_GPSR(IP1_3_2, A17),
GPIO_FN(A17),