DISP_CC_MDSS_VSYNC_CLK_SRC
#define DISP_CC_MDSS_VSYNC_CLK_SRC 16
#define DISP_CC_MDSS_VSYNC_CLK_SRC 31
#define DISP_CC_MDSS_VSYNC_CLK_SRC 38
#define DISP_CC_MDSS_VSYNC_CLK_SRC 76
#define DISP_CC_MDSS_VSYNC_CLK_SRC 24
#define DISP_CC_MDSS_VSYNC_CLK_SRC 26
#define DISP_CC_MDSS_VSYNC_CLK_SRC 30
#define DISP_CC_MDSS_VSYNC_CLK_SRC 45
#define DISP_CC_MDSS_VSYNC_CLK_SRC 45
#define DISP_CC_MDSS_VSYNC_CLK_SRC 45
#define DISP_CC_MDSS_VSYNC_CLK_SRC 85
#define DISP_CC_MDSS_VSYNC_CLK_SRC 81
#define DISP_CC_MDSS_VSYNC_CLK_SRC 35
#define DISP_CC_MDSS_VSYNC_CLK_SRC 31
#define DISP_CC_MDSS_VSYNC_CLK_SRC 24
#define DISP_CC_MDSS_VSYNC_CLK_SRC 19
#define DISP_CC_MDSS_VSYNC_CLK_SRC 20
#define DISP_CC_MDSS_VSYNC_CLK_SRC 76
#define DISP_CC_MDSS_VSYNC_CLK_SRC 74
#define DISP_CC_MDSS_VSYNC_CLK_SRC 74
#define DISP_CC_MDSS_VSYNC_CLK_SRC 80
#define DISP_CC_MDSS_VSYNC_CLK_SRC 71
#define DISP_CC_MDSS_VSYNC_CLK_SRC 16
#define DISP_CC_MDSS_VSYNC_CLK_SRC 31
#define DISP_CC_MDSS_VSYNC_CLK_SRC 38
#define DISP_CC_MDSS_VSYNC_CLK_SRC 76
#define DISP_CC_MDSS_VSYNC_CLK_SRC 24
#define DISP_CC_MDSS_VSYNC_CLK_SRC 26
#define DISP_CC_MDSS_VSYNC_CLK_SRC 30
#define DISP_CC_MDSS_VSYNC_CLK_SRC 45
#define DISP_CC_MDSS_VSYNC_CLK_SRC 45
#define DISP_CC_MDSS_VSYNC_CLK_SRC 45
#define DISP_CC_MDSS_VSYNC_CLK_SRC 85
#define DISP_CC_MDSS_VSYNC_CLK_SRC 81
#define DISP_CC_MDSS_VSYNC_CLK_SRC 35
#define DISP_CC_MDSS_VSYNC_CLK_SRC 31
#define DISP_CC_MDSS_VSYNC_CLK_SRC 24
#define DISP_CC_MDSS_VSYNC_CLK_SRC 19
#define DISP_CC_MDSS_VSYNC_CLK_SRC 20
#define DISP_CC_MDSS_VSYNC_CLK_SRC 76
#define DISP_CC_MDSS_VSYNC_CLK_SRC 74
#define DISP_CC_MDSS_VSYNC_CLK_SRC 74
#define DISP_CC_MDSS_VSYNC_CLK_SRC 80
#define DISP_CC_MDSS_VSYNC_CLK_SRC 71