/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
/*
 * Copyright (c) 2022, The Linux Foundation. All rights reserved.
 */

#ifndef _DT_BINDINGS_CLK_QCOM_DISP_CC_SM6115_H
#define _DT_BINDINGS_CLK_QCOM_DISP_CC_SM6115_H

/* DISP_CC clocks */
#define DISP_CC_PLL0                    0
#define DISP_CC_PLL0_OUT_MAIN           1
#define DISP_CC_MDSS_AHB_CLK            2
#define DISP_CC_MDSS_AHB_CLK_SRC        3
#define DISP_CC_MDSS_BYTE0_CLK          4
#define DISP_CC_MDSS_BYTE0_CLK_SRC      5
#define DISP_CC_MDSS_BYTE0_DIV_CLK_SRC  6
#define DISP_CC_MDSS_BYTE0_INTF_CLK     7
#define DISP_CC_MDSS_ESC0_CLK           8
#define DISP_CC_MDSS_ESC0_CLK_SRC       9
#define DISP_CC_MDSS_MDP_CLK            10
#define DISP_CC_MDSS_MDP_CLK_SRC        11
#define DISP_CC_MDSS_MDP_LUT_CLK        12
#define DISP_CC_MDSS_NON_GDSC_AHB_CLK   13
#define DISP_CC_MDSS_PCLK0_CLK          14
#define DISP_CC_MDSS_PCLK0_CLK_SRC      15
#define DISP_CC_MDSS_ROT_CLK            16
#define DISP_CC_MDSS_ROT_CLK_SRC        17
#define DISP_CC_MDSS_VSYNC_CLK          18
#define DISP_CC_MDSS_VSYNC_CLK_SRC      19
#define DISP_CC_SLEEP_CLK               20
#define DISP_CC_SLEEP_CLK_SRC           21

/* DISP_CC GDSCR */
#define MDSS_GDSC                       0

#endif