drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h

20233

#define CP_HQD_PERSISTENT_STATE__DISP_ACTIVE__SHIFT 0x1f

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_sh_mask.h

18405

#define CP_HQD_PERSISTENT_STATE__DISP_ACTIVE__SHIFT 0x1f

drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_sh_mask.h

17296

#define CP_HQD_PERSISTENT_STATE__DISP_ACTIVE__SHIFT 0x1f

drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_3_sh_mask.h

19535

#define CP_HQD_PERSISTENT_STATE__DISP_ACTIVE__SHIFT 0x1f

drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_sh_mask.h

13990

#define CP_HQD_PERSISTENT_STATE__DISP_ACTIVE__SHIFT 0x1f

drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_0_0_sh_mask.h

13196

#define CP_HQD_PERSISTENT_STATE__DISP_ACTIVE__SHIFT 0x1f

drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_1_0_sh_mask.h

12961

#define CP_HQD_PERSISTENT_STATE__DISP_ACTIVE__SHIFT 0x1f

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h

12824

#define CP_HQD_PERSISTENT_STATE__DISP_ACTIVE__SHIFT 0x1f

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h

14124

#define CP_HQD_PERSISTENT_STATE__DISP_ACTIVE__SHIFT 0x1f

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h

13989

#define CP_HQD_PERSISTENT_STATE__DISP_ACTIVE__SHIFT 0x1f

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_2_sh_mask.h

3920

#define CP_HQD_PERSISTENT_STATE__DISP_ACTIVE__SHIFT 0x1f

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_3_sh_mask.h

16354

#define CP_HQD_PERSISTENT_STATE__DISP_ACTIVE__SHIFT 0x1f

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h

3302

#define CP_HQD_PERSISTENT_STATE__DISP_ACTIVE__SHIFT 0x1f

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h

3908

#define CP_HQD_PERSISTENT_STATE__DISP_ACTIVE__SHIFT 0x1f

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h

4430

#define CP_HQD_PERSISTENT_STATE__DISP_ACTIVE__SHIFT 0x1f