CLK_TOP_SYSPLL4_D4

include/dt-bindings/clock/mediatek,mt6735-topckgen.h

24

#define CLK_TOP_SYSPLL4_D4 17

include/dt-bindings/clock/mediatek,mt6795-clk.h

64

#define CLK_TOP_SYSPLL4_D4 53

include/dt-bindings/clock/mediatek,mt8365-clk.h

30

#define CLK_TOP_SYSPLL4_D4 20

include/dt-bindings/clock/mt2701-clk.h

26

#define CLK_TOP_SYSPLL4_D4 16

include/dt-bindings/clock/mt2712-clk.h

49

#define CLK_TOP_SYSPLL4_D4 18

include/dt-bindings/clock/mt6765-clk.h

50

#define CLK_TOP_SYSPLL4_D4 15

include/dt-bindings/clock/mt6797-clk.h

61

#define CLK_TOP_SYSPLL4_D4 51

include/dt-bindings/clock/mt7622-clk.h

40

#define CLK_TOP_SYSPLL4_D4 28

include/dt-bindings/clock/mt7629-clk.h

47

#define CLK_TOP_SYSPLL4_D4 37

include/dt-bindings/clock/mt8173-clk.h

66

#define CLK_TOP_SYSPLL4_D4 56

scripts/dtc/include-prefixes/dt-bindings/clock/mediatek,mt6735-topckgen.h

24