CLK_TOP_SYSPLL4_D2

include/dt-bindings/clock/mediatek,mt6735-topckgen.h

23

#define CLK_TOP_SYSPLL4_D2 16

include/dt-bindings/clock/mediatek,mt6795-clk.h

63

#define CLK_TOP_SYSPLL4_D2 52

include/dt-bindings/clock/mediatek,mt8365-clk.h

29

#define CLK_TOP_SYSPLL4_D2 19

include/dt-bindings/clock/mt2701-clk.h

25

#define CLK_TOP_SYSPLL4_D2 15

include/dt-bindings/clock/mt2712-clk.h

48

#define CLK_TOP_SYSPLL4_D2 17

include/dt-bindings/clock/mt6765-clk.h

49

#define CLK_TOP_SYSPLL4_D2 14

include/dt-bindings/clock/mt6797-clk.h

60

#define CLK_TOP_SYSPLL4_D2 50

include/dt-bindings/clock/mt7622-clk.h

39

#define CLK_TOP_SYSPLL4_D2 27

include/dt-bindings/clock/mt7629-clk.h

46

#define CLK_TOP_SYSPLL4_D2 36

include/dt-bindings/clock/mt8173-clk.h

65

#define CLK_TOP_SYSPLL4_D2 55

scripts/dtc/include-prefixes/dt-bindings/clock/mediatek,mt6735-topckgen.h

23