drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h

143

#define CG_TACH_CTRL__TARGET_PERIOD__SHIFT 0x00000003

drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h

4146

#define CG_TACH_CTRL__TARGET_PERIOD__SHIFT 0x3

drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h

4134

#define CG_TACH_CTRL__TARGET_PERIOD__SHIFT 0x3

drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h

3352

#define CG_TACH_CTRL__TARGET_PERIOD__SHIFT 0x3

drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h

4268

#define CG_TACH_CTRL__TARGET_PERIOD__SHIFT 0x3

drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h

3966

#define CG_TACH_CTRL__TARGET_PERIOD__SHIFT 0x3

drivers/gpu/drm/amd/include/asic_reg/thm/thm_11_0_2_sh_mask.h

39

#define CG_TACH_CTRL__TARGET_PERIOD__SHIFT 0x3

drivers/gpu/drm/amd/include/asic_reg/thm/thm_13_0_2_sh_mask.h

902

#define CG_TACH_CTRL__TARGET_PERIOD__SHIFT 0x3

drivers/gpu/drm/amd/include/asic_reg/thm/thm_14_0_2_sh_mask.h

375

#define CG_TACH_CTRL__TARGET_PERIOD__SHIFT 0x3

drivers/gpu/drm/amd/include/asic_reg/thm/thm_9_0_sh_mask.h

856

#define CG_TACH_CTRL__TARGET_PERIOD__SHIFT 0x3