drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_2_offset.h

11806

#define regDC_PINSTRAPS_BASE_IDX 2

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_4_offset.h

10909

#define regDC_PINSTRAPS_BASE_IDX 2

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_5_offset.h

11551

#define regDC_PINSTRAPS_BASE_IDX 2

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_6_offset.h

12042

#define regDC_PINSTRAPS_BASE_IDX 2

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_2_0_offset.h

10950

#define regDC_PINSTRAPS_BASE_IDX 2

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_2_1_offset.h

10959

#define regDC_PINSTRAPS_BASE_IDX 2

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_5_0_offset.h

9798

#define regDC_PINSTRAPS_BASE_IDX 2

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_5_1_offset.h

9777

#define regDC_PINSTRAPS_BASE_IDX 2

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_6_0_offset.h

11879

#define regDC_PINSTRAPS_BASE_IDX 2

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_4_1_0_offset.h

11236

#define regDC_PINSTRAPS_BASE_IDX 2

drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_3_1_4_offset.h

6257

#define regDC_PINSTRAPS_BASE_IDX 2

drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_4_0_0_offset.h

40

#define regDC_PINSTRAPS_BASE_IDX 2

drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_4_0_1_offset.h

42

#define regDC_PINSTRAPS_BASE_IDX 2

drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_4_2_0_offset.h

597

#define regDC_PINSTRAPS_BASE_IDX 2

drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_4_2_2_offset.h

594

#define regDC_PINSTRAPS_BASE_IDX 2

drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_4_2_3_offset.h

630

#define regDC_PINSTRAPS_BASE_IDX 2