drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h

9032

#define TC_CFG_L2_STORE_POLICY1__POLICY_20_MASK 0x00000300L

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h

10533

#define TC_CFG_L2_STORE_POLICY1__POLICY_20_MASK 0x00000300L

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h

10363

#define TC_CFG_L2_STORE_POLICY1__POLICY_20_MASK 0x00000300L

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_2_sh_mask.h

27728

#define TC_CFG_L2_STORE_POLICY1__POLICY_20_MASK 0x00000300L

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_3_sh_mask.h

11747

#define TC_CFG_L2_STORE_POLICY1__POLICY_20_MASK 0x00000300L

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h

14413

#define TC_CFG_L2_STORE_POLICY1__POLICY_20_MASK 0x300

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h

16313

#define TC_CFG_L2_STORE_POLICY1__POLICY_20_MASK 0x300

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h

16893

#define TC_CFG_L2_STORE_POLICY1__POLICY_20_MASK 0x300