#ifndef _CHERRYSTONE_H
#define _CHERRYSTONE_H
#pragma ident "%Z%%M% %I% %E% SMI"
#ifdef __cplusplus
extern "C" {
#endif
#define CHERRYSTONE_SBD_SLOTS 2
#define CHERRYSTONE_CPUS_PER_BOARD 2
#define CHERRYSTONE_MAX_CPUS (CHERRYSTONE_SBD_SLOTS * \
CHERRYSTONE_CPUS_PER_BOARD)
#define CHERRYSTONE_BANKS_PER_MC 4
#define CHERRYSTONE_MAX_SLICE (CHERRYSTONE_MAX_CPUS * \
CHERRYSTONE_BANKS_PER_MC)
#define CHERRYSTONE_GETSLOT(AID) (((AID&0xc)>>1)|(AID&1))
#define CHERRYSTONE_GETSLOT_LABEL(AID) ('A' + CHERRYSTONE_GETSLOT(AID))
#define CHERRYSTONE_GETSID(AID) ((AID&2)>>1)
#define CHERRYSTONE_GETAID(SLOT, SID) (((SLOT&2)<<1)|(SLOT&1)|((SID)<<1))
#define MC_VALID_SHIFT 63
#define MC_UK_SHIFT 41
#define MC_UM_SHIFT 20
#define MC_LK_SHIFT 14
#define MC_LM_SHIFT 8
#define PHYS2UM_SHIFT 26
#define MC_UK(memdec) (((memdec) >> MC_UK_SHIFT) & 0xfffu)
#define MC_LK(memdec) (((memdec) >> MC_LK_SHIFT)& 0x3fu)
#define MC_INTLV(memdec) ((~(MC_LK(memdec)) & 0xfu) + 1)
#define MC_UK2SPAN(memdec) ((MC_UK(memdec) + 1) << PHYS2UM_SHIFT)
#define MC_SPANMB(memdec) (MC_UK2SPAN(memdec) >> 20)
#define MC_UM(memdec) (((memdec) >> MC_UM_SHIFT) & 0x1fffffu)
#define MC_LM(memdec) (((memdec) >> MC_LM_SHIFT) & 0x3f)
#define MC_BASE(memdec) (MC_UM(memdec) & ~(MC_UK(memdec)))
#define MC_BASE2UM(base) (((base) & 0x1fffffu) << MC_UM_SHIFT)
#define SAF_MASK 0x000007ffff800000ull
#define MC_OFFSET_MASK 0xffu
#define PA_SLICE_SHIFT (36)
#define PFN_SLICE_SHIFT (PA_SLICE_SHIFT - MMU_PAGESHIFT)
#define PA_2_SLICE(pa) (((pa) >> PA_SLICE_SHIFT) & \
CHERRYSTONE_SLICE_MASK)
#define PFN_2_SLICE(pfn) (((pfn) >> PFN_SLICE_SHIFT) & \
CHERRYSTONE_SLICE_MASK)
#define CHERRYSTONE_SLICE_MASK (0xf)
extern uint64_t lddsafaddr(uint64_t physaddr);
extern uint64_t lddmcdecode(uint64_t physaddr);
#ifdef __cplusplus
}
#endif
#endif