#ifndef _SYS_MC_US3_H
#define _SYS_MC_US3_H
#pragma ident "%Z%%M% %I% %E% SMI"
#ifdef __cplusplus
extern "C" {
#endif
#if defined(_KERNEL)
#define NBANKS 4
#define NDGRPS 2
#define NDIMMS 4
#define MAX_DEVLEN 8
#define TRANSFER_SIZE 64
#ifndef _ASM
struct mc_soft_state {
dev_info_t *dip;
int portid;
int size;
void *memlayoutp;
volatile uchar_t *mc_base;
};
struct dimm_info {
char label[NDGRPS * NDIMMS][MAX_DEVLEN];
char sym_flag;
char data[1];
};
typedef char dimm_sid_t[DIMM_SERIAL_ID_LEN];
struct pin_info {
uchar_t dimmtable[144];
uchar_t pintable[576];
};
typedef struct mc_dlist {
struct mc_dlist *next;
struct mc_dlist *prev;
int id;
} mc_dlist_t;
struct seg_info {
mc_dlist_t seg_node;
int nbanks;
uint32_t ifactor;
uint64_t base;
uint64_t size;
struct bank_info *hb_inseg;
struct bank_info *tb_inseg;
};
struct bank_info {
mc_dlist_t bank_node;
int local_id;
int seg_id;
int devgrp_id;
ushort_t valid;
ushort_t uk;
uint_t um;
uchar_t lk;
uchar_t lm;
uchar_t pos;
uint64_t size;
struct bank_info *n_inseg;
struct bank_info *p_inseg;
struct dimm_info *dimminfop;
dimm_sid_t *dimmsidp[NDIMMS];
};
struct dgrp_info {
mc_dlist_t dgrp_node;
int ndevices;
uint64_t size;
int deviceids[NDIMMS];
};
struct device_info {
mc_dlist_t dev_node;
char label[MAX_DEVLEN];
uint64_t size;
};
struct mctrl_info {
mc_dlist_t mctrl_node;
int ndevgrps;
int devgrpids[NDGRPS];
};
typedef struct dimm_sid_cache {
int mcid;
int seg_id;
int state;
dimm_sid_t *sids;
} dimm_sid_cache_t;
#define MC_DIMM_SIDS_INVALID 0
#define MC_DIMM_SIDS_REQUESTED 1
#define MC_DIMM_SIDS_AVAILABLE 2
extern int (*p2get_mem_unum)(int, uint64_t, char *, int, int *);
extern int (*p2get_mem_info)(int, uint64_t, uint64_t *, uint64_t *,
uint64_t *, int *, int *, int *);
extern int (*p2get_mem_offset)(uint64_t, uint64_t *);
extern int (*p2get_mem_addr)(int, char *, uint64_t, uint64_t *);
extern int (*p2get_mem_sid)(int, int, char *, int, int *);
extern int (*p2init_sid_cache)(void);
extern void plat_add_mem_unum_label(char *, int, int, int);
extern dimm_sid_cache_t *plat_alloc_sid_cache(int *);
extern int plat_populate_sid_cache(dimm_sid_cache_t *, int);
uint64_t get_mcr(int);
#ifdef DEBUG
#include <sys/promif.h>
#define MC_ATTACH_DEBUG 0x00000001
#define MC_DETACH_DEBUG 0x00000002
#define MC_CMD_DEBUG 0x00000004
#define MC_REG_DEBUG 0x00000008
#define MC_GUNUM_DEBUG 0x00000010
#define MC_CNSTRC_DEBUG 0x00000020
#define MC_DESTRC_DEBUG 0x00000040
#define MC_LIST_DEBUG 0x00000080
static uint_t mc_debug = 0;
#define _PRINTF prom_printf
#define DPRINTF(flag, args) if (mc_debug & flag) _PRINTF args;
#else
#define DPRINTF(flag, args)
#endif
#endif
#define ASI_MCU_CTRL 0x72
#define REGOFFSET 8
#define MADR0OFFSET 0x10
#define MADR_UPA_MASK 0x7fffc000000LL
#define MADR_LPA_MASK 0x000000003c0LL
#define MADR_LK_MASK 0x0000003c000LL
#define MADR_UPA_SHIFT 26
#define MADR_LPA_SHIFT 6
#define MADR_LK_SHIFT 14
#endif
#ifdef __cplusplus
}
#endif
#endif