#include <sys/sysmacros.h>
#include <sys/types.h>
#include <sys/conf.h>
#include <sys/ddi.h>
#include <sys/sunddi.h>
#include <sys/modctl.h>
#include <sys/bitmap.h>
#include <sys/ib/adapters/tavor/tavor.h>
#include <sys/ib/ib_pkt_hdrs.h>
static int tavor_qp_reset2init(tavor_state_t *state, tavor_qphdl_t qp,
ibt_qp_info_t *info_p);
static int tavor_qp_init2init(tavor_state_t *state, tavor_qphdl_t qp,
ibt_cep_modify_flags_t flags, ibt_qp_info_t *info_p);
static int tavor_qp_init2rtr(tavor_state_t *state, tavor_qphdl_t qp,
ibt_cep_modify_flags_t flags, ibt_qp_info_t *info_p);
static int tavor_qp_rtr2rts(tavor_state_t *state, tavor_qphdl_t qp,
ibt_cep_modify_flags_t flags, ibt_qp_info_t *info_p);
static int tavor_qp_rts2rts(tavor_state_t *state, tavor_qphdl_t qp,
ibt_cep_modify_flags_t flags, ibt_qp_info_t *info_p);
static int tavor_qp_rts2sqd(tavor_state_t *state, tavor_qphdl_t qp,
ibt_cep_modify_flags_t flags);
static int tavor_qp_sqd2rts(tavor_state_t *state, tavor_qphdl_t qp,
ibt_cep_modify_flags_t flags, ibt_qp_info_t *info_p);
static int tavor_qp_sqd2sqd(tavor_state_t *state, tavor_qphdl_t qp,
ibt_cep_modify_flags_t flags, ibt_qp_info_t *info_p);
static int tavor_qp_sqerr2rts(tavor_state_t *state, tavor_qphdl_t qp,
ibt_cep_modify_flags_t flags, ibt_qp_info_t *info_p);
static int tavor_qp_to_error(tavor_state_t *state, tavor_qphdl_t qp);
static int tavor_qp_reset2err(tavor_state_t *state, tavor_qphdl_t qp);
static uint_t tavor_check_rdma_enable_flags(ibt_cep_modify_flags_t flags,
ibt_qp_info_t *info_p, tavor_hw_qpc_t *qpc);
static int tavor_qp_validate_resp_rsrc(tavor_state_t *state,
ibt_qp_rc_attr_t *rc, uint_t *rra_max);
static int tavor_qp_validate_init_depth(tavor_state_t *state,
ibt_qp_rc_attr_t *rc, uint_t *sra_max);
static int tavor_qp_validate_mtu(tavor_state_t *state, uint_t mtu);
int
tavor_qp_modify(tavor_state_t *state, tavor_qphdl_t qp,
ibt_cep_modify_flags_t flags, ibt_qp_info_t *info_p,
ibt_queue_sizes_t *actual_sz)
{
ibt_cep_state_t cur_state, mod_state;
ibt_cep_modify_flags_t okflags;
int status;
mutex_enter(&qp->qp_lock);
if (!(TAVOR_QP_TYPE_VALID(info_p->qp_trans, qp->qp_serv_type))) {
mutex_exit(&qp->qp_lock);
return (IBT_QP_SRV_TYPE_INVALID);
}
mod_state = info_p->qp_state;
if (flags & IBT_CEP_SET_RTR_RTS) {
cur_state = TAVOR_QP_RTR;
} else if ((flags & IBT_CEP_SET_STATE) &&
(mod_state == IBT_STATE_RTS)) {
switch (info_p->qp_current_state) {
case IBT_STATE_RTR:
cur_state = TAVOR_QP_RTR;
break;
case IBT_STATE_RTS:
cur_state = TAVOR_QP_RTS;
break;
case IBT_STATE_SQE:
cur_state = TAVOR_QP_SQERR;
break;
case IBT_STATE_SQD:
cur_state = TAVOR_QP_SQD;
break;
default:
mutex_exit(&qp->qp_lock);
return (IBT_QP_STATE_INVALID);
}
} else {
cur_state = qp->qp_state;
}
switch (cur_state) {
case TAVOR_QP_RESET:
okflags = (IBT_CEP_SET_STATE | IBT_CEP_SET_RESET_INIT |
IBT_CEP_SET_RDMA_R | IBT_CEP_SET_RDMA_W |
IBT_CEP_SET_ATOMIC | IBT_CEP_SET_PKEY_IX |
IBT_CEP_SET_PORT | IBT_CEP_SET_QKEY);
if (flags & ~okflags) {
mutex_exit(&qp->qp_lock);
goto qpmod_fail;
}
if ((flags & IBT_CEP_SET_RESET_INIT) &&
(flags & IBT_CEP_SET_STATE) &&
(mod_state != IBT_STATE_INIT)) {
mutex_exit(&qp->qp_lock);
goto qpmod_fail;
} else if ((flags & IBT_CEP_SET_RESET_INIT) ||
((flags & IBT_CEP_SET_STATE) &&
(mod_state == IBT_STATE_INIT))) {
status = tavor_qp_reset2init(state, qp, info_p);
if (status != DDI_SUCCESS) {
mutex_exit(&qp->qp_lock);
goto qpmod_fail;
}
qp->qp_state = TAVOR_QP_INIT;
} else if ((flags & IBT_CEP_SET_STATE) &&
(mod_state == IBT_STATE_RESET)) {
mutex_exit(&qp->qp_lock);
return (DDI_SUCCESS);
} else if ((flags & IBT_CEP_SET_STATE) &&
(mod_state == IBT_STATE_ERROR)) {
status = tavor_qp_reset2err(state, qp);
if (status != DDI_SUCCESS) {
mutex_exit(&qp->qp_lock);
goto qpmod_fail;
}
qp->qp_state = TAVOR_QP_ERR;
} else {
mutex_exit(&qp->qp_lock);
goto qpmod_fail;
}
status = tavor_wrid_from_reset_handling(state, qp);
if (status != DDI_SUCCESS) {
if (tavor_qp_to_reset(state, qp) != DDI_SUCCESS) {
TAVOR_WARNING(state, "failed to reset QP");
}
qp->qp_state = TAVOR_QP_RESET;
mutex_exit(&qp->qp_lock);
goto qpmod_fail;
}
break;
case TAVOR_QP_INIT:
okflags = (IBT_CEP_SET_STATE | IBT_CEP_SET_INIT_RTR |
IBT_CEP_SET_ADDS_VECT | IBT_CEP_SET_RDMARA_IN |
IBT_CEP_SET_MIN_RNR_NAK | IBT_CEP_SET_ALT_PATH |
IBT_CEP_SET_RDMA_R | IBT_CEP_SET_RDMA_W |
IBT_CEP_SET_ATOMIC | IBT_CEP_SET_PKEY_IX |
IBT_CEP_SET_QKEY | IBT_CEP_SET_PORT);
if (flags & ~okflags) {
mutex_exit(&qp->qp_lock);
goto qpmod_fail;
}
if ((flags & IBT_CEP_SET_INIT_RTR) &&
(flags & IBT_CEP_SET_STATE) &&
(mod_state != IBT_STATE_RTR)) {
mutex_exit(&qp->qp_lock);
goto qpmod_fail;
} else if ((flags & IBT_CEP_SET_INIT_RTR) ||
((flags & IBT_CEP_SET_STATE) &&
(mod_state == IBT_STATE_RTR))) {
status = tavor_qp_init2rtr(state, qp, flags, info_p);
if (status != DDI_SUCCESS) {
mutex_exit(&qp->qp_lock);
goto qpmod_fail;
}
qp->qp_state = TAVOR_QP_RTR;
} else if ((flags & IBT_CEP_SET_STATE) &&
(mod_state == IBT_STATE_INIT)) {
status = tavor_qp_init2init(state, qp, flags, info_p);
if (status != DDI_SUCCESS) {
mutex_exit(&qp->qp_lock);
goto qpmod_fail;
}
qp->qp_state = TAVOR_QP_INIT;
} else if ((flags & IBT_CEP_SET_STATE) &&
(mod_state == IBT_STATE_RESET)) {
status = tavor_qp_to_reset(state, qp);
if (status != DDI_SUCCESS) {
mutex_exit(&qp->qp_lock);
goto qpmod_fail;
}
qp->qp_state = TAVOR_QP_RESET;
tavor_wrid_to_reset_handling(state, qp);
} else if ((flags & IBT_CEP_SET_STATE) &&
(mod_state == IBT_STATE_ERROR)) {
status = tavor_qp_to_error(state, qp);
if (status != DDI_SUCCESS) {
mutex_exit(&qp->qp_lock);
goto qpmod_fail;
}
qp->qp_state = TAVOR_QP_ERR;
} else {
mutex_exit(&qp->qp_lock);
goto qpmod_fail;
}
break;
case TAVOR_QP_RTR:
okflags = (IBT_CEP_SET_STATE | IBT_CEP_SET_RTR_RTS |
IBT_CEP_SET_TIMEOUT | IBT_CEP_SET_RETRY |
IBT_CEP_SET_RNR_NAK_RETRY | IBT_CEP_SET_RDMARA_OUT |
IBT_CEP_SET_RDMA_R | IBT_CEP_SET_RDMA_W |
IBT_CEP_SET_ATOMIC | IBT_CEP_SET_QKEY |
IBT_CEP_SET_ALT_PATH | IBT_CEP_SET_MIG |
IBT_CEP_SET_MIN_RNR_NAK);
if (flags & ~okflags) {
mutex_exit(&qp->qp_lock);
goto qpmod_fail;
}
if ((flags & IBT_CEP_SET_RTR_RTS) &&
(flags & IBT_CEP_SET_STATE) &&
(mod_state != IBT_STATE_RTS)) {
mutex_exit(&qp->qp_lock);
goto qpmod_fail;
} else if ((flags & IBT_CEP_SET_RTR_RTS) ||
((flags & IBT_CEP_SET_STATE) &&
(mod_state == IBT_STATE_RTS))) {
status = tavor_qp_rtr2rts(state, qp, flags, info_p);
if (status != DDI_SUCCESS) {
mutex_exit(&qp->qp_lock);
goto qpmod_fail;
}
qp->qp_state = TAVOR_QP_RTS;
} else if ((flags & IBT_CEP_SET_STATE) &&
(mod_state == IBT_STATE_RESET)) {
status = tavor_qp_to_reset(state, qp);
if (status != DDI_SUCCESS) {
mutex_exit(&qp->qp_lock);
goto qpmod_fail;
}
qp->qp_state = TAVOR_QP_RESET;
tavor_wrid_to_reset_handling(state, qp);
} else if ((flags & IBT_CEP_SET_STATE) &&
(mod_state == IBT_STATE_ERROR)) {
status = tavor_qp_to_error(state, qp);
if (status != DDI_SUCCESS) {
mutex_exit(&qp->qp_lock);
goto qpmod_fail;
}
qp->qp_state = TAVOR_QP_ERR;
} else {
mutex_exit(&qp->qp_lock);
goto qpmod_fail;
}
break;
case TAVOR_QP_RTS:
okflags = (IBT_CEP_SET_STATE | IBT_CEP_SET_RDMA_R |
IBT_CEP_SET_RDMA_W | IBT_CEP_SET_ATOMIC |
IBT_CEP_SET_QKEY | IBT_CEP_SET_ALT_PATH |
IBT_CEP_SET_MIG | IBT_CEP_SET_MIN_RNR_NAK |
IBT_CEP_SET_SQD_EVENT);
if (flags & ~okflags) {
mutex_exit(&qp->qp_lock);
goto qpmod_fail;
}
if ((flags & IBT_CEP_SET_STATE) &&
(mod_state == IBT_STATE_RTS)) {
status = tavor_qp_rts2rts(state, qp, flags, info_p);
if (status != DDI_SUCCESS) {
mutex_exit(&qp->qp_lock);
goto qpmod_fail;
}
} else if ((flags & IBT_CEP_SET_STATE) &&
(mod_state == IBT_STATE_SQD)) {
status = tavor_qp_rts2sqd(state, qp, flags);
if (status != DDI_SUCCESS) {
mutex_exit(&qp->qp_lock);
goto qpmod_fail;
}
qp->qp_state = TAVOR_QP_SQD;
} else if ((flags & IBT_CEP_SET_STATE) &&
(mod_state == IBT_STATE_RESET)) {
status = tavor_qp_to_reset(state, qp);
if (status != DDI_SUCCESS) {
mutex_exit(&qp->qp_lock);
goto qpmod_fail;
}
qp->qp_state = TAVOR_QP_RESET;
tavor_wrid_to_reset_handling(state, qp);
} else if ((flags & IBT_CEP_SET_STATE) &&
(mod_state == IBT_STATE_ERROR)) {
status = tavor_qp_to_error(state, qp);
if (status != DDI_SUCCESS) {
mutex_exit(&qp->qp_lock);
goto qpmod_fail;
}
qp->qp_state = TAVOR_QP_ERR;
} else {
mutex_exit(&qp->qp_lock);
goto qpmod_fail;
}
break;
case TAVOR_QP_SQERR:
okflags = (IBT_CEP_SET_STATE | IBT_CEP_SET_RDMA_R |
IBT_CEP_SET_RDMA_W | IBT_CEP_SET_ATOMIC |
IBT_CEP_SET_QKEY | IBT_CEP_SET_MIN_RNR_NAK);
if (flags & ~okflags) {
mutex_exit(&qp->qp_lock);
goto qpmod_fail;
}
if ((flags & IBT_CEP_SET_STATE) &&
(mod_state == IBT_STATE_RTS)) {
status = tavor_qp_sqerr2rts(state, qp, flags, info_p);
if (status != DDI_SUCCESS) {
mutex_exit(&qp->qp_lock);
goto qpmod_fail;
}
qp->qp_state = TAVOR_QP_RTS;
} else if ((flags & IBT_CEP_SET_STATE) &&
(mod_state == IBT_STATE_RESET)) {
status = tavor_qp_to_reset(state, qp);
if (status != DDI_SUCCESS) {
mutex_exit(&qp->qp_lock);
goto qpmod_fail;
}
qp->qp_state = TAVOR_QP_RESET;
tavor_wrid_to_reset_handling(state, qp);
} else if ((flags & IBT_CEP_SET_STATE) &&
(mod_state == IBT_STATE_ERROR)) {
status = tavor_qp_to_error(state, qp);
if (status != DDI_SUCCESS) {
mutex_exit(&qp->qp_lock);
goto qpmod_fail;
}
qp->qp_state = TAVOR_QP_ERR;
} else {
mutex_exit(&qp->qp_lock);
goto qpmod_fail;
}
break;
case TAVOR_QP_SQD:
okflags = (IBT_CEP_SET_STATE | IBT_CEP_SET_ADDS_VECT |
IBT_CEP_SET_ALT_PATH | IBT_CEP_SET_MIG |
IBT_CEP_SET_RDMARA_OUT | IBT_CEP_SET_RDMARA_IN |
IBT_CEP_SET_QKEY | IBT_CEP_SET_PKEY_IX |
IBT_CEP_SET_TIMEOUT | IBT_CEP_SET_RETRY |
IBT_CEP_SET_RNR_NAK_RETRY | IBT_CEP_SET_PORT |
IBT_CEP_SET_MIN_RNR_NAK | IBT_CEP_SET_RDMA_R |
IBT_CEP_SET_RDMA_W | IBT_CEP_SET_ATOMIC);
if (flags & ~okflags) {
mutex_exit(&qp->qp_lock);
goto qpmod_fail;
}
if ((flags & IBT_CEP_SET_STATE) &&
(mod_state == IBT_STATE_SQD)) {
status = tavor_qp_sqd2sqd(state, qp, flags, info_p);
if (status != DDI_SUCCESS) {
mutex_exit(&qp->qp_lock);
goto qpmod_fail;
}
qp->qp_state = TAVOR_QP_SQD;
} else if ((flags & IBT_CEP_SET_STATE) &&
(mod_state == IBT_STATE_RTS)) {
if (qp->qp_sqd_still_draining) {
mutex_exit(&qp->qp_lock);
status = IBT_QP_STATE_INVALID;
goto qpmod_fail;
}
status = tavor_qp_sqd2rts(state, qp, flags, info_p);
if (status != DDI_SUCCESS) {
mutex_exit(&qp->qp_lock);
goto qpmod_fail;
}
qp->qp_state = TAVOR_QP_RTS;
} else if ((flags & IBT_CEP_SET_STATE) &&
(mod_state == IBT_STATE_RESET)) {
status = tavor_qp_to_reset(state, qp);
if (status != DDI_SUCCESS) {
mutex_exit(&qp->qp_lock);
goto qpmod_fail;
}
qp->qp_state = TAVOR_QP_RESET;
tavor_wrid_to_reset_handling(state, qp);
} else if ((flags & IBT_CEP_SET_STATE) &&
(mod_state == IBT_STATE_ERROR)) {
status = tavor_qp_to_error(state, qp);
if (status != DDI_SUCCESS) {
mutex_exit(&qp->qp_lock);
goto qpmod_fail;
}
qp->qp_state = TAVOR_QP_ERR;
} else {
mutex_exit(&qp->qp_lock);
goto qpmod_fail;
}
break;
case TAVOR_QP_ERR:
if ((flags & IBT_CEP_SET_STATE) &&
(mod_state == IBT_STATE_RESET)) {
status = tavor_qp_to_reset(state, qp);
if (status != DDI_SUCCESS) {
mutex_exit(&qp->qp_lock);
goto qpmod_fail;
}
qp->qp_state = TAVOR_QP_RESET;
tavor_wrid_to_reset_handling(state, qp);
} else if ((flags & IBT_CEP_SET_STATE) &&
(mod_state == IBT_STATE_ERROR)) {
mutex_exit(&qp->qp_lock);
return (DDI_SUCCESS);
} else {
mutex_exit(&qp->qp_lock);
goto qpmod_fail;
}
break;
default:
mutex_exit(&qp->qp_lock);
TAVOR_WARNING(state, "unknown QP state in modify");
goto qpmod_fail;
}
mutex_exit(&qp->qp_lock);
return (DDI_SUCCESS);
qpmod_fail:
return (status);
}
static int
tavor_qp_reset2init(tavor_state_t *state, tavor_qphdl_t qp,
ibt_qp_info_t *info_p)
{
tavor_hw_qpc_t *qpc;
ibt_qp_rc_attr_t *rc;
ibt_qp_ud_attr_t *ud;
ibt_qp_uc_attr_t *uc;
uint_t portnum, pkeyindx;
int status;
ASSERT(MUTEX_HELD(&qp->qp_lock));
qpc = &qp->qpc;
if (qp->qp_is_special) {
qpc->serv_type = TAVOR_QP_MLX;
} else {
qpc->serv_type = qp->qp_serv_type;
}
qpc->pm_state = TAVOR_QP_PMSTATE_MIGRATED;
qpc->de = TAVOR_QP_DESC_EVT_ENABLED;
qpc->sched_q = TAVOR_QP_SCHEDQ_GET(qp->qp_qpnum);
if (qp->qp_is_umap) {
qpc->usr_page = qp->qp_uarpg;
} else {
qpc->usr_page = 0;
}
qpc->pd = qp->qp_pdhdl->pd_pdnum;
qpc->wqe_baseaddr = 0;
qpc->wqe_lkey = qp->qp_mrhdl->mr_lkey;
qpc->ssc = qp->qp_sq_sigtype;
qpc->cqn_snd = qp->qp_sq_cqhdl->cq_cqnum;
qpc->rsc = TAVOR_QP_RQ_ALL_SIGNALED;
qpc->cqn_rcv = qp->qp_rq_cqhdl->cq_cqnum;
qpc->srq_en = qp->qp_srq_en;
if (qp->qp_srq_en == TAVOR_QP_SRQ_ENABLED) {
qpc->srq_number = qp->qp_srqhdl->srq_srqnum;
} else {
qpc->srq_number = 0;
}
if (qp->qp_serv_type == TAVOR_QP_UD) {
ud = &info_p->qp_transport.ud;
qpc->qkey = ud->ud_qkey;
portnum = ud->ud_port;
if (tavor_portnum_is_valid(state, portnum)) {
qpc->pri_addr_path.portnum = portnum;
} else {
return (IBT_HCA_PORT_INVALID);
}
pkeyindx = ud->ud_pkey_ix;
if (tavor_pkeyindex_is_valid(state, pkeyindx)) {
qpc->pri_addr_path.pkey_indx = pkeyindx;
qp->qp_pkeyindx = pkeyindx;
} else {
return (IBT_PKEY_IX_ILLEGAL);
}
} else if (qp->qp_serv_type == TAVOR_QP_RC) {
rc = &info_p->qp_transport.rc;
qpc->rre = (info_p->qp_flags & IBT_CEP_RDMA_RD) ? 1 : 0;
qpc->rwe = (info_p->qp_flags & IBT_CEP_RDMA_WR) ? 1 : 0;
qpc->rae = (info_p->qp_flags & IBT_CEP_ATOMIC) ? 1 : 0;
portnum = rc->rc_path.cep_hca_port_num;
if (tavor_portnum_is_valid(state, portnum)) {
qpc->pri_addr_path.portnum = portnum;
} else {
return (IBT_HCA_PORT_INVALID);
}
pkeyindx = rc->rc_path.cep_pkey_ix;
if (tavor_pkeyindex_is_valid(state, pkeyindx)) {
qpc->pri_addr_path.pkey_indx = pkeyindx;
} else {
return (IBT_PKEY_IX_ILLEGAL);
}
} else if (qp->qp_serv_type == TAVOR_QP_UC) {
uc = &info_p->qp_transport.uc;
qpc->rwe = (info_p->qp_flags & IBT_CEP_RDMA_WR) ? 1 : 0;
portnum = uc->uc_path.cep_hca_port_num;
if (tavor_portnum_is_valid(state, portnum)) {
qpc->pri_addr_path.portnum = portnum;
} else {
return (IBT_HCA_PORT_INVALID);
}
pkeyindx = uc->uc_path.cep_pkey_ix;
if (tavor_pkeyindex_is_valid(state, pkeyindx)) {
qpc->pri_addr_path.pkey_indx = pkeyindx;
} else {
return (IBT_PKEY_IX_ILLEGAL);
}
} else {
TAVOR_WARNING(state, "unknown QP transport type in rst2init");
return (ibc_get_ci_failure(0));
}
status = tavor_cmn_qp_cmd_post(state, RST2INIT_QP, qpc, qp->qp_qpnum,
0, TAVOR_CMD_NOSLEEP_SPIN);
if (status != TAVOR_CMD_SUCCESS) {
cmn_err(CE_CONT, "Tavor: RST2INIT_QP command failed: %08x\n",
status);
return (ibc_get_ci_failure(0));
}
return (DDI_SUCCESS);
}
static int
tavor_qp_init2init(tavor_state_t *state, tavor_qphdl_t qp,
ibt_cep_modify_flags_t flags, ibt_qp_info_t *info_p)
{
tavor_hw_qpc_t *qpc;
ibt_qp_rc_attr_t *rc;
ibt_qp_ud_attr_t *ud;
ibt_qp_uc_attr_t *uc;
uint_t portnum, pkeyindx;
uint32_t opmask = 0;
int status;
ASSERT(MUTEX_HELD(&qp->qp_lock));
qpc = &qp->qpc;
if (qp->qp_serv_type == TAVOR_QP_UD) {
ud = &info_p->qp_transport.ud;
if (flags & IBT_CEP_SET_PORT) {
portnum = ud->ud_port;
if (tavor_portnum_is_valid(state, portnum)) {
qpc->pri_addr_path.portnum = portnum;
} else {
return (IBT_HCA_PORT_INVALID);
}
opmask |= TAVOR_CMD_OP_PRIM_PORT;
}
if (flags & IBT_CEP_SET_PKEY_IX) {
pkeyindx = ud->ud_pkey_ix;
if (tavor_pkeyindex_is_valid(state, pkeyindx)) {
qpc->pri_addr_path.pkey_indx = pkeyindx;
opmask |= TAVOR_CMD_OP_PKEYINDX;
qp->qp_pkeyindx = pkeyindx;
} else {
return (IBT_PKEY_IX_ILLEGAL);
}
}
if (flags & IBT_CEP_SET_QKEY) {
qpc->qkey = ud->ud_qkey;
opmask |= TAVOR_CMD_OP_QKEY;
}
} else if (qp->qp_serv_type == TAVOR_QP_RC) {
rc = &info_p->qp_transport.rc;
if (flags & IBT_CEP_SET_PORT) {
portnum = rc->rc_path.cep_hca_port_num;
if (tavor_portnum_is_valid(state, portnum)) {
qpc->pri_addr_path.portnum = portnum;
} else {
return (IBT_HCA_PORT_INVALID);
}
opmask |= TAVOR_CMD_OP_PRIM_PORT;
}
if (flags & IBT_CEP_SET_PKEY_IX) {
pkeyindx = rc->rc_path.cep_pkey_ix;
if (tavor_pkeyindex_is_valid(state, pkeyindx)) {
qpc->pri_addr_path.pkey_indx = pkeyindx;
opmask |= TAVOR_CMD_OP_PKEYINDX;
} else {
return (IBT_PKEY_IX_ILLEGAL);
}
}
opmask |= tavor_check_rdma_enable_flags(flags, info_p, qpc);
} else if (qp->qp_serv_type == TAVOR_QP_UC) {
uc = &info_p->qp_transport.uc;
if (flags & IBT_CEP_SET_PORT) {
portnum = uc->uc_path.cep_hca_port_num;
if (tavor_portnum_is_valid(state, portnum)) {
qpc->pri_addr_path.portnum = portnum;
} else {
return (IBT_HCA_PORT_INVALID);
}
opmask |= TAVOR_CMD_OP_PRIM_PORT;
}
if (flags & IBT_CEP_SET_PKEY_IX) {
pkeyindx = uc->uc_path.cep_pkey_ix;
if (tavor_pkeyindex_is_valid(state, pkeyindx)) {
qpc->pri_addr_path.pkey_indx = pkeyindx;
opmask |= TAVOR_CMD_OP_PKEYINDX;
} else {
return (IBT_PKEY_IX_ILLEGAL);
}
}
if (flags & IBT_CEP_SET_RDMA_W) {
qpc->rwe = (info_p->qp_flags & IBT_CEP_RDMA_WR) ? 1 : 0;
opmask |= TAVOR_CMD_OP_RWE;
}
} else {
TAVOR_WARNING(state, "unknown QP transport type in init2init");
return (ibc_get_ci_failure(0));
}
status = tavor_cmn_qp_cmd_post(state, INIT2INIT_QP, qpc, qp->qp_qpnum,
opmask, TAVOR_CMD_NOSLEEP_SPIN);
if (status != TAVOR_CMD_SUCCESS) {
if (status != TAVOR_CMD_BAD_QP_STATE) {
cmn_err(CE_CONT, "Tavor: INIT2INIT_QP command failed: "
"%08x\n", status);
return (ibc_get_ci_failure(0));
} else {
return (IBT_QP_STATE_INVALID);
}
}
return (DDI_SUCCESS);
}
static int
tavor_qp_init2rtr(tavor_state_t *state, tavor_qphdl_t qp,
ibt_cep_modify_flags_t flags, ibt_qp_info_t *info_p)
{
tavor_hw_qpc_t *qpc;
ibt_qp_rc_attr_t *rc;
ibt_qp_ud_attr_t *ud;
ibt_qp_uc_attr_t *uc;
tavor_hw_addr_path_t *qpc_path;
ibt_adds_vect_t *adds_vect;
uint_t portnum, pkeyindx, rra_max;
uint_t mtu;
uint32_t opmask = 0;
int status;
ASSERT(MUTEX_HELD(&qp->qp_lock));
qpc = &qp->qpc;
if (qp->qp_serv_type == TAVOR_QP_UD) {
ud = &info_p->qp_transport.ud;
if (qp->qp_is_special) {
qpc->mtu = 4;
} else {
qpc->mtu = state->ts_cfg_profile->cp_max_mtu;
}
qpc->msg_max = qpc->mtu + 7;
qp->qp_save_mtu = qpc->mtu;
if (flags & IBT_CEP_SET_PKEY_IX) {
pkeyindx = ud->ud_pkey_ix;
if (tavor_pkeyindex_is_valid(state, pkeyindx)) {
qpc->pri_addr_path.pkey_indx = pkeyindx;
opmask |= TAVOR_CMD_OP_PKEYINDX;
qp->qp_pkeyindx = pkeyindx;
} else {
return (IBT_PKEY_IX_ILLEGAL);
}
}
if (flags & IBT_CEP_SET_QKEY) {
qpc->qkey = ud->ud_qkey;
opmask |= TAVOR_CMD_OP_QKEY;
}
} else if (qp->qp_serv_type == TAVOR_QP_RC) {
rc = &info_p->qp_transport.rc;
qpc_path = &qpc->pri_addr_path;
adds_vect = &rc->rc_path.cep_adds_vect;
status = tavor_set_addr_path(state, adds_vect, qpc_path,
TAVOR_ADDRPATH_QP, qp);
if (status != DDI_SUCCESS) {
return (status);
}
qpc_path->rnr_retry = rc->rc_rnr_retry_cnt;
qpc->retry_cnt = rc->rc_retry_cnt;
qpc_path->ack_timeout = rc->rc_path.cep_timeout;
qpc->rem_qpn = rc->rc_dst_qpn;
qpc->next_rcv_psn = rc->rc_rq_psn;
qpc->msg_max = TAVOR_QP_LOG_MAX_MSGSZ;
qpc->ric = (qp->qp_srq_en == TAVOR_QP_SRQ_ENABLED) ? 1 : 0;
mtu = rc->rc_path_mtu;
if (tavor_qp_validate_mtu(state, mtu) != DDI_SUCCESS) {
return (IBT_HCA_PORT_MTU_EXCEEDED);
}
qpc->mtu = mtu;
qp->qp_save_mtu = qpc->mtu;
qpc->min_rnr_nak = rc->rc_min_rnr_nak;
opmask |= TAVOR_CMD_OP_MINRNRNAK;
if (tavor_qp_validate_resp_rsrc(state, rc, &rra_max) !=
DDI_SUCCESS) {
return (IBT_INVALID_PARAM);
}
qpc->rra_max = rra_max;
qpc->ra_buff_indx = qp->qp_rdb_ddraddr >> TAVOR_RDB_SIZE_SHIFT;
if (flags & IBT_CEP_SET_PKEY_IX) {
pkeyindx = rc->rc_path.cep_pkey_ix;
if (tavor_pkeyindex_is_valid(state, pkeyindx)) {
qpc->pri_addr_path.pkey_indx = pkeyindx;
opmask |= TAVOR_CMD_OP_PKEYINDX;
} else {
return (IBT_PKEY_IX_ILLEGAL);
}
}
opmask |= tavor_check_rdma_enable_flags(flags, info_p, qpc);
if (flags & IBT_CEP_SET_ALT_PATH) {
qpc_path = &qpc->alt_addr_path;
adds_vect = &rc->rc_alt_path.cep_adds_vect;
status = tavor_set_addr_path(state, adds_vect, qpc_path,
TAVOR_ADDRPATH_QP, qp);
if (status != DDI_SUCCESS) {
return (status);
}
qpc_path->ack_timeout = rc->rc_alt_path.cep_timeout;
qpc_path->rnr_retry = rc->rc_rnr_retry_cnt;
portnum = rc->rc_alt_path.cep_hca_port_num;
if (tavor_portnum_is_valid(state, portnum)) {
qpc->alt_addr_path.portnum = portnum;
} else {
return (IBT_HCA_PORT_INVALID);
}
pkeyindx = rc->rc_alt_path.cep_pkey_ix;
if (tavor_pkeyindex_is_valid(state, pkeyindx)) {
qpc->alt_addr_path.pkey_indx = pkeyindx;
} else {
return (IBT_PKEY_IX_ILLEGAL);
}
opmask |= (TAVOR_CMD_OP_ALT_PATH |
TAVOR_CMD_OP_ALT_RNRRETRY);
}
} else if (qp->qp_serv_type == TAVOR_QP_UC) {
uc = &info_p->qp_transport.uc;
qpc_path = &qpc->pri_addr_path;
adds_vect = &uc->uc_path.cep_adds_vect;
status = tavor_set_addr_path(state, adds_vect, qpc_path,
TAVOR_ADDRPATH_QP, qp);
if (status != DDI_SUCCESS) {
return (status);
}
qpc->rem_qpn = uc->uc_dst_qpn;
qpc->next_rcv_psn = uc->uc_rq_psn;
qpc->msg_max = TAVOR_QP_LOG_MAX_MSGSZ;
mtu = uc->uc_path_mtu;
if (tavor_qp_validate_mtu(state, mtu) != DDI_SUCCESS) {
return (IBT_HCA_PORT_MTU_EXCEEDED);
}
qpc->mtu = mtu;
qp->qp_save_mtu = qpc->mtu;
if (flags & IBT_CEP_SET_PKEY_IX) {
pkeyindx = uc->uc_path.cep_pkey_ix;
if (tavor_pkeyindex_is_valid(state, pkeyindx)) {
qpc->pri_addr_path.pkey_indx = pkeyindx;
opmask |= TAVOR_CMD_OP_PKEYINDX;
} else {
return (IBT_PKEY_IX_ILLEGAL);
}
}
if (flags & IBT_CEP_SET_RDMA_W) {
qpc->rwe = (info_p->qp_flags & IBT_CEP_RDMA_WR) ? 1 : 0;
opmask |= TAVOR_CMD_OP_RWE;
}
if (flags & IBT_CEP_SET_ALT_PATH) {
qpc_path = &qpc->alt_addr_path;
adds_vect = &uc->uc_alt_path.cep_adds_vect;
status = tavor_set_addr_path(state, adds_vect, qpc_path,
TAVOR_ADDRPATH_QP, qp);
if (status != DDI_SUCCESS) {
return (status);
}
portnum = uc->uc_alt_path.cep_hca_port_num;
if (tavor_portnum_is_valid(state, portnum)) {
qpc->alt_addr_path.portnum = portnum;
} else {
return (IBT_HCA_PORT_INVALID);
}
pkeyindx = uc->uc_alt_path.cep_pkey_ix;
if (tavor_pkeyindex_is_valid(state, pkeyindx)) {
qpc->alt_addr_path.pkey_indx = pkeyindx;
} else {
return (IBT_PKEY_IX_ILLEGAL);
}
opmask |= TAVOR_CMD_OP_ALT_PATH;
}
} else {
TAVOR_WARNING(state, "unknown QP transport type in init2rtr");
return (ibc_get_ci_failure(0));
}
status = tavor_cmn_qp_cmd_post(state, INIT2RTR_QP, qpc, qp->qp_qpnum,
opmask, TAVOR_CMD_NOSLEEP_SPIN);
if (status != TAVOR_CMD_SUCCESS) {
if (status != TAVOR_CMD_BAD_QP_STATE) {
cmn_err(CE_CONT, "Tavor: INIT2RTR_QP command failed: "
"%08x\n", status);
return (ibc_get_ci_failure(0));
} else {
return (IBT_QP_STATE_INVALID);
}
}
return (DDI_SUCCESS);
}
static int
tavor_qp_rtr2rts(tavor_state_t *state, tavor_qphdl_t qp,
ibt_cep_modify_flags_t flags, ibt_qp_info_t *info_p)
{
tavor_hw_qpc_t *qpc;
ibt_qp_rc_attr_t *rc;
ibt_qp_ud_attr_t *ud;
ibt_qp_uc_attr_t *uc;
tavor_hw_addr_path_t *qpc_path;
ibt_adds_vect_t *adds_vect;
uint_t portnum, pkeyindx, sra_max;
uint32_t opmask = 0;
int status;
ASSERT(MUTEX_HELD(&qp->qp_lock));
qpc = &qp->qpc;
qpc->flight_lim = TAVOR_QP_FLIGHT_LIM_UNLIMITED;
if (qp->qp_serv_type == TAVOR_QP_UD) {
ud = &info_p->qp_transport.ud;
qpc->next_snd_psn = ud->ud_sq_psn;
if (flags & IBT_CEP_SET_QKEY) {
qpc->qkey = ud->ud_qkey;
opmask |= TAVOR_CMD_OP_QKEY;
}
} else if (qp->qp_serv_type == TAVOR_QP_RC) {
rc = &info_p->qp_transport.rc;
qpc_path = &qpc->pri_addr_path;
qpc->next_snd_psn = rc->rc_sq_psn;
qpc_path->ack_timeout = rc->rc_path.cep_timeout;
qpc_path->rnr_retry = rc->rc_rnr_retry_cnt;
qpc->retry_cnt = rc->rc_retry_cnt;
qpc->ack_req_freq = state->ts_cfg_profile->cp_ackreq_freq;
if (tavor_qp_validate_init_depth(state, rc, &sra_max) !=
DDI_SUCCESS) {
return (IBT_INVALID_PARAM);
}
qpc->sra_max = sra_max;
qpc->sre = qpc->swe = qpc->sae = 1;
qpc->sic = 0;
opmask |= tavor_check_rdma_enable_flags(flags, info_p, qpc);
if (flags & IBT_CEP_SET_MIG) {
if (rc->rc_mig_state == IBT_STATE_MIGRATED) {
qpc->pm_state = TAVOR_QP_PMSTATE_MIGRATED;
} else if (rc->rc_mig_state == IBT_STATE_REARMED) {
qpc->pm_state = TAVOR_QP_PMSTATE_REARM;
} else {
return (IBT_QP_APM_STATE_INVALID);
}
opmask |= TAVOR_CMD_OP_PM_STATE;
}
if (flags & IBT_CEP_SET_MIN_RNR_NAK) {
qpc->min_rnr_nak = rc->rc_min_rnr_nak;
opmask |= TAVOR_CMD_OP_MINRNRNAK;
}
if (flags & IBT_CEP_SET_ALT_PATH) {
qpc_path = &qpc->alt_addr_path;
adds_vect = &rc->rc_alt_path.cep_adds_vect;
status = tavor_set_addr_path(state, adds_vect, qpc_path,
TAVOR_ADDRPATH_QP, qp);
if (status != DDI_SUCCESS) {
return (status);
}
qpc_path->ack_timeout = rc->rc_alt_path.cep_timeout;
qpc_path->rnr_retry = rc->rc_rnr_retry_cnt;
portnum = rc->rc_alt_path.cep_hca_port_num;
if (tavor_portnum_is_valid(state, portnum)) {
qpc->alt_addr_path.portnum = portnum;
} else {
return (IBT_HCA_PORT_INVALID);
}
pkeyindx = rc->rc_alt_path.cep_pkey_ix;
if (tavor_pkeyindex_is_valid(state, pkeyindx)) {
qpc->alt_addr_path.pkey_indx = pkeyindx;
} else {
return (IBT_PKEY_IX_ILLEGAL);
}
opmask |= (TAVOR_CMD_OP_ALT_PATH |
TAVOR_CMD_OP_ALT_RNRRETRY);
}
} else if (qp->qp_serv_type == TAVOR_QP_UC) {
uc = &info_p->qp_transport.uc;
qpc->next_snd_psn = uc->uc_sq_psn;
qpc->swe = 1;
if (flags & IBT_CEP_SET_RDMA_W) {
qpc->rwe = (info_p->qp_flags & IBT_CEP_RDMA_WR) ? 1 : 0;
opmask |= TAVOR_CMD_OP_RWE;
}
if (flags & IBT_CEP_SET_MIG) {
if (uc->uc_mig_state == IBT_STATE_MIGRATED) {
qpc->pm_state = TAVOR_QP_PMSTATE_MIGRATED;
} else if (uc->uc_mig_state == IBT_STATE_REARMED) {
qpc->pm_state = TAVOR_QP_PMSTATE_REARM;
} else {
return (IBT_QP_APM_STATE_INVALID);
}
opmask |= TAVOR_CMD_OP_PM_STATE;
}
if (flags & IBT_CEP_SET_ALT_PATH) {
qpc_path = &qpc->alt_addr_path;
adds_vect = &uc->uc_alt_path.cep_adds_vect;
status = tavor_set_addr_path(state, adds_vect, qpc_path,
TAVOR_ADDRPATH_QP, qp);
if (status != DDI_SUCCESS) {
return (status);
}
portnum = uc->uc_alt_path.cep_hca_port_num;
if (tavor_portnum_is_valid(state, portnum)) {
qpc->alt_addr_path.portnum = portnum;
} else {
return (IBT_HCA_PORT_INVALID);
}
pkeyindx = uc->uc_alt_path.cep_pkey_ix;
if (tavor_pkeyindex_is_valid(state, pkeyindx)) {
qpc->alt_addr_path.pkey_indx = pkeyindx;
} else {
return (IBT_PKEY_IX_ILLEGAL);
}
opmask |= TAVOR_CMD_OP_ALT_PATH;
}
} else {
TAVOR_WARNING(state, "unknown QP transport type in rtr2rts");
return (ibc_get_ci_failure(0));
}
status = tavor_cmn_qp_cmd_post(state, RTR2RTS_QP, qpc, qp->qp_qpnum,
opmask, TAVOR_CMD_NOSLEEP_SPIN);
if (status != TAVOR_CMD_SUCCESS) {
if (status != TAVOR_CMD_BAD_QP_STATE) {
cmn_err(CE_CONT, "Tavor: RTR2RTS_QP command failed: "
"%08x\n", status);
return (ibc_get_ci_failure(0));
} else {
return (IBT_QP_STATE_INVALID);
}
}
return (DDI_SUCCESS);
}
static int
tavor_qp_rts2rts(tavor_state_t *state, tavor_qphdl_t qp,
ibt_cep_modify_flags_t flags, ibt_qp_info_t *info_p)
{
tavor_hw_qpc_t *qpc;
ibt_qp_rc_attr_t *rc;
ibt_qp_ud_attr_t *ud;
ibt_qp_uc_attr_t *uc;
tavor_hw_addr_path_t *qpc_path;
ibt_adds_vect_t *adds_vect;
uint_t portnum, pkeyindx;
uint32_t opmask = 0;
int status;
ASSERT(MUTEX_HELD(&qp->qp_lock));
qpc = &qp->qpc;
if (qp->qp_serv_type == TAVOR_QP_UD) {
ud = &info_p->qp_transport.ud;
if (flags & IBT_CEP_SET_QKEY) {
qpc->qkey = ud->ud_qkey;
opmask |= TAVOR_CMD_OP_QKEY;
}
} else if (qp->qp_serv_type == TAVOR_QP_RC) {
rc = &info_p->qp_transport.rc;
opmask |= tavor_check_rdma_enable_flags(flags, info_p, qpc);
if (flags & IBT_CEP_SET_MIG) {
if (rc->rc_mig_state == IBT_STATE_MIGRATED) {
qpc->pm_state = TAVOR_QP_PMSTATE_MIGRATED;
} else if (rc->rc_mig_state == IBT_STATE_REARMED) {
qpc->pm_state = TAVOR_QP_PMSTATE_REARM;
} else {
return (IBT_QP_APM_STATE_INVALID);
}
opmask |= TAVOR_CMD_OP_PM_STATE;
}
if (flags & IBT_CEP_SET_MIN_RNR_NAK) {
qpc->min_rnr_nak = rc->rc_min_rnr_nak;
opmask |= TAVOR_CMD_OP_MINRNRNAK;
}
if (flags & IBT_CEP_SET_ALT_PATH) {
qpc_path = &qpc->alt_addr_path;
adds_vect = &rc->rc_alt_path.cep_adds_vect;
status = tavor_set_addr_path(state, adds_vect, qpc_path,
TAVOR_ADDRPATH_QP, qp);
if (status != DDI_SUCCESS) {
return (status);
}
qpc_path->ack_timeout = rc->rc_alt_path.cep_timeout;
portnum = rc->rc_alt_path.cep_hca_port_num;
if (tavor_portnum_is_valid(state, portnum)) {
qpc->alt_addr_path.portnum = portnum;
} else {
return (IBT_HCA_PORT_INVALID);
}
pkeyindx = rc->rc_alt_path.cep_pkey_ix;
if (tavor_pkeyindex_is_valid(state, pkeyindx)) {
qpc->alt_addr_path.pkey_indx = pkeyindx;
} else {
return (IBT_PKEY_IX_ILLEGAL);
}
opmask |= TAVOR_CMD_OP_ALT_PATH;
}
} else if (qp->qp_serv_type == TAVOR_QP_UC) {
uc = &info_p->qp_transport.uc;
if (flags & IBT_CEP_SET_RDMA_W) {
qpc->rwe = (info_p->qp_flags & IBT_CEP_RDMA_WR) ? 1 : 0;
opmask |= TAVOR_CMD_OP_RWE;
}
if (flags & IBT_CEP_SET_MIG) {
if (uc->uc_mig_state == IBT_STATE_MIGRATED) {
qpc->pm_state = TAVOR_QP_PMSTATE_MIGRATED;
} else if (uc->uc_mig_state == IBT_STATE_REARMED) {
qpc->pm_state = TAVOR_QP_PMSTATE_REARM;
} else {
return (IBT_QP_APM_STATE_INVALID);
}
opmask |= TAVOR_CMD_OP_PM_STATE;
}
if (flags & IBT_CEP_SET_ALT_PATH) {
qpc_path = &qpc->alt_addr_path;
adds_vect = &uc->uc_alt_path.cep_adds_vect;
status = tavor_set_addr_path(state, adds_vect, qpc_path,
TAVOR_ADDRPATH_QP, qp);
if (status != DDI_SUCCESS) {
return (status);
}
portnum = uc->uc_alt_path.cep_hca_port_num;
if (tavor_portnum_is_valid(state, portnum)) {
qpc->alt_addr_path.portnum = portnum;
} else {
return (IBT_HCA_PORT_INVALID);
}
pkeyindx = uc->uc_alt_path.cep_pkey_ix;
if (tavor_pkeyindex_is_valid(state, pkeyindx)) {
qpc->alt_addr_path.pkey_indx = pkeyindx;
} else {
return (IBT_PKEY_IX_ILLEGAL);
}
opmask |= TAVOR_CMD_OP_ALT_PATH;
}
} else {
TAVOR_WARNING(state, "unknown QP transport type in rts2rts");
return (ibc_get_ci_failure(0));
}
status = tavor_cmn_qp_cmd_post(state, RTS2RTS_QP, qpc, qp->qp_qpnum,
opmask, TAVOR_CMD_NOSLEEP_SPIN);
if (status != TAVOR_CMD_SUCCESS) {
if (status != TAVOR_CMD_BAD_QP_STATE) {
cmn_err(CE_CONT, "Tavor: RTS2RTS_QP command failed: "
"%08x\n", status);
return (ibc_get_ci_failure(0));
} else {
return (IBT_QP_STATE_INVALID);
}
}
return (DDI_SUCCESS);
}
static int
tavor_qp_rts2sqd(tavor_state_t *state, tavor_qphdl_t qp,
ibt_cep_modify_flags_t flags)
{
int status;
ASSERT(MUTEX_HELD(&qp->qp_lock));
qp->qp_forward_sqd_event = (flags & IBT_CEP_SET_SQD_EVENT) ? 1 : 0;
status = tavor_cmn_qp_cmd_post(state, RTS2SQD_QP, NULL, qp->qp_qpnum,
0, TAVOR_CMD_NOSLEEP_SPIN);
if (status != TAVOR_CMD_SUCCESS) {
if (status != TAVOR_CMD_BAD_QP_STATE) {
cmn_err(CE_CONT, "Tavor: RTS2SQD_QP command failed: "
"%08x\n", status);
return (ibc_get_ci_failure(0));
} else {
return (IBT_QP_STATE_INVALID);
}
}
qp->qp_sqd_still_draining = 1;
return (DDI_SUCCESS);
}
static int
tavor_qp_sqd2rts(tavor_state_t *state, tavor_qphdl_t qp,
ibt_cep_modify_flags_t flags, ibt_qp_info_t *info_p)
{
tavor_hw_qpc_t *qpc;
ibt_qp_rc_attr_t *rc;
ibt_qp_ud_attr_t *ud;
ibt_qp_uc_attr_t *uc;
tavor_hw_addr_path_t *qpc_path;
ibt_adds_vect_t *adds_vect;
uint_t portnum, pkeyindx;
uint32_t opmask = 0;
int status;
ASSERT(MUTEX_HELD(&qp->qp_lock));
qpc = &qp->qpc;
if (qp->qp_serv_type == TAVOR_QP_UD) {
ud = &info_p->qp_transport.ud;
if (flags & IBT_CEP_SET_QKEY) {
qpc->qkey = ud->ud_qkey;
opmask |= TAVOR_CMD_OP_QKEY;
}
} else if (qp->qp_serv_type == TAVOR_QP_RC) {
rc = &info_p->qp_transport.rc;
opmask |= tavor_check_rdma_enable_flags(flags, info_p, qpc);
if (flags & IBT_CEP_SET_MIG) {
if (rc->rc_mig_state == IBT_STATE_MIGRATED) {
qpc->pm_state = TAVOR_QP_PMSTATE_MIGRATED;
} else if (rc->rc_mig_state == IBT_STATE_REARMED) {
qpc->pm_state = TAVOR_QP_PMSTATE_REARM;
} else {
return (IBT_QP_APM_STATE_INVALID);
}
opmask |= TAVOR_CMD_OP_PM_STATE;
}
if (flags & IBT_CEP_SET_ALT_PATH) {
qpc_path = &qpc->alt_addr_path;
adds_vect = &rc->rc_alt_path.cep_adds_vect;
status = tavor_set_addr_path(state, adds_vect, qpc_path,
TAVOR_ADDRPATH_QP, qp);
if (status != DDI_SUCCESS) {
return (status);
}
qpc_path->ack_timeout = rc->rc_alt_path.cep_timeout;
portnum = rc->rc_alt_path.cep_hca_port_num;
if (tavor_portnum_is_valid(state, portnum)) {
qpc->alt_addr_path.portnum = portnum;
} else {
return (IBT_HCA_PORT_INVALID);
}
pkeyindx = rc->rc_alt_path.cep_pkey_ix;
if (tavor_pkeyindex_is_valid(state, pkeyindx)) {
qpc->alt_addr_path.pkey_indx = pkeyindx;
} else {
return (IBT_PKEY_IX_ILLEGAL);
}
opmask |= TAVOR_CMD_OP_ALT_PATH;
}
if (flags & IBT_CEP_SET_MIN_RNR_NAK) {
qpc->min_rnr_nak = rc->rc_min_rnr_nak;
opmask |= TAVOR_CMD_OP_MINRNRNAK;
}
} else if (qp->qp_serv_type == TAVOR_QP_UC) {
uc = &info_p->qp_transport.uc;
if (flags & IBT_CEP_SET_RDMA_W) {
qpc->rwe = (info_p->qp_flags & IBT_CEP_RDMA_WR) ? 1 : 0;
opmask |= TAVOR_CMD_OP_RWE;
}
if (flags & IBT_CEP_SET_MIG) {
if (uc->uc_mig_state == IBT_STATE_MIGRATED) {
qpc->pm_state = TAVOR_QP_PMSTATE_MIGRATED;
} else if (uc->uc_mig_state == IBT_STATE_REARMED) {
qpc->pm_state = TAVOR_QP_PMSTATE_REARM;
} else {
return (IBT_QP_APM_STATE_INVALID);
}
opmask |= TAVOR_CMD_OP_PM_STATE;
}
if (flags & IBT_CEP_SET_ALT_PATH) {
qpc_path = &qpc->alt_addr_path;
adds_vect = &uc->uc_alt_path.cep_adds_vect;
status = tavor_set_addr_path(state, adds_vect, qpc_path,
TAVOR_ADDRPATH_QP, qp);
if (status != DDI_SUCCESS) {
return (status);
}
portnum = uc->uc_alt_path.cep_hca_port_num;
if (tavor_portnum_is_valid(state, portnum)) {
qpc->alt_addr_path.portnum = portnum;
} else {
return (IBT_HCA_PORT_INVALID);
}
pkeyindx = uc->uc_alt_path.cep_pkey_ix;
if (tavor_pkeyindex_is_valid(state, pkeyindx)) {
qpc->alt_addr_path.pkey_indx = pkeyindx;
} else {
return (IBT_PKEY_IX_ILLEGAL);
}
opmask |= TAVOR_CMD_OP_ALT_PATH;
}
} else {
TAVOR_WARNING(state, "unknown QP transport type in sqd2rts");
return (ibc_get_ci_failure(0));
}
status = tavor_cmn_qp_cmd_post(state, SQD2RTS_QP, qpc, qp->qp_qpnum,
opmask, TAVOR_CMD_NOSLEEP_SPIN);
if (status != TAVOR_CMD_SUCCESS) {
if (status != TAVOR_CMD_BAD_QP_STATE) {
cmn_err(CE_CONT, "Tavor: SQD2RTS_QP command failed: "
"%08x\n", status);
return (ibc_get_ci_failure(0));
} else {
return (IBT_QP_STATE_INVALID);
}
}
return (DDI_SUCCESS);
}
static int
tavor_qp_sqd2sqd(tavor_state_t *state, tavor_qphdl_t qp,
ibt_cep_modify_flags_t flags, ibt_qp_info_t *info_p)
{
tavor_hw_qpc_t *qpc;
ibt_qp_rc_attr_t *rc;
ibt_qp_ud_attr_t *ud;
ibt_qp_uc_attr_t *uc;
tavor_hw_addr_path_t *qpc_path;
ibt_adds_vect_t *adds_vect;
uint_t portnum, pkeyindx;
uint_t rra_max, sra_max;
uint32_t opmask = 0;
int status;
ASSERT(MUTEX_HELD(&qp->qp_lock));
qpc = &qp->qpc;
if (qp->qp_serv_type == TAVOR_QP_UD) {
ud = &info_p->qp_transport.ud;
if (flags & IBT_CEP_SET_PKEY_IX) {
pkeyindx = ud->ud_pkey_ix;
if (tavor_pkeyindex_is_valid(state, pkeyindx)) {
qpc->pri_addr_path.pkey_indx = pkeyindx;
opmask |= TAVOR_CMD_OP_PKEYINDX;
qp->qp_pkeyindx = pkeyindx;
} else {
return (IBT_PKEY_IX_ILLEGAL);
}
}
if (flags & IBT_CEP_SET_QKEY) {
qpc->qkey = ud->ud_qkey;
opmask |= TAVOR_CMD_OP_QKEY;
}
} else if (qp->qp_serv_type == TAVOR_QP_RC) {
rc = &info_p->qp_transport.rc;
opmask |= tavor_check_rdma_enable_flags(flags, info_p, qpc);
if (flags & IBT_CEP_SET_ADDS_VECT) {
qpc_path = &qpc->pri_addr_path;
adds_vect = &rc->rc_path.cep_adds_vect;
status = tavor_set_addr_path(state, adds_vect, qpc_path,
TAVOR_ADDRPATH_QP, qp);
if (status != DDI_SUCCESS) {
return (status);
}
qpc_path->rnr_retry = rc->rc_rnr_retry_cnt;
qpc_path->ack_timeout = rc->rc_path.cep_timeout;
qpc->retry_cnt = rc->rc_retry_cnt;
qpc->mtu = qp->qp_save_mtu;
opmask |= (TAVOR_CMD_OP_PRIM_PATH |
TAVOR_CMD_OP_RETRYCNT | TAVOR_CMD_OP_ACKTIMEOUT |
TAVOR_CMD_OP_PRIM_RNRRETRY);
}
if (flags & IBT_CEP_SET_MIG) {
if (rc->rc_mig_state == IBT_STATE_MIGRATED) {
qpc->pm_state = TAVOR_QP_PMSTATE_MIGRATED;
} else if (rc->rc_mig_state == IBT_STATE_REARMED) {
qpc->pm_state = TAVOR_QP_PMSTATE_REARM;
} else {
return (IBT_QP_APM_STATE_INVALID);
}
opmask |= TAVOR_CMD_OP_PM_STATE;
}
if (flags & IBT_CEP_SET_PKEY_IX) {
pkeyindx = rc->rc_path.cep_pkey_ix;
if (tavor_pkeyindex_is_valid(state, pkeyindx)) {
qpc->pri_addr_path.pkey_indx = pkeyindx;
opmask |= TAVOR_CMD_OP_PKEYINDX;
} else {
return (IBT_PKEY_IX_ILLEGAL);
}
}
if (flags & IBT_CEP_SET_PORT) {
portnum = rc->rc_path.cep_hca_port_num;
if (tavor_portnum_is_valid(state, portnum)) {
qpc->pri_addr_path.portnum = portnum;
} else {
return (IBT_HCA_PORT_INVALID);
}
opmask |= TAVOR_CMD_OP_PRIM_PORT;
}
if (flags & IBT_CEP_SET_ALT_PATH) {
qpc_path = &qpc->alt_addr_path;
adds_vect = &rc->rc_alt_path.cep_adds_vect;
status = tavor_set_addr_path(state, adds_vect, qpc_path,
TAVOR_ADDRPATH_QP, qp);
if (status != DDI_SUCCESS) {
return (status);
}
qpc_path->ack_timeout = rc->rc_alt_path.cep_timeout;
portnum = rc->rc_alt_path.cep_hca_port_num;
if (tavor_portnum_is_valid(state, portnum)) {
qpc->alt_addr_path.portnum = portnum;
} else {
return (IBT_HCA_PORT_INVALID);
}
pkeyindx = rc->rc_alt_path.cep_pkey_ix;
if (tavor_pkeyindex_is_valid(state, pkeyindx)) {
qpc->alt_addr_path.pkey_indx = pkeyindx;
} else {
return (IBT_PKEY_IX_ILLEGAL);
}
opmask |= TAVOR_CMD_OP_ALT_PATH;
}
if (flags & IBT_CEP_SET_RDMARA_OUT) {
if (tavor_qp_validate_init_depth(state, rc,
&sra_max) != DDI_SUCCESS) {
return (IBT_INVALID_PARAM);
}
qpc->sra_max = sra_max;
opmask |= TAVOR_CMD_OP_SRA_SET;
}
if (flags & IBT_CEP_SET_RDMARA_IN) {
if (tavor_qp_validate_resp_rsrc(state, rc,
&rra_max) != DDI_SUCCESS) {
return (IBT_INVALID_PARAM);
}
qpc->rra_max = rra_max;
qpc->ra_buff_indx = qp->qp_rdb_ddraddr >>
TAVOR_RDB_SIZE_SHIFT;
opmask |= TAVOR_CMD_OP_RRA_SET;
}
if (flags & IBT_CEP_SET_TIMEOUT) {
qpc_path = &qpc->pri_addr_path;
qpc_path->ack_timeout = rc->rc_path.cep_timeout;
opmask |= TAVOR_CMD_OP_ACKTIMEOUT;
}
if (flags & IBT_CEP_SET_RETRY) {
qpc->retry_cnt = rc->rc_retry_cnt;
opmask |= TAVOR_CMD_OP_PRIM_RNRRETRY;
}
if (flags & IBT_CEP_SET_RNR_NAK_RETRY) {
qpc_path = &qpc->pri_addr_path;
qpc_path->rnr_retry = rc->rc_rnr_retry_cnt;
opmask |= TAVOR_CMD_OP_RETRYCNT;
}
if (flags & IBT_CEP_SET_MIN_RNR_NAK) {
qpc->min_rnr_nak = rc->rc_min_rnr_nak;
opmask |= TAVOR_CMD_OP_MINRNRNAK;
}
} else if (qp->qp_serv_type == TAVOR_QP_UC) {
uc = &info_p->qp_transport.uc;
if (flags & IBT_CEP_SET_RDMA_W) {
qpc->rwe = (info_p->qp_flags & IBT_CEP_RDMA_WR) ? 1 : 0;
opmask |= TAVOR_CMD_OP_RWE;
}
if (flags & IBT_CEP_SET_ADDS_VECT) {
qpc_path = &qpc->pri_addr_path;
adds_vect = &uc->uc_path.cep_adds_vect;
status = tavor_set_addr_path(state, adds_vect, qpc_path,
TAVOR_ADDRPATH_QP, qp);
if (status != DDI_SUCCESS) {
return (status);
}
qpc->mtu = qp->qp_save_mtu;
opmask |= TAVOR_CMD_OP_PRIM_PATH;
}
if (flags & IBT_CEP_SET_MIG) {
if (uc->uc_mig_state == IBT_STATE_MIGRATED) {
qpc->pm_state = TAVOR_QP_PMSTATE_MIGRATED;
} else if (uc->uc_mig_state == IBT_STATE_REARMED) {
qpc->pm_state = TAVOR_QP_PMSTATE_REARM;
} else {
return (IBT_QP_APM_STATE_INVALID);
}
opmask |= TAVOR_CMD_OP_PM_STATE;
}
if (flags & IBT_CEP_SET_PKEY_IX) {
pkeyindx = uc->uc_path.cep_pkey_ix;
if (tavor_pkeyindex_is_valid(state, pkeyindx)) {
qpc->pri_addr_path.pkey_indx = pkeyindx;
opmask |= TAVOR_CMD_OP_PKEYINDX;
} else {
return (IBT_PKEY_IX_ILLEGAL);
}
}
if (flags & IBT_CEP_SET_ALT_PATH) {
qpc_path = &qpc->alt_addr_path;
adds_vect = &uc->uc_alt_path.cep_adds_vect;
status = tavor_set_addr_path(state, adds_vect, qpc_path,
TAVOR_ADDRPATH_QP, qp);
if (status != DDI_SUCCESS) {
return (status);
}
portnum = uc->uc_alt_path.cep_hca_port_num;
if (tavor_portnum_is_valid(state, portnum)) {
qpc->alt_addr_path.portnum = portnum;
} else {
return (IBT_HCA_PORT_INVALID);
}
pkeyindx = uc->uc_alt_path.cep_pkey_ix;
if (tavor_pkeyindex_is_valid(state, pkeyindx)) {
qpc->alt_addr_path.pkey_indx = pkeyindx;
} else {
return (IBT_PKEY_IX_ILLEGAL);
}
opmask |= TAVOR_CMD_OP_ALT_PATH;
}
} else {
TAVOR_WARNING(state, "unknown QP transport type in sqd2sqd");
return (ibc_get_ci_failure(0));
}
status = tavor_cmn_qp_cmd_post(state, SQD2SQD_QP, qpc, qp->qp_qpnum,
opmask, TAVOR_CMD_NOSLEEP_SPIN);
if (status != TAVOR_CMD_SUCCESS) {
if (status != TAVOR_CMD_BAD_QP_STATE) {
cmn_err(CE_CONT, "Tavor: SQD2SQD_QP command failed: "
"%08x\n", status);
return (ibc_get_ci_failure(0));
} else {
return (IBT_QP_STATE_INVALID);
}
}
return (DDI_SUCCESS);
}
static int
tavor_qp_sqerr2rts(tavor_state_t *state, tavor_qphdl_t qp,
ibt_cep_modify_flags_t flags, ibt_qp_info_t *info_p)
{
tavor_hw_qpc_t *qpc;
ibt_qp_ud_attr_t *ud;
uint32_t opmask = 0;
int status;
ASSERT(MUTEX_HELD(&qp->qp_lock));
qpc = &qp->qpc;
if (qp->qp_serv_type == TAVOR_QP_UD) {
ud = &info_p->qp_transport.ud;
if (flags & IBT_CEP_SET_QKEY) {
qpc->qkey = ud->ud_qkey;
opmask |= TAVOR_CMD_OP_QKEY;
}
} else if (qp->qp_serv_type == TAVOR_QP_UC) {
if (flags & IBT_CEP_SET_RDMA_W) {
qpc->rwe = (info_p->qp_flags & IBT_CEP_RDMA_WR) ? 1 : 0;
opmask |= TAVOR_CMD_OP_RWE;
}
} else {
TAVOR_WARNING(state, "unknown QP transport type in sqerr2rts");
return (ibc_get_ci_failure(0));
}
status = tavor_cmn_qp_cmd_post(state, SQERR2RTS_QP, qpc, qp->qp_qpnum,
opmask, TAVOR_CMD_NOSLEEP_SPIN);
if (status != TAVOR_CMD_SUCCESS) {
if (status != TAVOR_CMD_BAD_QP_STATE) {
cmn_err(CE_CONT, "Tavor: SQERR2RTS_QP command failed: "
"%08x\n", status);
return (ibc_get_ci_failure(0));
} else {
return (IBT_QP_STATE_INVALID);
}
}
return (DDI_SUCCESS);
}
static int
tavor_qp_to_error(tavor_state_t *state, tavor_qphdl_t qp)
{
int status;
ASSERT(MUTEX_HELD(&qp->qp_lock));
status = tavor_cmn_qp_cmd_post(state, TOERR_QP, NULL, qp->qp_qpnum,
0, TAVOR_CMD_NOSLEEP_SPIN);
if (status != TAVOR_CMD_SUCCESS) {
cmn_err(CE_CONT, "Tavor: TOERR_QP command failed: %08x\n",
status);
return (ibc_get_ci_failure(0));
}
return (DDI_SUCCESS);
}
int
tavor_qp_to_reset(tavor_state_t *state, tavor_qphdl_t qp)
{
tavor_hw_qpc_t *qpc;
int status;
ASSERT(MUTEX_HELD(&qp->qp_lock));
qpc = &qp->qpc;
status = tavor_cmn_qp_cmd_post(state, TORST_QP, qpc, qp->qp_qpnum,
0, TAVOR_CMD_NOSLEEP_SPIN);
if (status != TAVOR_CMD_SUCCESS) {
cmn_err(CE_CONT, "Tavor: TORST_QP command failed: %08x\n",
status);
return (ibc_get_ci_failure(0));
}
return (DDI_SUCCESS);
}
static int
tavor_qp_reset2err(tavor_state_t *state, tavor_qphdl_t qp)
{
tavor_hw_qpc_t *qpc;
int status;
ASSERT(MUTEX_HELD(&qp->qp_lock));
qpc = &qp->qpc;
if (qp->qp_is_special) {
qpc->serv_type = TAVOR_QP_MLX;
} else {
qpc->serv_type = qp->qp_serv_type;
}
qpc->pm_state = TAVOR_QP_PMSTATE_MIGRATED;
qpc->de = TAVOR_QP_DESC_EVT_ENABLED;
qpc->sched_q = TAVOR_QP_SCHEDQ_GET(qp->qp_qpnum);
if (qp->qp_is_umap) {
qpc->usr_page = qp->qp_uarpg;
} else {
qpc->usr_page = 0;
}
qpc->pd = qp->qp_pdhdl->pd_pdnum;
qpc->wqe_baseaddr = 0;
qpc->wqe_lkey = qp->qp_mrhdl->mr_lkey;
qpc->ssc = qp->qp_sq_sigtype;
qpc->cqn_snd = qp->qp_sq_cqhdl->cq_cqnum;
qpc->rsc = TAVOR_QP_RQ_ALL_SIGNALED;
qpc->cqn_rcv = qp->qp_rq_cqhdl->cq_cqnum;
qpc->srq_en = qp->qp_srq_en;
if (qp->qp_srq_en == TAVOR_QP_SRQ_ENABLED) {
qpc->srq_number = qp->qp_srqhdl->srq_srqnum;
} else {
qpc->srq_number = 0;
}
if (qp->qp_serv_type == TAVOR_QP_UD) {
qpc->qkey = 0;
qpc->pri_addr_path.portnum = 1;
qpc->pri_addr_path.pkey_indx = 0;
} else if (qp->qp_serv_type == TAVOR_QP_RC) {
qpc->rre = 0;
qpc->rwe = 0;
qpc->rae = 0;
qpc->pri_addr_path.portnum = 1;
qpc->pri_addr_path.pkey_indx = 0;
} else if (qp->qp_serv_type == TAVOR_QP_UC) {
qpc->rwe = 0;
qpc->pri_addr_path.portnum = 1;
qpc->pri_addr_path.pkey_indx = 0;
} else {
TAVOR_WARNING(state, "unknown QP transport type in rst2err");
return (ibc_get_ci_failure(0));
}
status = tavor_cmn_qp_cmd_post(state, RST2INIT_QP, qpc, qp->qp_qpnum,
0, TAVOR_CMD_NOSLEEP_SPIN);
if (status != TAVOR_CMD_SUCCESS) {
cmn_err(CE_CONT, "Tavor: RST2INIT_QP command failed: %08x\n",
status);
return (ibc_get_ci_failure(0));
}
status = tavor_cmn_qp_cmd_post(state, TOERR_QP, NULL, qp->qp_qpnum,
0, TAVOR_CMD_NOSLEEP_SPIN);
if (status != TAVOR_CMD_SUCCESS) {
cmn_err(CE_CONT, "Tavor: TOERR_QP command failed: %08x\n",
status);
if (tavor_qp_to_reset(state, qp) != DDI_SUCCESS) {
TAVOR_WARNING(state, "failed to reset QP context");
}
return (ibc_get_ci_failure(0));
}
return (DDI_SUCCESS);
}
static uint_t
tavor_check_rdma_enable_flags(ibt_cep_modify_flags_t flags,
ibt_qp_info_t *info_p, tavor_hw_qpc_t *qpc)
{
uint_t opmask = 0;
if (flags & IBT_CEP_SET_RDMA_R) {
qpc->rre = (info_p->qp_flags & IBT_CEP_RDMA_RD) ? 1 : 0;
opmask |= TAVOR_CMD_OP_RRE;
}
if (flags & IBT_CEP_SET_RDMA_W) {
qpc->rwe = (info_p->qp_flags & IBT_CEP_RDMA_WR) ? 1 : 0;
opmask |= TAVOR_CMD_OP_RWE;
}
if (flags & IBT_CEP_SET_ATOMIC) {
qpc->rae = (info_p->qp_flags & IBT_CEP_ATOMIC) ? 1 : 0;
opmask |= TAVOR_CMD_OP_RAE;
}
return (opmask);
}
static int
tavor_qp_validate_resp_rsrc(tavor_state_t *state, ibt_qp_rc_attr_t *rc,
uint_t *rra_max)
{
uint_t rdma_ra_in;
rdma_ra_in = rc->rc_rdma_ra_in;
if (rdma_ra_in > state->ts_cfg_profile->cp_hca_max_rdma_in_qp) {
return (IBT_INVALID_PARAM);
}
if (rdma_ra_in == 0) {
rdma_ra_in = 1;
}
if (ISP2(rdma_ra_in)) {
*rra_max = highbit(rdma_ra_in) - 1;
} else {
*rra_max = highbit(rdma_ra_in);
}
return (DDI_SUCCESS);
}
static int
tavor_qp_validate_init_depth(tavor_state_t *state, ibt_qp_rc_attr_t *rc,
uint_t *sra_max)
{
uint_t rdma_ra_out;
rdma_ra_out = rc->rc_rdma_ra_out;
if (rdma_ra_out > state->ts_cfg_profile->cp_hca_max_rdma_out_qp) {
return (IBT_INVALID_PARAM);
}
if (rdma_ra_out == 0) {
rdma_ra_out = 1;
}
if (ISP2(rdma_ra_out)) {
*sra_max = highbit(rdma_ra_out) - 1;
} else {
*sra_max = highbit(rdma_ra_out);
}
return (DDI_SUCCESS);
}
static int
tavor_qp_validate_mtu(tavor_state_t *state, uint_t mtu)
{
if ((mtu == 0) || (mtu > state->ts_cfg_profile->cp_max_mtu)) {
return (IBT_HCA_PORT_MTU_EXCEEDED);
}
return (DDI_SUCCESS);
}