#include <sys/conf.h>
#include <sys/ddi.h>
#include <sys/sunddi.h>
#include <sys/cmn_err.h>
#include <sys/types.h>
#include <sys/kmem.h>
#include <sys/kstat.h>
#include <sys/1394/t1394.h>
#include <sys/1394/s1394.h>
#include <sys/1394/h1394.h>
#include <sys/1394/ieee1394.h>
int s1394_print_guids = 0;
extern void nx1394_undefine_events(s1394_hal_t *hal);
static void s1394_cleanup_node_cfgrom(s1394_hal_t *hal);
void
s1394_cleanup_for_detach(s1394_hal_t *hal, uint_t cleanup_level)
{
switch (cleanup_level) {
case H1394_CLEANUP_LEVEL7:
mutex_enter(&s1394_statep->hal_list_mutex);
if ((s1394_statep->hal_head == hal) &&
(s1394_statep->hal_tail == hal)) {
s1394_statep->hal_head = NULL;
s1394_statep->hal_tail = NULL;
} else {
if (hal->hal_prev)
hal->hal_prev->hal_next = hal->hal_next;
if (hal->hal_next)
hal->hal_next->hal_prev = hal->hal_prev;
if (s1394_statep->hal_head == hal)
s1394_statep->hal_head = hal->hal_next;
if (s1394_statep->hal_tail == hal)
s1394_statep->hal_tail = hal->hal_prev;
}
mutex_exit(&s1394_statep->hal_list_mutex);
case H1394_CLEANUP_LEVEL6:
s1394_destroy_addr_space(hal);
case H1394_CLEANUP_LEVEL5:
s1394_destroy_local_config_rom(hal);
case H1394_CLEANUP_LEVEL4:
(void) s1394_kstat_delete(hal);
case H1394_CLEANUP_LEVEL3:
kmem_free(hal->selfid_buf1, S1394_SELFID_BUF_SIZE);
kmem_free(hal->selfid_buf0, S1394_SELFID_BUF_SIZE);
s1394_destroy_timers(hal);
s1394_destroy_br_thread(hal);
s1394_cleanup_node_cfgrom(hal);
case H1394_CLEANUP_LEVEL2:
cv_destroy(&hal->br_cmplq_cv);
mutex_destroy(&hal->br_cmplq_mutex);
cv_destroy(&hal->br_thread_cv);
mutex_destroy(&hal->br_thread_mutex);
case H1394_CLEANUP_LEVEL1:
(void) ddi_prop_remove_all(hal->halinfo.dip);
nx1394_undefine_events(hal);
case H1394_CLEANUP_LEVEL0:
kmem_cache_destroy(hal->hal_kmem_cachep);
mutex_destroy(&hal->pending_q_mutex);
mutex_destroy(&hal->outstanding_q_mutex);
rw_destroy(&hal->target_list_rwlock);
cv_destroy(&hal->bus_mgr_node_cv);
mutex_destroy(&hal->bus_mgr_node_mutex);
mutex_destroy(&hal->isoch_cec_list_mutex);
mutex_destroy(&hal->cm_timer_mutex);
mutex_destroy(&hal->topology_tree_mutex);
kmem_free(hal, sizeof (s1394_hal_t));
break;
default:
break;
}
}
void
s1394_hal_shutdown(s1394_hal_t *hal, boolean_t disable_hal)
{
ddi_eventcookie_t cookie;
t1394_localinfo_t localinfo;
mutex_enter(&hal->topology_tree_mutex);
if (hal->hal_state == S1394_HAL_SHUTDOWN) {
mutex_exit(&hal->topology_tree_mutex);
if (disable_hal == B_TRUE)
HAL_CALL(hal).shutdown(hal->halinfo.hal_private);
return;
}
hal->hal_state = S1394_HAL_SHUTDOWN;
mutex_exit(&hal->topology_tree_mutex);
if (disable_hal == B_TRUE)
HAL_CALL(hal).shutdown(hal->halinfo.hal_private);
mutex_enter(&hal->topology_tree_mutex);
localinfo.bus_generation = hal->generation_count;
localinfo.local_nodeID = hal->node_id;
mutex_exit(&hal->topology_tree_mutex);
if (ndi_event_retrieve_cookie(hal->hal_ndi_event_hdl, NULL,
DDI_DEVI_REMOVE_EVENT, &cookie, NDI_EVENT_NOPASS) ==
NDI_SUCCESS)
(void) ndi_event_run_callbacks(hal->hal_ndi_event_hdl, NULL,
cookie, &localinfo);
}
void
s1394_initiate_hal_reset(s1394_hal_t *hal, int reason)
{
if (hal->num_bus_reset_till_fail > 0) {
hal->initiated_bus_reset = B_TRUE;
hal->initiated_br_reason = reason;
(void) HAL_CALL(hal).bus_reset(hal->halinfo.hal_private);
} else {
cmn_err(CE_NOTE, "Unable to reenumerate the 1394 bus - If new"
" devices have recently been added, remove them.");
}
}
boolean_t
s1394_on_br_thread(s1394_hal_t *hal)
{
if (hal->br_thread == curthread)
return (B_TRUE);
else
return (B_FALSE);
}
void
s1394_destroy_br_thread(s1394_hal_t *hal)
{
mutex_enter(&hal->br_thread_mutex);
hal->br_thread_ev_type |= BR_THR_GO_AWAY;
cv_signal(&hal->br_thread_cv);
mutex_exit(&hal->br_thread_mutex);
mutex_enter(&hal->bus_mgr_node_mutex);
hal->bus_mgr_node = S1394_INVALID_NODE_NUM;
cv_signal(&hal->bus_mgr_node_cv);
mutex_exit(&hal->bus_mgr_node_mutex);
mutex_enter(&hal->br_cmplq_mutex);
cv_signal(&hal->br_cmplq_cv);
mutex_exit(&hal->br_cmplq_mutex);
while (hal->br_thread_ev_type & BR_THR_GO_AWAY)
delay(drv_usectohz(10));
}
void
s1394_tickle_bus_reset_thread(s1394_hal_t *hal)
{
if (hal->topology_tree_processed != B_TRUE) {
mutex_enter(&hal->br_thread_mutex);
hal->br_thread_ev_type |= BR_THR_CFGROM_SCAN;
cv_signal(&hal->br_thread_cv);
mutex_exit(&hal->br_thread_mutex);
mutex_enter(&hal->br_cmplq_mutex);
cv_signal(&hal->br_cmplq_cv);
mutex_exit(&hal->br_cmplq_mutex);
mutex_enter(&hal->bus_mgr_node_mutex);
cv_signal(&hal->bus_mgr_node_cv);
mutex_exit(&hal->bus_mgr_node_mutex);
}
}
void
s1394_block_on_asynch_cmd(cmd1394_cmd_t *cmd)
{
s1394_cmd_priv_t *s_priv;
s_priv = S1394_GET_CMD_PRIV(cmd);
if (cmd->cmd_options & CMD1394_BLOCKING) {
mutex_enter(&s_priv->blocking_mutex);
while (s_priv->blocking_flag != B_TRUE)
cv_wait(&s_priv->blocking_cv, &s_priv->blocking_mutex);
s_priv->blocking_flag = B_FALSE;
mutex_exit(&s_priv->blocking_mutex);
}
}
int
s1394_HAL_asynch_error(s1394_hal_t *hal, cmd1394_cmd_t *cmd,
s1394_hal_state_t state)
{
ASSERT(MUTEX_HELD(&hal->topology_tree_mutex));
switch (state) {
case S1394_HAL_RESET:
if (hal->disable_requests_bit == 1)
return (CMD1394_ENO_ATREQ);
else
return (CMD1394_CMDSUCCESS);
case S1394_HAL_DREQ:
return (CMD1394_ENO_ATREQ);
case S1394_HAL_SHUTDOWN:
return (CMD1394_EFATAL_ERROR);
default:
return (CMD1394_CMDSUCCESS);
}
}
boolean_t
s1394_mblk_too_small(cmd1394_cmd_t *cmd)
{
mblk_t *curr_blk;
boolean_t flag;
size_t msgb_len;
size_t size;
curr_blk = cmd->cmd_u.b.data_block;
msgb_len = 0;
flag = B_TRUE;
size = cmd->cmd_u.b.blk_length;
while (curr_blk != NULL) {
if (cmd->cmd_type == CMD1394_ASYNCH_WR_BLOCK) {
msgb_len += (curr_blk->b_wptr - curr_blk->b_rptr);
} else {
msgb_len +=
(curr_blk->b_datap->db_lim - curr_blk->b_wptr);
}
if (msgb_len >= size) {
flag = B_FALSE;
break;
}
curr_blk = curr_blk->b_cont;
}
return (flag);
}
boolean_t
s1394_address_rollover(cmd1394_cmd_t *cmd)
{
uint64_t addr_before;
uint64_t addr_after;
size_t length;
switch (cmd->cmd_type) {
case CMD1394_ASYNCH_RD_QUAD:
case CMD1394_ASYNCH_WR_QUAD:
case CMD1394_ASYNCH_LOCK_32:
length = IEEE1394_QUADLET;
break;
case CMD1394_ASYNCH_LOCK_64:
length = IEEE1394_OCTLET;
break;
case CMD1394_ASYNCH_RD_BLOCK:
case CMD1394_ASYNCH_WR_BLOCK:
length = cmd->cmd_u.b.blk_length;
break;
}
addr_before = cmd->cmd_addr & IEEE1394_ADDR_OFFSET_MASK;
addr_after = (addr_before + length) & IEEE1394_ADDR_OFFSET_MASK;
if (addr_after < addr_before) {
return (B_TRUE);
}
return (B_FALSE);
}
uint_t
s1394_stoi(char *p, int len, int base)
{
int n;
int c;
if (len == 0)
return (0);
for (n = 0; len && (c = *p); p++, len--) {
if (c >= '0' && c <= '9')
c = c - '0';
else if (c >= 'a' && c <= 'f')
c = c - 'a' + 10;
else if (c >= 'A' && c <= 'F')
c = c - 'F' + 10;
n = (n * base) + c;
}
return (n);
}
uint_t
s1394_CRC16(uint_t *d, uint_t crc_length)
{
uint_t CRC = 0;
uint_t data;
uint_t next;
uint_t sum;
int shift;
int i;
for (i = 0; i < crc_length; i++) {
data = d[i];
for (next = CRC, shift = 28; shift >= 0; shift -= 4) {
sum = ((next >> 12) ^ (data >> shift)) & 0xF;
next = (next << 4) ^ (sum << 12) ^ (sum << 5) ^ (sum);
}
CRC = next & IEEE1394_CRC16_MASK;
}
return (CRC);
}
uint_t
s1394_CRC16_old(uint_t *d, uint_t crc_length)
{
uint_t CRC = 0;
uint_t data;
uint_t next;
uint_t sum;
int shift;
int i;
for (i = 0; i < crc_length; i++) {
data = d[i];
for (next = CRC, shift = 28; shift > 0; shift -= 4) {
sum = ((next >> 12) ^ (data >> shift)) & 0xF;
next = (next << 4) ^ (sum << 12) ^ (sum << 5) ^ (sum);
}
CRC = next & IEEE1394_CRC16_MASK;
}
return (CRC);
}
int
s1394_ioctl(s1394_hal_t *hal, int cmd, intptr_t arg, int mode, cred_t *cred_p,
int *rval_p)
{
struct devctl_iocdata *dcp;
dev_info_t *self;
int rv = 0;
self = hal->halinfo.dip;
switch (cmd) {
case DEVCTL_DEVICE_GETSTATE:
case DEVCTL_DEVICE_ONLINE:
case DEVCTL_DEVICE_OFFLINE:
case DEVCTL_DEVICE_REMOVE:
case DEVCTL_BUS_GETSTATE:
return (ndi_devctl_ioctl(self, cmd, arg, mode, 0));
}
if (ndi_dc_allochdl((void *)arg, &dcp) != NDI_SUCCESS) {
return (EFAULT);
}
switch (cmd) {
case DEVCTL_DEVICE_RESET:
case DEVCTL_DEVICE_REMOVE:
rv = ENOTSUP;
break;
case DEVCTL_BUS_CONFIGURE:
case DEVCTL_BUS_UNCONFIGURE:
rv = ENOTSUP;
break;
case DEVCTL_BUS_QUIESCE:
case DEVCTL_BUS_UNQUIESCE:
rv = ENOTSUP;
break;
case DEVCTL_BUS_RESET:
case DEVCTL_BUS_RESETALL:
if (hal->halinfo.phy == H1394_PHY_1394A) {
(void) HAL_CALL(hal).short_bus_reset(
hal->halinfo.hal_private);
} else {
(void)
HAL_CALL(hal).bus_reset(hal->halinfo.hal_private);
}
break;
default:
rv = ENOTTY;
}
ndi_dc_freehdl(dcp);
return (rv);
}
int
s1394_kstat_init(s1394_hal_t *hal)
{
int instance;
hal->hal_kstats = (s1394_kstat_t *)kmem_zalloc(sizeof (s1394_kstat_t),
KM_SLEEP);
instance = ddi_get_instance(hal->halinfo.dip);
hal->hal_ksp = kstat_create("s1394", instance, "stats", "misc",
KSTAT_TYPE_RAW, sizeof (s1394_kstat_t), KSTAT_FLAG_VIRTUAL);
if (hal->hal_ksp != NULL) {
hal->hal_ksp->ks_private = (void *)hal;
hal->hal_ksp->ks_update = s1394_kstat_update;
kstat_install(hal->hal_ksp);
return (DDI_SUCCESS);
} else {
kmem_free((void *)hal->hal_kstats, sizeof (s1394_kstat_t));
return (DDI_FAILURE);
}
}
int
s1394_kstat_delete(s1394_hal_t *hal)
{
kstat_delete(hal->hal_ksp);
kmem_free((void *)hal->hal_kstats, sizeof (s1394_kstat_t));
return (DDI_SUCCESS);
}
int
s1394_kstat_update(kstat_t *ksp, int rw)
{
s1394_hal_t *hal;
hal = ksp->ks_private;
if (rw == KSTAT_WRITE) {
return (EACCES);
} else {
ksp->ks_data = hal->hal_kstats;
}
return (0);
}
void
s1394_addr_alloc_kstat(s1394_hal_t *hal, uint64_t addr)
{
if (s1394_is_posted_write(hal, addr) == B_TRUE)
hal->hal_kstats->addr_posted_alloc++;
else if (s1394_is_normal_addr(hal, addr) == B_TRUE)
hal->hal_kstats->addr_normal_alloc++;
else if (s1394_is_csr_addr(hal, addr) == B_TRUE)
hal->hal_kstats->addr_csr_alloc++;
else if (s1394_is_physical_addr(hal, addr) == B_TRUE)
hal->hal_kstats->addr_phys_alloc++;
}
void
s1394_print_node_info(s1394_hal_t *hal)
{
int i, j;
uint_t hal_node_num;
char str[200], tmp[200];
extern void log_enter(void);
extern void log_exit(void);
if (s1394_print_guids == 0)
return;
hal_node_num = IEEE1394_NODE_NUM(hal->node_id);
log_enter();
cmn_err(CE_CONT, "Speed Map (%d):\n",
ddi_get_instance(hal->halinfo.dip));
(void) strcpy(str, " |");
for (i = 0; i < hal->number_of_nodes; i++) {
(void) sprintf(tmp, " %2d ", i);
(void) strcat(str, tmp);
}
(void) strcat(str, " | GUID\n");
cmn_err(CE_CONT, str);
(void) strcpy(str, "----|");
for (i = 0; i < hal->number_of_nodes; i++) {
(void) sprintf(tmp, "----");
(void) strcat(str, tmp);
}
(void) strcat(str, "--|------------------\n");
cmn_err(CE_CONT, str);
for (i = 0; i < hal->number_of_nodes; i++) {
(void) sprintf(str, " %2d |", i);
for (j = 0; j < hal->number_of_nodes; j++) {
(void) sprintf(tmp, " %3d", hal->speed_map[i][j]);
(void) strcat(str, tmp);
}
if (i == hal_node_num) {
(void) strcat(str, " | Local OHCI Card\n");
} else if (CFGROM_BIB_READ(&hal->topology_tree[i])) {
(void) sprintf(tmp, " | %08x%08x\n",
hal->topology_tree[i].node_guid_hi,
hal->topology_tree[i].node_guid_lo);
(void) strcat(str, tmp);
} else if (hal->topology_tree[i].link_active == 0) {
(void) strcat(str, " | Link off\n");
} else {
(void) strcat(str, " | ????????????????\n");
}
cmn_err(CE_CONT, str);
}
cmn_err(CE_CONT, "\n");
log_exit();
}
s1394_hal_t *
s1394_dip_to_hal(dev_info_t *hal_dip)
{
s1394_hal_t *current_hal = NULL;
mutex_enter(&s1394_statep->hal_list_mutex);
current_hal = s1394_statep->hal_head;
while (current_hal != NULL) {
if (current_hal->halinfo.dip == hal_dip) {
break;
}
current_hal = current_hal->hal_next;
}
mutex_exit(&s1394_statep->hal_list_mutex);
return (current_hal);
}
s1394_target_t *
s1394_target_from_dip_locked(s1394_hal_t *hal, dev_info_t *tdip)
{
s1394_target_t *temp;
temp = hal->target_head;
while (temp != NULL) {
if (temp->target_dip == tdip) {
return (temp);
}
temp = temp->target_next;
}
return (NULL);
}
s1394_target_t *
s1394_target_from_dip(s1394_hal_t *hal, dev_info_t *tdip)
{
s1394_target_t *target;
rw_enter(&hal->target_list_rwlock, RW_READER);
target = s1394_target_from_dip_locked(hal, tdip);
rw_exit(&hal->target_list_rwlock);
return (target);
}
void
s1394_destroy_timers(s1394_hal_t *hal)
{
(void) untimeout(hal->bus_mgr_timeout_id);
(void) untimeout(hal->bus_mgr_query_timeout_id);
(void) untimeout(hal->cm_timer);
while (hal->config_rom_timer_set == B_TRUE) {
delay(drv_usectohz(10));
}
}
static void
s1394_cleanup_node_cfgrom(s1394_hal_t *hal)
{
uint32_t *cfgrom;
int i;
for (i = 0; i < IEEE1394_MAX_NODES; i++) {
if ((cfgrom = hal->topology_tree[i].cfgrom) != NULL)
kmem_free(cfgrom, IEEE1394_CONFIG_ROM_SZ);
}
}
void
s1394_cycle_too_long_callback(void *arg)
{
s1394_hal_t *hal;
ushort_t root_node_num;
ushort_t hal_node_num;
uint32_t data;
uint_t offset;
hal = (s1394_hal_t *)arg;
mutex_enter(&hal->topology_tree_mutex);
mutex_enter(&hal->cm_timer_mutex);
hal->cm_timer_set = B_FALSE;
mutex_exit(&hal->cm_timer_mutex);
root_node_num = hal->number_of_nodes - 1;
hal_node_num = IEEE1394_NODE_NUM(hal->node_id);
mutex_exit(&hal->topology_tree_mutex);
if (hal_node_num == root_node_num) {
data = IEEE1394_CSR_STATE_CMSTR;
offset = (IEEE1394_CSR_STATE_SET & IEEE1394_CSR_OFFSET_MASK);
(void) HAL_CALL(hal).csr_write(hal->halinfo.hal_private,
offset, data);
}
}