/*
 * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
 * Use is subject to license terms.
 */

/*
 * Copyright (c) 2008 Atheros Communications Inc.
 *
 * Permission to use, copy, modify, and/or distribute this software for any
 * purpose with or without fee is hereby granted, provided that the above
 * copyright notice and this permission notice appear in all copies.
 *
 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 */

#ifndef _ARN_REGD_COMMON_H
#define _ARN_REGD_COMMON_H

#ifdef __cplusplus
extern "C" {
#endif

enum EnumRd {
        NO_ENUMRD =     0x00,
        NULL1_WORLD =   0x03,
        NULL1_ETSIB =   0x07,
        NULL1_ETSIC =   0x08,
        FCC1_FCCA =     0x10,
        FCC1_WORLD =    0x11,
        FCC4_FCCA =     0x12,
        FCC5_FCCA =     0x13,
        FCC6_FCCA =     0x14,

        FCC2_FCCA =     0x20,
        FCC2_WORLD =    0x21,
        FCC2_ETSIC =    0x22,
        FCC6_WORLD =    0x23,
        FRANCE_RES =    0x31,
        FCC3_FCCA =     0x3A,
        FCC3_WORLD =    0x3B,

        ETSI1_WORLD =   0x37,
        ETSI3_ETSIA =   0x32,
        ETSI2_WORLD =   0x35,
        ETSI3_WORLD =   0x36,
        ETSI4_WORLD =   0x30,
        ETSI4_ETSIC =   0x38,
        ETSI5_WORLD =   0x39,
        ETSI6_WORLD =   0x34,
        ETSI_RESERVED = 0x33,

        MKK1_MKKA =     0x40,
        MKK1_MKKB =     0x41,
        APL4_WORLD =    0x42,
        MKK2_MKKA =     0x43,
        APL_RESERVED =  0x44,
        APL2_WORLD =    0x45,
        APL2_APLC =     0x46,
        APL3_WORLD =    0x47,
        MKK1_FCCA =     0x48,
        APL2_APLD =     0x49,
        MKK1_MKKA1 =    0x4A,
        MKK1_MKKA2 =    0x4B,
        MKK1_MKKC =     0x4C,

        APL3_FCCA =     0x50,
        APL1_WORLD =    0x52,
        APL1_FCCA =     0x53,
        APL1_APLA =     0x54,
        APL1_ETSIC =    0x55,
        APL2_ETSIC =    0x56,
        APL5_WORLD =    0x58,
        APL6_WORLD =    0x5B,
        APL7_FCCA =     0x5C,
        APL8_WORLD =    0x5D,
        APL9_WORLD =    0x5E,

        WOR0_WORLD =    0x60,
        WOR1_WORLD =    0x61,
        WOR2_WORLD =    0x62,
        WOR3_WORLD =    0x63,
        WOR4_WORLD =    0x64,
        WOR5_ETSIC =    0x65,

        WOR01_WORLD =   0x66,
        WOR02_WORLD =   0x67,
        EU1_WORLD =     0x68,

        WOR9_WORLD =    0x69,
        WORA_WORLD =    0x6A,
        WORB_WORLD =    0x6B,

        MKK3_MKKB =     0x80,
        MKK3_MKKA2 =    0x81,
        MKK3_MKKC =     0x82,

        MKK4_MKKB =     0x83,
        MKK4_MKKA2 =    0x84,
        MKK4_MKKC =     0x85,

        MKK5_MKKB =     0x86,
        MKK5_MKKA2 =    0x87,
        MKK5_MKKC =     0x88,

        MKK6_MKKB =     0x89,
        MKK6_MKKA2 =    0x8A,
        MKK6_MKKC =     0x8B,

        MKK7_MKKB =     0x8C,
        MKK7_MKKA2 =    0x8D,
        MKK7_MKKC =     0x8E,

        MKK8_MKKB =     0x8F,
        MKK8_MKKA2 =    0x90,
        MKK8_MKKC =     0x91,

        MKK14_MKKA1 =   0x92,
        MKK15_MKKA1 =   0x93,

        MKK10_FCCA =    0xD0,
        MKK10_MKKA1 =   0xD1,
        MKK10_MKKC =    0xD2,
        MKK10_MKKA2 =   0xD3,

        MKK11_MKKA =    0xD4,
        MKK11_FCCA =    0xD5,
        MKK11_MKKA1 =   0xD6,
        MKK11_MKKC =    0xD7,
        MKK11_MKKA2 =   0xD8,

        MKK12_MKKA =    0xD9,
        MKK12_FCCA =    0xDA,
        MKK12_MKKA1 =   0xDB,
        MKK12_MKKC =    0xDC,
        MKK12_MKKA2 =   0xDD,

        MKK13_MKKB =    0xDE,

        MKK3_MKKA =     0xF0,
        MKK3_MKKA1 =    0xF1,
        MKK3_FCCA =     0xF2,
        MKK4_MKKA =     0xF3,
        MKK4_MKKA1 =    0xF4,
        MKK4_FCCA =     0xF5,
        MKK9_MKKA =     0xF6,
        MKK10_MKKA =    0xF7,
        MKK6_MKKA1 =    0xF8,
        MKK6_FCCA =     0xF9,
        MKK7_MKKA1 =    0xFA,
        MKK7_FCCA =     0xFB,
        MKK9_FCCA =     0xFC,
        MKK9_MKKA1 =    0xFD,
        MKK9_MKKC =     0xFE,
        MKK9_MKKA2 =    0xFF,

        APL1 =  0x0150,
        APL2 =  0x0250,
        APL3 =  0x0350,
        APL4 =  0x0450,
        APL5 =  0x0550,
        APL6 =  0x0650,
        APL7 =  0x0750,
        APL8 =  0x0850,
        APL9 =  0x0950,
        APL10 = 0x1050,

        ETSI1 = 0x0130,
        ETSI2 = 0x0230,
        ETSI3 = 0x0330,
        ETSI4 = 0x0430,
        ETSI5 = 0x0530,
        ETSI6 = 0x0630,
        ETSIA = 0x0A30,
        ETSIB = 0x0B30,
        ETSIC = 0x0C30,

        FCC1 =  0x0110,
        FCC2 =  0x0120,
        FCC3 =  0x0160,
        FCC4 =  0x0165,
        FCC5 =  0x0510,
        FCC6 =  0x0610,
        FCCA =  0x0A10,

        APLD =  0x0D50,

        MKK1 =  0x0140,
        MKK2 =  0x0240,
        MKK3 =  0x0340,
        MKK4 =  0x0440,
        MKK5 =  0x0540,
        MKK6 =  0x0640,
        MKK7 =  0x0740,
        MKK8 =  0x0840,
        MKK9 =  0x0940,
        MKK10 = 0x0B40,
        MKK11 = 0x1140,
        MKK12 = 0x1240,
        MKK13 = 0x0C40,
        MKK14 = 0x1440,
        MKK15 = 0x1540,
        MKKA =  0x0A40,
        MKKC =  0x0A50,

        NULL1 = 0x0198,
        WORLD = 0x0199,
        DEBUG_REG_DMN = 0x01ff,
};

enum {
        FCC =   0x10,
        MKK =   0x40,
        ETSI =  0x30,
};

enum {
        NO_REQ = 0x00000000,
        DISALLOW_ADHOC_11A = 0x00000001,
        DISALLOW_ADHOC_11A_TURB = 0x00000002,
        NEED_NFC = 0x00000004,

        ADHOC_PER_11D = 0x00000008,
        ADHOC_NO_11A = 0x00000010,

        PUBLIC_SAFETY_DOMAIN = 0x00000020,
        LIMIT_FRAME_4MS = 0x00000040,

        NO_HOSTAP = 0x00000080,

        REQ_MASK = 0x000000FF,
};

#define REG_DOMAIN_2GHZ_MASK    (REQ_MASK & \
        (~(ADHOC_NO_11A | DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB)))
#define REG_DOMAIN_5GHZ_MASK    REQ_MASK

static struct reg_dmn_pair_mapping regDomainPairs[] = {
        {NO_ENUMRD, DEBUG_REG_DMN, DEBUG_REG_DMN, NO_REQ, NO_REQ,
            PSCAN_DEFER, 0},
        {NULL1_WORLD, NULL1, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
        {NULL1_ETSIB, NULL1, ETSIB, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
        {NULL1_ETSIC, NULL1, ETSIC, NO_REQ, NO_REQ, PSCAN_DEFER, 0},

        {FCC2_FCCA, FCC2, FCCA, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
        {FCC2_WORLD, FCC2, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
        {FCC2_ETSIC, FCC2, ETSIC, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
        {FCC3_FCCA, FCC3, FCCA, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
        {FCC3_WORLD, FCC3, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
        {FCC4_FCCA, FCC4, FCCA,
            DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER,
            0},
        {FCC5_FCCA, FCC5, FCCA, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
        {FCC6_FCCA, FCC6, FCCA, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
        {FCC6_WORLD, FCC6, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0},

        {ETSI1_WORLD, ETSI1, WORLD,
            DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER,
            0},
        {ETSI2_WORLD, ETSI2, WORLD,
            DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER,
            0},
        {ETSI3_WORLD, ETSI3, WORLD,
            DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER,
            0},
        {ETSI4_WORLD, ETSI4, WORLD,
            DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER,
            0},
        {ETSI5_WORLD, ETSI5, WORLD,
            DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER,
            0},
        {ETSI6_WORLD, ETSI6, WORLD,
            DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER,
            0},

        {ETSI3_ETSIA, ETSI3, WORLD,
            DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER,
            0},
        {FRANCE_RES, ETSI3, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0},

        {FCC1_WORLD, FCC1, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
        {FCC1_FCCA, FCC1, FCCA, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
        {APL1_WORLD, APL1, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
        {APL2_WORLD, APL2, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
        {APL3_WORLD, APL3, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
        {APL4_WORLD, APL4, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
        {APL5_WORLD, APL5, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
        {APL6_WORLD, APL6, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
        {APL8_WORLD, APL8, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
        {APL9_WORLD, APL9, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0},

        {APL3_FCCA, APL3, FCCA, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
        {APL1_ETSIC, APL1, ETSIC, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
        {APL2_ETSIC, APL2, ETSIC, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
        {APL2_APLD, APL2, APLD, NO_REQ, NO_REQ, PSCAN_DEFER, },

        {MKK1_MKKA, MKK1, MKKA,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKK1 | PSCAN_MKKA, CTRY_JAPAN},
        {MKK1_MKKB, MKK1, MKKA,
            DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC |
            LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK1 | PSCAN_MKKA | PSCAN_MKKA_G,
            CTRY_JAPAN1},
        {MKK1_FCCA, MKK1, FCCA,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKK1, CTRY_JAPAN2},
        {MKK1_MKKA1, MKK1, MKKA,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKK1 | PSCAN_MKKA1 | PSCAN_MKKA1_G, CTRY_JAPAN4},
        {MKK1_MKKA2, MKK1, MKKA,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKK1 | PSCAN_MKKA2 | PSCAN_MKKA2_G, CTRY_JAPAN5},
        {MKK1_MKKC, MKK1, MKKC,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKK1, CTRY_JAPAN6},

        {MKK2_MKKA, MKK2, MKKA,
            DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC |
            LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK2 | PSCAN_MKKA | PSCAN_MKKA_G,
            CTRY_JAPAN3},

        {MKK3_MKKA, MKK3, MKKA,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKKA, CTRY_JAPAN25},
        {MKK3_MKKB, MKK3, MKKA,
            DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC |
            LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKKA | PSCAN_MKKA_G,
            CTRY_JAPAN7},
        {MKK3_MKKA1, MKK3, MKKA,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKKA1 | PSCAN_MKKA1_G, CTRY_JAPAN26},
        {MKK3_MKKA2, MKK3, MKKA,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKKA2 | PSCAN_MKKA2_G, CTRY_JAPAN8},
        {MKK3_MKKC, MKK3, MKKC,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            NO_PSCAN, CTRY_JAPAN9},
        {MKK3_FCCA, MKK3, FCCA,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            NO_PSCAN, CTRY_JAPAN27},

        {MKK4_MKKA, MKK4, MKKA,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKK3, CTRY_JAPAN36},
        {MKK4_MKKB, MKK4, MKKA,
            DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC |
            LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK3 | PSCAN_MKKA | PSCAN_MKKA_G,
            CTRY_JAPAN10},
        {MKK4_MKKA1, MKK4, MKKA,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKK3 | PSCAN_MKKA1 | PSCAN_MKKA1_G, CTRY_JAPAN28},
        {MKK4_MKKA2, MKK4, MKKA,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKK3 | PSCAN_MKKA2 | PSCAN_MKKA2_G, CTRY_JAPAN11},
        {MKK4_MKKC, MKK4, MKKC,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKK3, CTRY_JAPAN12},
        {MKK4_FCCA, MKK4, FCCA,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKK3, CTRY_JAPAN29},

        {MKK5_MKKB, MKK5, MKKA,
            DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC |
            LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK3 | PSCAN_MKKA | PSCAN_MKKA_G,
            CTRY_JAPAN13},
        {MKK5_MKKA2, MKK5, MKKA,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKK3 | PSCAN_MKKA2 | PSCAN_MKKA2_G, CTRY_JAPAN14},
        {MKK5_MKKC, MKK5, MKKC,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKK3, CTRY_JAPAN15},

        {MKK6_MKKB, MKK6, MKKA,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKK1 | PSCAN_MKKA | PSCAN_MKKA_G, CTRY_JAPAN16},
        {MKK6_MKKA1, MKK6, MKKA,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKK1 | PSCAN_MKKA1 | PSCAN_MKKA1_G, CTRY_JAPAN30},
        {MKK6_MKKA2, MKK6, MKKA,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKK1 | PSCAN_MKKA2 | PSCAN_MKKA2_G, CTRY_JAPAN17},
        {MKK6_MKKC, MKK6, MKKC,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKK1, CTRY_JAPAN18},
        {MKK6_FCCA, MKK6, FCCA,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            NO_PSCAN, CTRY_JAPAN31},

        {MKK7_MKKB, MKK7, MKKA,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKK1 | PSCAN_MKK3 | PSCAN_MKKA | PSCAN_MKKA_G,
            CTRY_JAPAN19},
        {MKK7_MKKA1, MKK7, MKKA,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKK1 | PSCAN_MKKA1 | PSCAN_MKKA1_G, CTRY_JAPAN32},
        {MKK7_MKKA2, MKK7, MKKA,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKK1 | PSCAN_MKK3 | PSCAN_MKKA2 | PSCAN_MKKA2_G,
            CTRY_JAPAN20},
        {MKK7_MKKC, MKK7, MKKC,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKK1 | PSCAN_MKK3, CTRY_JAPAN21},
        {MKK7_FCCA, MKK7, FCCA,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKK1 | PSCAN_MKK3, CTRY_JAPAN33},

        {MKK8_MKKB, MKK8, MKKA,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKK1 | PSCAN_MKK3 | PSCAN_MKKA | PSCAN_MKKA_G,
            CTRY_JAPAN22},
        {MKK8_MKKA2, MKK8, MKKA,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKK1 | PSCAN_MKK3 | PSCAN_MKKA2 | PSCAN_MKKA2_G,
            CTRY_JAPAN23},
        {MKK8_MKKC, MKK8, MKKC,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKK1 | PSCAN_MKK3, CTRY_JAPAN24},

        {MKK9_MKKA, MKK9, MKKA,
            DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC |
            LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKK2 | PSCAN_MKK3 | PSCAN_MKKA | PSCAN_MKKA_G,
            CTRY_JAPAN34},
        {MKK9_FCCA, MKK9, FCCA,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            NO_PSCAN, CTRY_JAPAN37},
        {MKK9_MKKA1, MKK9, MKKA,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKKA1 | PSCAN_MKKA1_G, CTRY_JAPAN38},
        {MKK9_MKKA2, MKK9, MKKA,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKKA2 | PSCAN_MKKA2_G, CTRY_JAPAN40},
        {MKK9_MKKC, MKK9, MKKC,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            NO_PSCAN, CTRY_JAPAN39},

        {MKK10_MKKA, MKK10, MKKA,
            DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC |
            LIMIT_FRAME_4MS, NEED_NFC, PSCAN_MKK2 | PSCAN_MKK3, CTRY_JAPAN35},
        {MKK10_FCCA, MKK10, FCCA,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            NO_PSCAN, CTRY_JAPAN41},
        {MKK10_MKKA1, MKK10, MKKA,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKKA1 | PSCAN_MKKA1_G, CTRY_JAPAN42},
        {MKK10_MKKA2, MKK10, MKKA,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKKA2 | PSCAN_MKKA2_G, CTRY_JAPAN44},
        {MKK10_MKKC, MKK10, MKKC,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            NO_PSCAN, CTRY_JAPAN43},

        {MKK11_MKKA, MKK11, MKKA,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKK3, CTRY_JAPAN45},
        {MKK11_FCCA, MKK11, FCCA,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKK3, CTRY_JAPAN46},
        {MKK11_MKKA1, MKK11, MKKA,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKK3 | PSCAN_MKKA1 | PSCAN_MKKA1_G, CTRY_JAPAN47},
        {MKK11_MKKA2, MKK11, MKKA,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKK3 | PSCAN_MKKA2 | PSCAN_MKKA2_G, CTRY_JAPAN49},
        {MKK11_MKKC, MKK11, MKKC,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKK3, CTRY_JAPAN48},

        {MKK12_MKKA, MKK12, MKKA,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKK1 | PSCAN_MKK3, CTRY_JAPAN50},
        {MKK12_FCCA, MKK12, FCCA,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKK1 | PSCAN_MKK3, CTRY_JAPAN51},
        {MKK12_MKKA1, MKK12, MKKA,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKK1 | PSCAN_MKK3 | PSCAN_MKKA1 | PSCAN_MKKA1_G,
            CTRY_JAPAN52},
        {MKK12_MKKA2, MKK12, MKKA,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKK1 | PSCAN_MKK3 | PSCAN_MKKA2 | PSCAN_MKKA2_G,
            CTRY_JAPAN54},
        {MKK12_MKKC, MKK12, MKKC,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKK1 | PSCAN_MKK3, CTRY_JAPAN53},

        {MKK13_MKKB, MKK13, MKKA,
            DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC |
            LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKK1 | PSCAN_MKK3 | PSCAN_MKKA | PSCAN_MKKA_G,
            CTRY_JAPAN57},

        {MKK14_MKKA1, MKK14, MKKA,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKK1 | PSCAN_MKKA1 | PSCAN_MKKA1_G, CTRY_JAPAN58},
        {MKK15_MKKA1, MKK15, MKKA,
            DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS, NEED_NFC,
            PSCAN_MKK1 | PSCAN_MKKA1 | PSCAN_MKKA1_G, CTRY_JAPAN59},

        {WOR0_WORLD, WOR0_WORLD, WOR0_WORLD, NO_REQ, NO_REQ, PSCAN_DEFER,
            0},
        {WOR1_WORLD, WOR1_WORLD, WOR1_WORLD,
            DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER,
            0},
        {WOR2_WORLD, WOR2_WORLD, WOR2_WORLD, DISALLOW_ADHOC_11A_TURB,
            NO_REQ, PSCAN_DEFER, 0},
        {WOR3_WORLD, WOR3_WORLD, WOR3_WORLD, NO_REQ, NO_REQ, PSCAN_DEFER,
            0},
        {WOR4_WORLD, WOR4_WORLD, WOR4_WORLD,
            DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER,
            0},
        {WOR5_ETSIC, WOR5_ETSIC, WOR5_ETSIC,
            DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER,
            0},
        {WOR01_WORLD, WOR01_WORLD, WOR01_WORLD, NO_REQ, NO_REQ,
            PSCAN_DEFER, 0},
        {WOR02_WORLD, WOR02_WORLD, WOR02_WORLD, NO_REQ, NO_REQ,
            PSCAN_DEFER, 0},
        {EU1_WORLD, EU1_WORLD, EU1_WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, 0},
        {WOR9_WORLD, WOR9_WORLD, WOR9_WORLD,
            DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER,
            0},
        {WORA_WORLD, WORA_WORLD, WORA_WORLD,
            DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER,
            0},
        {WORB_WORLD, WORB_WORLD, WORB_WORLD,
            DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB, NO_REQ, PSCAN_DEFER,
            0},
};

#define NO_INTERSECT_REQ        0xFFFFFFFF
#define NO_UNION_REQ            0

static struct country_code_to_enum_rd allCountries[] = {
        {CTRY_DEBUG, NO_ENUMRD, "DB", "DEBUG", YES, YES, YES, YES, YES,
            YES, YES, 7000},
        {CTRY_DEFAULT, DEF_REGDMN, "NA", "NO_COUNTRY_SET", YES, YES, YES,
            YES, YES, YES, YES, 7000},
        {CTRY_ALBANIA, NULL1_WORLD, "AL", "ALBANIA", YES, NO, YES, YES, NO,
            NO, NO, 7000},
        {CTRY_ALGERIA, NULL1_WORLD, "DZ", "ALGERIA", YES, NO, YES, YES, NO,
            NO, NO, 7000},
        {CTRY_ARGENTINA, APL3_WORLD, "AR", "ARGENTINA", YES, NO, NO, YES,
            NO, YES, NO, 7000},
        {CTRY_ARMENIA, ETSI4_WORLD, "AM", "ARMENIA", YES, NO, YES, YES,
            YES, NO, NO, 7000},
        {CTRY_AUSTRALIA, FCC2_WORLD, "AU", "AUSTRALIA", YES, YES, YES, YES,
            YES, YES, YES, 7000},
        {CTRY_AUSTRALIA2, FCC6_WORLD, "AU", "AUSTRALIA2", YES, YES, YES,
            YES, YES, YES, YES, 7000},
        {CTRY_AUSTRIA, ETSI1_WORLD, "AT", "AUSTRIA", YES, NO, YES, YES,
            YES, YES, YES, 7000},
        {CTRY_AZERBAIJAN, ETSI4_WORLD, "AZ", "AZERBAIJAN", YES, YES, YES,
            YES, YES, YES, YES, 7000},
        {CTRY_BAHRAIN, APL6_WORLD, "BH", "BAHRAIN", YES, NO, YES, YES, YES,
            YES, NO, 7000},
        {CTRY_BELARUS, ETSI1_WORLD, "BY", "BELARUS", YES, NO, YES, YES,
            YES, YES, YES, 7000},
        {CTRY_BELGIUM, ETSI1_WORLD, "BE", "BELGIUM", YES, NO, YES, YES,
            YES, YES, YES, 7000},
        {CTRY_BELGIUM2, ETSI4_WORLD, "BL", "BELGIUM", YES, NO, YES, YES,
            YES, YES, YES, 7000},
        {CTRY_BELIZE, APL1_ETSIC, "BZ", "BELIZE", YES, YES, YES, YES, YES,
            YES, YES, 7000},
        {CTRY_BOLIVIA, APL1_ETSIC, "BO", "BOLVIA", YES, YES, YES, YES, YES,
            YES, YES, 7000},
        {CTRY_BOSNIA_HERZ, ETSI1_WORLD, "BA", "BOSNIA_HERZGOWINA", YES, NO,
            YES, YES, YES, YES, NO, 7000},
        {CTRY_BRAZIL, FCC3_WORLD, "BR", "BRAZIL", YES, NO, NO, YES, NO,
            YES, NO, 7000},
        {CTRY_BRUNEI_DARUSSALAM, APL1_WORLD, "BN", "BRUNEI DARUSSALAM",
            YES, YES, YES, YES, YES, YES, YES, 7000},
        {CTRY_BULGARIA, ETSI6_WORLD, "BG", "BULGARIA", YES, NO, YES, YES,
            YES, YES, YES, 7000},
        {CTRY_CANADA, FCC2_FCCA, "CA", "CANADA", YES, YES, YES, YES, YES,
            YES, YES, 7000},
        {CTRY_CANADA2, FCC6_FCCA, "CA", "CANADA2", YES, YES, YES, YES, YES,
            YES, YES, 7000},
        {CTRY_CHILE, APL6_WORLD, "CL", "CHILE", YES, YES, YES, YES, YES,
            YES, YES, 7000},
        {CTRY_CHINA, APL1_WORLD, "CN", "CHINA", YES, YES, YES, YES, YES,
            YES, YES, 7000},
        {CTRY_COLOMBIA, FCC1_FCCA, "CO", "COLOMBIA", YES, NO, YES, YES,
            YES, YES, NO, 7000},
        {CTRY_COSTA_RICA, FCC1_WORLD, "CR", "COSTA RICA", YES, NO, YES,
            YES, YES, YES, NO, 7000},
        {CTRY_CROATIA, ETSI3_WORLD, "HR", "CROATIA", YES, NO, YES, YES,
            YES, YES, NO, 7000},
        {CTRY_CYPRUS, ETSI1_WORLD, "CY", "CYPRUS", YES, YES, YES, YES, YES,
            YES, YES, 7000},
        {CTRY_CZECH, ETSI3_WORLD, "CZ", "CZECH REPUBLIC", YES, NO, YES,
            YES, YES, YES, YES, 7000},
        {CTRY_DENMARK, ETSI1_WORLD, "DK", "DENMARK", YES, NO, YES, YES,
            YES, YES, YES, 7000},
        {CTRY_DOMINICAN_REPUBLIC, FCC1_FCCA, "DO", "DOMINICAN REPUBLIC",
            YES, YES, YES, YES, YES, YES, YES, 7000},
        {CTRY_ECUADOR, FCC1_WORLD, "EC", "ECUADOR", YES, NO, NO, YES, YES,
            YES, NO, 7000},
        {CTRY_EGYPT, ETSI3_WORLD, "EG", "EGYPT", YES, NO, YES, YES, YES,
            YES, NO, 7000},
        {CTRY_EL_SALVADOR, FCC1_WORLD, "SV", "EL SALVADOR", YES, NO, YES,
            YES, YES, YES, NO, 7000},
        {CTRY_ESTONIA, ETSI1_WORLD, "EE", "ESTONIA", YES, NO, YES, YES,
            YES, YES, YES, 7000},
        {CTRY_FINLAND, ETSI1_WORLD, "FI", "FINLAND", YES, NO, YES, YES,
            YES, YES, YES, 7000},
        {CTRY_FRANCE, ETSI1_WORLD, "FR", "FRANCE", YES, NO, YES, YES, YES,
            YES, YES, 7000},
        {CTRY_GEORGIA, ETSI4_WORLD, "GE", "GEORGIA", YES, YES, YES, YES,
            YES, YES, YES, 7000},
        {CTRY_GERMANY, ETSI1_WORLD, "DE", "GERMANY", YES, NO, YES, YES,
            YES, YES, YES, 7000},
        {CTRY_GREECE, ETSI1_WORLD, "GR", "GREECE", YES, NO, YES, YES, YES,
            YES, YES, 7000},
        {CTRY_GUATEMALA, FCC1_FCCA, "GT", "GUATEMALA", YES, YES, YES, YES,
            YES, YES, YES, 7000},
        {CTRY_HONDURAS, NULL1_WORLD, "HN", "HONDURAS", YES, NO, YES, YES,
            YES, NO, NO, 7000},
        {CTRY_HONG_KONG, FCC2_WORLD, "HK", "HONG KONG", YES, YES, YES, YES,
            YES, YES, YES, 7000},
        {CTRY_HUNGARY, ETSI1_WORLD, "HU", "HUNGARY", YES, NO, YES, YES,
            YES, YES, YES, 7000},
        {CTRY_ICELAND, ETSI1_WORLD, "IS", "ICELAND", YES, NO, YES, YES,
            YES, YES, YES, 7000},
        {CTRY_INDIA, APL6_WORLD, "IN", "INDIA", YES, NO, YES, YES, YES,
            YES, NO, 7000},
        {CTRY_INDONESIA, APL1_WORLD, "ID", "INDONESIA", YES, NO, YES, YES,
            YES, YES, NO, 7000},
        {CTRY_IRAN, APL1_WORLD, "IR", "IRAN", YES, YES, YES, YES, YES, YES,
            YES, 7000},
        {CTRY_IRELAND, ETSI1_WORLD, "IE", "IRELAND", YES, NO, YES, YES,
            YES, YES, YES, 7000},
        {CTRY_ISRAEL, NULL1_WORLD, "IL", "ISRAEL", YES, NO, YES, YES, YES,
            NO, NO, 7000},
        {CTRY_ITALY, ETSI1_WORLD, "IT", "ITALY", YES, NO, YES, YES, YES,
            YES, YES, 7000},
        {CTRY_JAMAICA, ETSI1_WORLD, "JM", "JAMAICA", YES, NO, YES, YES,
            YES, YES, YES, 7000},

        {CTRY_JAPAN, MKK1_MKKA, "JP", "JAPAN", YES, NO, NO, YES, YES, YES,
            YES, 7000},
        {CTRY_JAPAN1, MKK1_MKKB, "JP", "JAPAN1", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN2, MKK1_FCCA, "JP", "JAPAN2", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN3, MKK2_MKKA, "JP", "JAPAN3", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN4, MKK1_MKKA1, "JP", "JAPAN4", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN5, MKK1_MKKA2, "JP", "JAPAN5", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN6, MKK1_MKKC, "JP", "JAPAN6", YES, NO, NO, YES, YES,
            YES, YES, 7000},

        {CTRY_JAPAN7, MKK3_MKKB, "JP", "JAPAN7", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN8, MKK3_MKKA2, "JP", "JAPAN8", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN9, MKK3_MKKC, "JP", "JAPAN9", YES, NO, NO, YES, YES,
            YES, YES, 7000},

        {CTRY_JAPAN10, MKK4_MKKB, "JP", "JAPAN10", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN11, MKK4_MKKA2, "JP", "JAPAN11", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN12, MKK4_MKKC, "JP", "JAPAN12", YES, NO, NO, YES, YES,
            YES, YES, 7000},

        {CTRY_JAPAN13, MKK5_MKKB, "JP", "JAPAN13", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN14, MKK5_MKKA2, "JP", "JAPAN14", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN15, MKK5_MKKC, "JP", "JAPAN15", YES, NO, NO, YES, YES,
            YES, YES, 7000},

        {CTRY_JAPAN16, MKK6_MKKB, "JP", "JAPAN16", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN17, MKK6_MKKA2, "JP", "JAPAN17", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN18, MKK6_MKKC, "JP", "JAPAN18", YES, NO, NO, YES, YES,
            YES, YES, 7000},

        {CTRY_JAPAN19, MKK7_MKKB, "JP", "JAPAN19", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN20, MKK7_MKKA2, "JP", "JAPAN20", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN21, MKK7_MKKC, "JP", "JAPAN21", YES, NO, NO, YES, YES,
            YES, YES, 7000},

        {CTRY_JAPAN22, MKK8_MKKB, "JP", "JAPAN22", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN23, MKK8_MKKA2, "JP", "JAPAN23", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN24, MKK8_MKKC, "JP", "JAPAN24", YES, NO, NO, YES, YES,
            YES, YES, 7000},

        {CTRY_JAPAN25, MKK3_MKKA, "JP", "JAPAN25", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN26, MKK3_MKKA1, "JP", "JAPAN26", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN27, MKK3_FCCA, "JP", "JAPAN27", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN28, MKK4_MKKA1, "JP", "JAPAN28", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN29, MKK4_FCCA, "JP", "JAPAN29", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN30, MKK6_MKKA1, "JP", "JAPAN30", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN31, MKK6_FCCA, "JP", "JAPAN31", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN32, MKK7_MKKA1, "JP", "JAPAN32", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN33, MKK7_FCCA, "JP", "JAPAN33", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN34, MKK9_MKKA, "JP", "JAPAN34", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN35, MKK10_MKKA, "JP", "JAPAN35", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN36, MKK4_MKKA, "JP", "JAPAN36", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN37, MKK9_FCCA, "JP", "JAPAN37", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN38, MKK9_MKKA1, "JP", "JAPAN38", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN39, MKK9_MKKC, "JP", "JAPAN39", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN40, MKK9_MKKA2, "JP", "JAPAN40", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN41, MKK10_FCCA, "JP", "JAPAN41", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN42, MKK10_MKKA1, "JP", "JAPAN42", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN43, MKK10_MKKC, "JP", "JAPAN43", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN44, MKK10_MKKA2, "JP", "JAPAN44", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN45, MKK11_MKKA, "JP", "JAPAN45", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN46, MKK11_FCCA, "JP", "JAPAN46", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN47, MKK11_MKKA1, "JP", "JAPAN47", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN48, MKK11_MKKC, "JP", "JAPAN48", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN49, MKK11_MKKA2, "JP", "JAPAN49", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN50, MKK12_MKKA, "JP", "JAPAN50", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN51, MKK12_FCCA, "JP", "JAPAN51", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN52, MKK12_MKKA1, "JP", "JAPAN52", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN53, MKK12_MKKC, "JP", "JAPAN53", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN54, MKK12_MKKA2, "JP", "JAPAN54", YES, NO, NO, YES, YES,
            YES, YES, 7000},

        {CTRY_JAPAN57, MKK13_MKKB, "JP", "JAPAN57", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN58, MKK14_MKKA1, "JP", "JAPAN58", YES, NO, NO, YES, YES,
            YES, YES, 7000},
        {CTRY_JAPAN59, MKK15_MKKA1, "JP", "JAPAN59", YES, NO, NO, YES, YES,
            YES, YES, 7000},

        {CTRY_JORDAN, ETSI2_WORLD, "JO", "JORDAN", YES, NO, YES, YES, YES,
            YES, NO, 7000},
        {CTRY_KAZAKHSTAN, NULL1_WORLD, "KZ", "KAZAKHSTAN", YES, NO, YES,
            YES, YES, NO, NO, 7000},
        {CTRY_KOREA_NORTH, APL9_WORLD, "KP", "NORTH KOREA", YES, NO, NO,
            YES, YES, YES, YES, 7000},
        {CTRY_KOREA_ROC, APL9_WORLD, "KR", "KOREA REPUBLIC", YES, NO, NO,
            YES, NO, YES, NO, 7000},
        {CTRY_KOREA_ROC2, APL2_WORLD, "K2", "KOREA REPUBLIC2", YES, NO, NO,
            YES, NO, YES, NO, 7000},
        {CTRY_KOREA_ROC3, APL9_WORLD, "K3", "KOREA REPUBLIC3", YES, NO, NO,
            YES, NO, YES, NO, 7000},
        {CTRY_KUWAIT, NULL1_WORLD, "KW", "KUWAIT", YES, NO, YES, YES, YES,
            NO, NO, 7000},
        {CTRY_LATVIA, ETSI1_WORLD, "LV", "LATVIA", YES, NO, YES, YES, YES,
            YES, YES, 7000},
        {CTRY_LEBANON, NULL1_WORLD, "LB", "LEBANON", YES, NO, YES, YES,
            YES, NO, NO, 7000},
        {CTRY_LIECHTENSTEIN, ETSI1_WORLD, "LI", "LIECHTENSTEIN", YES, NO,
            YES, YES, YES, YES, YES, 7000},
        {CTRY_LITHUANIA, ETSI1_WORLD, "LT", "LITHUANIA", YES, NO, YES, YES,
            YES, YES, YES, 7000},
        {CTRY_LUXEMBOURG, ETSI1_WORLD, "LU", "LUXEMBOURG", YES, NO, YES,
            YES, YES, YES, YES, 7000},
        {CTRY_MACAU, FCC2_WORLD, "MO", "MACAU", YES, YES, YES, YES, YES,
            YES, YES, 7000},
        {CTRY_MACEDONIA, NULL1_WORLD, "MK", "MACEDONIA", YES, NO, YES, YES,
            YES, NO, NO, 7000},
        {CTRY_MALAYSIA, APL8_WORLD, "MY", "MALAYSIA", YES, NO, NO, YES, NO,
            YES, NO, 7000},
        {CTRY_MALTA, ETSI1_WORLD, "MT", "MALTA", YES, NO, YES, YES, YES,
            YES, YES, 7000},
        {CTRY_MEXICO, FCC1_FCCA, "MX", "MEXICO", YES, YES, YES, YES, YES,
            YES, YES, 7000},
        {CTRY_MONACO, ETSI4_WORLD, "MC", "MONACO", YES, YES, YES, YES, YES,
            YES, YES, 7000},
        {CTRY_MOROCCO, NULL1_WORLD, "MA", "MOROCCO", YES, NO, YES, YES,
            YES, NO, NO, 7000},
        {CTRY_NEPAL, APL1_WORLD, "NP", "NEPAL", YES, NO, YES, YES, YES,
            YES, YES, 7000},
        {CTRY_NETHERLANDS, ETSI1_WORLD, "NL", "NETHERLANDS", YES, NO, YES,
            YES, YES, YES, YES, 7000},
        {CTRY_NETHERLANDS_ANTILLES, ETSI1_WORLD, "AN",
            "NETHERLANDS-ANTILLES", YES, NO, YES, YES, YES, YES, YES, 7000},
        {CTRY_NEW_ZEALAND, FCC2_ETSIC, "NZ", "NEW ZEALAND", YES, NO, YES,
            YES, YES, YES, NO, 7000},
        {CTRY_NORWAY, ETSI1_WORLD, "NO", "NORWAY", YES, NO, YES, YES, YES,
            YES, YES, 7000},
        {CTRY_OMAN, APL6_WORLD, "OM", "OMAN", YES, NO, YES, YES, YES, YES,
            NO, 7000},
        {CTRY_PAKISTAN, NULL1_WORLD, "PK", "PAKISTAN", YES, NO, YES, YES,
            YES, NO, NO, 7000},
        {CTRY_PANAMA, FCC1_FCCA, "PA", "PANAMA", YES, YES, YES, YES, YES,
            YES, YES, 7000},
        {CTRY_PAPUA_NEW_GUINEA, FCC1_WORLD, "PG", "PAPUA NEW GUINEA", YES,
            YES, YES, YES, YES, YES, YES, 7000},
        {CTRY_PERU, APL1_WORLD, "PE", "PERU", YES, NO, YES, YES, YES, YES,
            NO, 7000},
        {CTRY_PHILIPPINES, APL1_WORLD, "PH", "PHILIPPINES", YES, YES, YES,
            YES, YES, YES, YES, 7000},
        {CTRY_POLAND, ETSI1_WORLD, "PL", "POLAND", YES, NO, YES, YES, YES,
            YES, YES, 7000},
        {CTRY_PORTUGAL, ETSI1_WORLD, "PT", "PORTUGAL", YES, NO, YES, YES,
            YES, YES, YES, 7000},
        {CTRY_PUERTO_RICO, FCC1_FCCA, "PR", "PUERTO RICO", YES, YES, YES,
            YES, YES, YES, YES, 7000},
        {CTRY_QATAR, NULL1_WORLD, "QA", "QATAR", YES, NO, YES, YES, YES,
            NO, NO, 7000},
        {CTRY_ROMANIA, NULL1_WORLD, "RO", "ROMANIA", YES, NO, YES, YES,
            YES, NO, NO, 7000},
        {CTRY_RUSSIA, NULL1_WORLD, "RU", "RUSSIA", YES, NO, YES, YES, YES,
            NO, NO, 7000},
        {CTRY_SAUDI_ARABIA, NULL1_WORLD, "SA", "SAUDI ARABIA", YES, NO,
            YES, YES, YES, NO, NO, 7000},
        {CTRY_SERBIA_MONTENEGRO, ETSI1_WORLD, "CS", "SERBIA & MONTENEGRO",
            YES, NO, YES, YES, YES, YES, YES, 7000},
        {CTRY_SINGAPORE, APL6_WORLD, "SG", "SINGAPORE", YES, YES, YES, YES,
            YES, YES, YES, 7000},
        {CTRY_SLOVAKIA, ETSI1_WORLD, "SK", "SLOVAK REPUBLIC", YES, NO, YES,
            YES, YES, YES, YES, 7000},
        {CTRY_SLOVENIA, ETSI1_WORLD, "SI", "SLOVENIA", YES, NO, YES, YES,
            YES, YES, YES, 7000},
        {CTRY_SOUTH_AFRICA, FCC3_WORLD, "ZA", "SOUTH AFRICA", YES, NO, YES,
            YES, YES, YES, NO, 7000},
        {CTRY_SPAIN, ETSI1_WORLD, "ES", "SPAIN", YES, NO, YES, YES, YES,
            YES, YES, 7000},
        {CTRY_SRI_LANKA, FCC3_WORLD, "LK", "SRI LANKA", YES, NO, YES, YES,
            YES, YES, NO, 7000},
        {CTRY_SWEDEN, ETSI1_WORLD, "SE", "SWEDEN", YES, NO, YES, YES, YES,
            YES, YES, 7000},
        {CTRY_SWITZERLAND, ETSI1_WORLD, "CH", "SWITZERLAND", YES, NO, YES,
            YES, YES, YES, YES, 7000},
        {CTRY_SYRIA, NULL1_WORLD, "SY", "SYRIA", YES, NO, YES, YES, YES,
            NO, NO, 7000},
        {CTRY_TAIWAN, APL3_FCCA, "TW", "TAIWAN", YES, YES, YES, YES, YES,
            YES, YES, 7000},
        {CTRY_THAILAND, NULL1_WORLD, "TH", "THAILAND", YES, NO, YES, YES,
            YES, NO, NO, 7000},
        {CTRY_TRINIDAD_Y_TOBAGO, ETSI4_WORLD, "TT", "TRINIDAD & TOBAGO",
            YES, NO, YES, YES, YES, YES, NO, 7000},
        {CTRY_TUNISIA, ETSI3_WORLD, "TN", "TUNISIA", YES, NO, YES, YES,
            YES, YES, NO, 7000},
        {CTRY_TURKEY, ETSI3_WORLD, "TR", "TURKEY", YES, NO, YES, YES, YES,
            YES, NO, 7000},
        {CTRY_UKRAINE, NULL1_WORLD, "UA", "UKRAINE", YES, NO, YES, YES,
            YES, NO, NO, 7000},
        {CTRY_UAE, NULL1_WORLD, "AE", "UNITED ARAB EMIRATES", YES, NO, YES,
            YES, YES, NO, NO, 7000},
        {CTRY_UNITED_KINGDOM, ETSI1_WORLD, "GB", "UNITED KINGDOM", YES, NO,
            YES, YES, YES, YES, YES, 7000},
        {CTRY_UNITED_STATES, FCC3_FCCA, "US", "UNITED STATES", YES, YES,
            YES, YES, YES, YES, YES, 5825},
        {CTRY_UNITED_STATES_FCC49, FCC4_FCCA, "PS",
            "UNITED STATES (PUBLIC SAFETY)", YES, YES, YES, YES, YES, YES,
            YES, 7000},
        {CTRY_URUGUAY, APL2_WORLD, "UY", "URUGUAY", YES, NO, YES, YES, YES,
            YES, NO, 7000},
        {CTRY_UZBEKISTAN, FCC3_FCCA, "UZ", "UZBEKISTAN", YES, YES, YES,
            YES, YES, YES, YES, 7000},
        {CTRY_VENEZUELA, APL2_ETSIC, "VE", "VENEZUELA", YES, NO, YES, YES,
            YES, YES, NO, 7000},
        {CTRY_VIET_NAM, NULL1_WORLD, "VN", "VIET NAM", YES, NO, YES, YES,
            YES, NO, NO, 7000},
        {CTRY_YEMEN, NULL1_WORLD, "YE", "YEMEN", YES, NO, YES, YES, YES,
            NO, NO, 7000},
        {CTRY_ZIMBABWE, NULL1_WORLD, "ZW", "ZIMBABWE", YES, NO, YES, YES,
            YES, NO, NO, 7000}
};

enum {
        NO_DFS = 0x0000000000000000ULL,
        DFS_FCC3 = 0x0000000000000001ULL,
        DFS_ETSI = 0x0000000000000002ULL,
        DFS_MKK4 = 0x0000000000000004ULL,
};

enum {
        F1_4915_4925,
        F1_4935_4945,
        F1_4920_4980,
        F1_4942_4987,
        F1_4945_4985,
        F1_4950_4980,
        F1_5035_5040,
        F1_5040_5080,
        F1_5055_5055,

        F1_5120_5240,

        F1_5170_5230,
        F2_5170_5230,

        F1_5180_5240,
        F2_5180_5240,
        F3_5180_5240,
        F4_5180_5240,
        F5_5180_5240,
        F6_5180_5240,
        F7_5180_5240,
        F8_5180_5240,

        F1_5180_5320,

        F1_5240_5280,

        F1_5260_5280,

        F1_5260_5320,
        F2_5260_5320,
        F3_5260_5320,
        F4_5260_5320,
        F5_5260_5320,
        F6_5260_5320,

        F1_5260_5700,

        F1_5280_5320,

        F1_5500_5580,

        F1_5500_5620,

        F1_5500_5700,
        F2_5500_5700,
        F3_5500_5700,
        F4_5500_5700,
        F5_5500_5700,

        F1_5660_5700,

        F1_5745_5805,
        F2_5745_5805,
        F3_5745_5805,

        F1_5745_5825,
        F2_5745_5825,
        F3_5745_5825,
        F4_5745_5825,
        F5_5745_5825,
        F6_5745_5825,

        W1_4920_4980,
        W1_5040_5080,
        W1_5170_5230,
        W1_5180_5240,
        W1_5260_5320,
        W1_5745_5825,
        W1_5500_5700,
        A_DEMO_ALL_CHANNELS
};

static struct RegDmnFreqBand regDmn5GhzFreq[] = {
        {4915, 4925, 23, 0, 10, 5, NO_DFS, PSCAN_MKK2, 16},
        {4935, 4945, 23, 0, 10, 5, NO_DFS, PSCAN_MKK2, 16},
        {4920, 4980, 23, 0, 20, 20, NO_DFS, PSCAN_MKK2, 7},
        {4942, 4987, 27, 6, 5, 5, NO_DFS, PSCAN_FCC, 0},
        {4945, 4985, 30, 6, 10, 5, NO_DFS, PSCAN_FCC, 0},
        {4950, 4980, 33, 6, 20, 5, NO_DFS, PSCAN_FCC, 0},
        {5035, 5040, 23, 0, 10, 5, NO_DFS, PSCAN_MKK2, 12},
        {5040, 5080, 23, 0, 20, 20, NO_DFS, PSCAN_MKK2, 2},
        {5055, 5055, 23, 0, 10, 5, NO_DFS, PSCAN_MKK2, 12},

        {5120, 5240, 5, 6, 20, 20, NO_DFS, NO_PSCAN, 0},

        {5170, 5230, 23, 0, 20, 20, NO_DFS, PSCAN_MKK1 | PSCAN_MKK2, 1},
        {5170, 5230, 20, 0, 20, 20, NO_DFS, PSCAN_MKK1 | PSCAN_MKK2, 1},

        {5180, 5240, 15, 0, 20, 20, NO_DFS, PSCAN_FCC | PSCAN_ETSI, 0},
        {5180, 5240, 17, 6, 20, 20, NO_DFS, NO_PSCAN, 1},
        {5180, 5240, 18, 0, 20, 20, NO_DFS, PSCAN_FCC | PSCAN_ETSI, 0},
        {5180, 5240, 20, 0, 20, 20, NO_DFS, PSCAN_FCC | PSCAN_ETSI, 0},
        {5180, 5240, 23, 0, 20, 20, NO_DFS, PSCAN_FCC | PSCAN_ETSI, 0},
        {5180, 5240, 23, 6, 20, 20, NO_DFS, PSCAN_FCC, 0},
        {5180, 5240, 20, 0, 20, 20, NO_DFS, PSCAN_MKK1 | PSCAN_MKK3, 0},
        {5180, 5240, 23, 6, 20, 20, NO_DFS, NO_PSCAN, 0},

        {5180, 5320, 20, 6, 20, 20, NO_DFS, PSCAN_ETSI, 0},

        {5240, 5280, 23, 0, 20, 20, DFS_FCC3, PSCAN_FCC | PSCAN_ETSI, 0},

        {5260, 5280, 23, 0, 20, 20, DFS_FCC3 | DFS_ETSI,
            PSCAN_FCC | PSCAN_ETSI, 0},

        {5260, 5320, 18, 0, 20, 20, DFS_FCC3 | DFS_ETSI,
            PSCAN_FCC | PSCAN_ETSI, 0},

        {5260, 5320, 20, 0, 20, 20, DFS_FCC3 | DFS_ETSI | DFS_MKK4,
            PSCAN_FCC | PSCAN_ETSI | PSCAN_MKK3, 0},


        {5260, 5320, 20, 6, 20, 20, DFS_FCC3 | DFS_ETSI,
            PSCAN_FCC | PSCAN_ETSI, 2},
        {5260, 5320, 23, 6, 20, 20, DFS_FCC3 | DFS_ETSI, PSCAN_FCC, 2},
        {5260, 5320, 23, 6, 20, 20, DFS_FCC3 | DFS_ETSI, PSCAN_FCC, 0},
        {5260, 5320, 30, 0, 20, 20, NO_DFS, NO_PSCAN, 0},

        {5260, 5700, 5, 6, 20, 20, DFS_FCC3 | DFS_ETSI, NO_PSCAN, 0},

        {5280, 5320, 17, 6, 20, 20, DFS_FCC3 | DFS_ETSI, PSCAN_FCC, 0},

        {5500, 5580, 23, 6, 20, 20, DFS_FCC3, PSCAN_FCC, 0},

        {5500, 5620, 30, 6, 20, 20, DFS_ETSI, PSCAN_ETSI, 0},

        {5500, 5700, 20, 6, 20, 20, DFS_FCC3 | DFS_ETSI, PSCAN_FCC, 4},
        {5500, 5700, 27, 0, 20, 20, DFS_FCC3 | DFS_ETSI,
            PSCAN_FCC | PSCAN_ETSI, 0},
        {5500, 5700, 30, 0, 20, 20, DFS_FCC3 | DFS_ETSI,
            PSCAN_FCC | PSCAN_ETSI, 0},
        {5500, 5700, 23, 0, 20, 20, DFS_FCC3 | DFS_ETSI | DFS_MKK4,
            PSCAN_MKK3 | PSCAN_FCC, 0},
        {5500, 5700, 30, 6, 20, 20, DFS_ETSI, PSCAN_ETSI, 0},

        {5660, 5700, 23, 6, 20, 20, DFS_FCC3, PSCAN_FCC, 0},

        {5745, 5805, 23, 0, 20, 20, NO_DFS, NO_PSCAN, 0},
        {5745, 5805, 30, 6, 20, 20, NO_DFS, NO_PSCAN, 0},
        {5745, 5805, 30, 6, 20, 20, NO_DFS, PSCAN_ETSI, 0},
        {5745, 5825, 5, 6, 20, 20, NO_DFS, NO_PSCAN, 0},
        {5745, 5825, 17, 0, 20, 20, NO_DFS, NO_PSCAN, 0},
        {5745, 5825, 20, 0, 20, 20, NO_DFS, NO_PSCAN, 0},
        {5745, 5825, 30, 0, 20, 20, NO_DFS, NO_PSCAN, 0},
        {5745, 5825, 30, 6, 20, 20, NO_DFS, NO_PSCAN, 3},
        {5745, 5825, 30, 6, 20, 20, NO_DFS, NO_PSCAN, 0},


        {4920, 4980, 30, 0, 20, 20, NO_DFS, PSCAN_WWR, 0},
        {5040, 5080, 30, 0, 20, 20, NO_DFS, PSCAN_WWR, 0},
        {5170, 5230, 30, 0, 20, 20, NO_DFS, PSCAN_WWR, 0},
        {5180, 5240, 30, 0, 20, 20, NO_DFS, PSCAN_WWR, 0},
        {5260, 5320, 30, 0, 20, 20, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, 0},
        {5745, 5825, 30, 0, 20, 20, NO_DFS, PSCAN_WWR, 0},
        {5500, 5700, 30, 0, 20, 20, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, 0},
        {4920, 6100, 30, 6, 20, 20, NO_DFS, NO_PSCAN, 0},
};

enum {
        T1_5130_5650,
        T1_5150_5670,

        T1_5200_5200,
        T2_5200_5200,
        T3_5200_5200,
        T4_5200_5200,
        T5_5200_5200,
        T6_5200_5200,
        T7_5200_5200,
        T8_5200_5200,

        T1_5200_5280,
        T2_5200_5280,
        T3_5200_5280,
        T4_5200_5280,
        T5_5200_5280,
        T6_5200_5280,

        T1_5200_5240,
        T1_5210_5210,
        T2_5210_5210,
        T3_5210_5210,
        T4_5210_5210,
        T5_5210_5210,
        T6_5210_5210,
        T7_5210_5210,
        T8_5210_5210,
        T9_5210_5210,
        T10_5210_5210,
        T1_5240_5240,

        T1_5210_5250,
        T1_5210_5290,
        T2_5210_5290,
        T3_5210_5290,

        T1_5280_5280,
        T2_5280_5280,
        T1_5290_5290,
        T2_5290_5290,
        T3_5290_5290,
        T1_5250_5290,
        T2_5250_5290,
        T3_5250_5290,
        T4_5250_5290,

        T1_5540_5660,
        T2_5540_5660,
        T3_5540_5660,
        T1_5760_5800,
        T2_5760_5800,
        T3_5760_5800,
        T4_5760_5800,
        T5_5760_5800,
        T6_5760_5800,
        T7_5760_5800,

        T1_5765_5805,
        T2_5765_5805,
        T3_5765_5805,
        T4_5765_5805,
        T5_5765_5805,
        T6_5765_5805,
        T7_5765_5805,
        T8_5765_5805,
        T9_5765_5805,

        WT1_5210_5250,
        WT1_5290_5290,
        WT1_5540_5660,
        WT1_5760_5800,
};

enum {
        F1_2312_2372,
        F2_2312_2372,

        F1_2412_2472,
        F2_2412_2472,
        F3_2412_2472,

        F1_2412_2462,
        F2_2412_2462,

        F1_2432_2442,

        F1_2457_2472,

        F1_2467_2472,

        F1_2484_2484,
        F2_2484_2484,

        F1_2512_2732,

        W1_2312_2372,
        W1_2412_2412,
        W1_2417_2432,
        W1_2437_2442,
        W1_2447_2457,
        W1_2462_2462,
        W1_2467_2467,
        W2_2467_2467,
        W1_2472_2472,
        W2_2472_2472,
        W1_2484_2484,
        W2_2484_2484,
};

static struct RegDmnFreqBand regDmn2GhzFreq[] = {
        {2312, 2372, 5, 6, 20, 5, NO_DFS, NO_PSCAN, 0},
        {2312, 2372, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0},

        {2412, 2472, 5, 6, 20, 5, NO_DFS, NO_PSCAN, 0},
        {2412, 2472, 20, 0, 20, 5, NO_DFS, PSCAN_MKKA, 0},
        {2412, 2472, 30, 0, 20, 5, NO_DFS, NO_PSCAN, 0},

        {2412, 2462, 27, 6, 20, 5, NO_DFS, NO_PSCAN, 0},
        {2412, 2462, 20, 0, 20, 5, NO_DFS, PSCAN_MKKA, 0},

        {2432, 2442, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0},

        {2457, 2472, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0},

        {2467, 2472, 20, 0, 20, 5, NO_DFS, PSCAN_MKKA2 | PSCAN_MKKA, 0},

        {2484, 2484, 5, 6, 20, 5, NO_DFS, NO_PSCAN, 0},
        {2484, 2484, 20, 0, 20, 5, NO_DFS,
            PSCAN_MKKA | PSCAN_MKKA1 | PSCAN_MKKA2, 0},

        {2512, 2732, 5, 6, 20, 5, NO_DFS, NO_PSCAN, 0},

        {2312, 2372, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0},
        {2412, 2412, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0},
        {2417, 2432, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0},
        {2437, 2442, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0},
        {2447, 2457, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0},
        {2462, 2462, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0},
        {2467, 2467, 20, 0, 20, 5, NO_DFS, PSCAN_WWR | IS_ECM_CHAN, 0},
        {2467, 2467, 20, 0, 20, 5, NO_DFS, NO_PSCAN | IS_ECM_CHAN, 0},
        {2472, 2472, 20, 0, 20, 5, NO_DFS, PSCAN_WWR | IS_ECM_CHAN, 0},
        {2472, 2472, 20, 0, 20, 5, NO_DFS, NO_PSCAN | IS_ECM_CHAN, 0},
        {2484, 2484, 20, 0, 20, 5, NO_DFS, PSCAN_WWR | IS_ECM_CHAN, 0},
        {2484, 2484, 20, 0, 20, 5, NO_DFS, NO_PSCAN | IS_ECM_CHAN, 0},
};

enum {
        G1_2312_2372,
        G2_2312_2372,

        G1_2412_2472,
        G2_2412_2472,
        G3_2412_2472,

        G1_2412_2462,
        G2_2412_2462,

        G1_2432_2442,

        G1_2457_2472,

        G1_2512_2732,

        G1_2467_2472,

        WG1_2312_2372,
        WG1_2412_2462,
        WG1_2467_2472,
        WG2_2467_2472,
        G_DEMO_ALL_CHANNELS
};

static struct RegDmnFreqBand regDmn2Ghz11gFreq[] = {
        {2312, 2372, 5, 6, 20, 5, NO_DFS, NO_PSCAN, 0},
        {2312, 2372, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0},

        {2412, 2472, 5, 6, 20, 5, NO_DFS, NO_PSCAN, 0},
        {2412, 2472, 20, 0, 20, 5, NO_DFS, PSCAN_MKKA_G, 0},
        {2412, 2472, 30, 0, 20, 5, NO_DFS, NO_PSCAN, 0},

        {2412, 2462, 27, 6, 20, 5, NO_DFS, NO_PSCAN, 0},
        {2412, 2462, 20, 0, 20, 5, NO_DFS, PSCAN_MKKA_G, 0},

        {2432, 2442, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0},

        {2457, 2472, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0},

        {2512, 2732, 5, 6, 20, 5, NO_DFS, NO_PSCAN, 0},

        {2467, 2472, 20, 0, 20, 5, NO_DFS, PSCAN_MKKA2 | PSCAN_MKKA, 0},

        {2312, 2372, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0},
        {2412, 2462, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0},
        {2467, 2472, 20, 0, 20, 5, NO_DFS, PSCAN_WWR | IS_ECM_CHAN, 0},
        {2467, 2472, 20, 0, 20, 5, NO_DFS, NO_PSCAN | IS_ECM_CHAN, 0},
        {2312, 2732, 27, 6, 20, 5, NO_DFS, NO_PSCAN, 0},
};

enum {
        T1_2312_2372,
        T1_2437_2437,
        T2_2437_2437,
        T3_2437_2437,
        T1_2512_2732
};

static struct regDomain regDomains[] = {

        {DEBUG_REG_DMN, FCC, DFS_FCC3, NO_PSCAN, NO_REQ,
                /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(A_DEMO_ALL_CHANNELS, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
            -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T1_5130_5650, T1_5150_5670, -1, -1, -1, -1, -1, -1, -1, -1, -1,
            -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T1_5200_5240, T1_5280_5280, T1_5540_5660, T1_5765_5805, -1, -1,
            -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F1_2312_2372, F1_2412_2472, F1_2484_2484, F1_2512_2732, -1, -1,
            -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(G_DEMO_ALL_CHANNELS, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
            -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T1_2312_2372, T1_2437_2437, T1_2512_2732, -1, -1, -1, -1, -1,
            -1, -1, -1, -1)},

        {APL1, FCC, NO_DFS, NO_PSCAN, NO_REQ,
                /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F4_5745_5825, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T2_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T1_5765_5805, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            BMZERO,
            BMZERO,
            BMZERO},

        {APL2, FCC, NO_DFS, NO_PSCAN, NO_REQ,
                /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F1_5745_5805, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T1_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T2_5765_5805, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            BMZERO,
            BMZERO,
            BMZERO},

        {APL3, FCC, NO_DFS, NO_PSCAN, NO_REQ,
                /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F1_5280_5320, F2_5745_5805, -1, -1, -1, -1, -1, -1, -1, -1, -1,
            -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T1_5290_5290, T1_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1,
            -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T1_5765_5805, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            BMZERO,
            BMZERO,
            BMZERO},

        {APL4, FCC, NO_DFS, NO_PSCAN, NO_REQ,
                /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F4_5180_5240, F3_5745_5825, -1, -1, -1, -1, -1, -1, -1, -1, -1,
            -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T1_5210_5210, T3_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1,
            -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T1_5200_5200, T3_5765_5805, -1, -1, -1, -1, -1, -1, -1, -1, -1,
            -1),
            BMZERO,
            BMZERO,
            BMZERO},

        {APL5, FCC, NO_DFS, NO_PSCAN, NO_REQ,
                /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F2_5745_5825, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T4_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T4_5765_5805, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            BMZERO,
            BMZERO,
            BMZERO},

        {APL6, ETSI, DFS_ETSI, PSCAN_FCC_T | PSCAN_FCC, NO_REQ,
                /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F4_5180_5240, F2_5260_5320, F3_5745_5825, -1, -1, -1, -1, -1,
            -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T2_5210_5210, T1_5250_5290, T1_5760_5800, -1, -1, -1, -1, -1,
            -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T1_5200_5280, T5_5765_5805, -1, -1, -1, -1, -1, -1, -1, -1, -1,
            -1),
            BMZERO,
            BMZERO,
            BMZERO},

        {APL7, ETSI, DFS_ETSI, PSCAN_ETSI, NO_REQ,
                /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F1_5280_5320, F5_5500_5700, F3_5745_5805, -1, -1, -1, -1, -1,
            -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T3_5290_5290, T5_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1,
            -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T1_5540_5660, T6_5765_5805, -1, -1, -1, -1, -1, -1, -1, -1, -1,
            -1),
            BMZERO,
            BMZERO,
            BMZERO},

        {APL8, ETSI, NO_DFS, NO_PSCAN,
            DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB,
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F6_5260_5320, F4_5745_5825, -1, -1, -1, -1, -1, -1, -1, -1, -1,
            -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T2_5290_5290, T2_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1,
            -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T1_5280_5280, T1_5765_5805, -1, -1, -1, -1, -1, -1, -1, -1, -1,
            -1),
            BMZERO,
            BMZERO,
            BMZERO},

        {APL9, ETSI, DFS_ETSI, PSCAN_ETSI,
            DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB,
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F1_5180_5320, F1_5500_5620, F3_5745_5805, -1, -1, -1, -1, -1,
            -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T3_5290_5290, T5_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1,
            -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T1_5540_5660, T6_5765_5805, -1, -1, -1, -1, -1, -1, -1, -1, -1,
            -1),
            BMZERO,
            BMZERO,
            BMZERO},

        {APL10, ETSI, DFS_ETSI, PSCAN_ETSI,
            DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB,
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F1_5180_5320, F5_5500_5700, F3_5745_5805, -1, -1, -1, -1, -1,
            -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T3_5290_5290, T5_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1,
            -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T1_5540_5660, T6_5765_5805, -1, -1, -1, -1, -1, -1, -1, -1, -1,
            -1),
            BMZERO,
            BMZERO,
            BMZERO},

        {ETSI1, ETSI, DFS_ETSI, PSCAN_ETSI,
            DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB,
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F4_5180_5240, F2_5260_5320, F2_5500_5700, -1, -1, -1, -1, -1,
            -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T1_5210_5290, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T2_5200_5280, T2_5540_5660, -1, -1, -1, -1, -1, -1, -1, -1, -1,
            -1),
            BMZERO,
            BMZERO,
            BMZERO},

        {ETSI2, ETSI, DFS_ETSI, PSCAN_ETSI,
            DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB,
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F3_5180_5240, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T3_5210_5210, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T2_5200_5200, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            BMZERO,
            BMZERO,
            BMZERO},

        {ETSI3, ETSI, DFS_ETSI, PSCAN_ETSI,
            DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB,
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F4_5180_5240, F2_5260_5320, -1, -1, -1, -1, -1, -1, -1, -1, -1,
            -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T1_5210_5290, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T2_5200_5280, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            BMZERO,
            BMZERO,
            BMZERO},

        {ETSI4, ETSI, DFS_ETSI, PSCAN_ETSI,
            DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB,
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F3_5180_5240, F1_5260_5320, -1, -1, -1, -1, -1, -1, -1, -1, -1,
            -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T2_5210_5290, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T3_5200_5280, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            BMZERO,
            BMZERO,
            BMZERO},

        {ETSI5, ETSI, DFS_ETSI, PSCAN_ETSI,
            DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB,
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F1_5180_5240, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T4_5210_5210, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T3_5200_5200, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            BMZERO,
            BMZERO,
            BMZERO},

        {ETSI6, ETSI, DFS_ETSI, PSCAN_ETSI,
            DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB,
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F5_5180_5240, F1_5260_5280, F3_5500_5700, -1, -1, -1, -1, -1,
            -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T1_5210_5250, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T4_5200_5280, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            BMZERO,
            BMZERO,
            BMZERO},

        {FCC1, FCC, NO_DFS, NO_PSCAN, NO_REQ,
                /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F2_5180_5240, F4_5260_5320, F5_5745_5825, -1, -1, -1, -1, -1,
            -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T6_5210_5210, T2_5250_5290, T6_5760_5800, -1, -1, -1, -1, -1,
            -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T1_5200_5240, T2_5280_5280, T7_5765_5805, -1, -1, -1, -1, -1,
            -1, -1, -1, -1),
            BMZERO,
            BMZERO,
            BMZERO},

        {FCC2, FCC, NO_DFS, NO_PSCAN, NO_REQ,
                /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F6_5180_5240, F5_5260_5320, F6_5745_5825, -1, -1, -1, -1, -1,
            -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T7_5210_5210, T3_5250_5290, T2_5760_5800, -1, -1, -1, -1, -1,
            -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T7_5200_5200, T1_5240_5240, T2_5280_5280, T1_5765_5805, -1, -1,
            -1, -1, -1, -1, -1, -1),
            BMZERO,
            BMZERO,
            BMZERO},

        {FCC3, FCC, DFS_FCC3, PSCAN_FCC | PSCAN_FCC_T, NO_REQ,
                /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F2_5180_5240, F3_5260_5320, F1_5500_5700, F5_5745_5825, -1, -1,
            -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T6_5210_5210, T2_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1,
            -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T4_5200_5200, T8_5765_5805, -1, -1, -1, -1, -1, -1, -1, -1, -1,
            -1),
            BMZERO,
            BMZERO,
            BMZERO},

        {FCC4, FCC, DFS_FCC3, PSCAN_FCC | PSCAN_FCC_T, NO_REQ,
                /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F1_4942_4987, F1_4945_4985, F1_4950_4980, -1, -1, -1, -1, -1,
            -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T8_5210_5210, T4_5250_5290, T7_5760_5800, -1, -1, -1, -1, -1,
            -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T1_5200_5240, T1_5280_5280, T9_5765_5805, -1, -1, -1, -1, -1,
            -1, -1, -1, -1),
            BMZERO,
            BMZERO,
            BMZERO},

        {FCC5, FCC, NO_DFS, NO_PSCAN, NO_REQ,
                /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F2_5180_5240, F6_5745_5825, -1, -1, -1, -1, -1, -1, -1, -1, -1,
            -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T6_5210_5210, T2_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1,
            -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T8_5200_5200, T7_5765_5805, -1, -1, -1, -1, -1, -1, -1, -1, -1,
            -1),
            BMZERO,
            BMZERO,
            BMZERO},

        {FCC6, FCC, DFS_FCC3, PSCAN_FCC, NO_REQ,
                /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F8_5180_5240, F5_5260_5320, F1_5500_5580, F1_5660_5700,
            F6_5745_5825, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T7_5210_5210, T3_5250_5290, T2_5760_5800, -1, -1, -1, -1, -1,
            -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T7_5200_5200, T1_5240_5240, T2_5280_5280, T1_5765_5805, -1, -1,
            -1, -1, -1, -1, -1, -1),
            BMZERO,
            BMZERO,
            BMZERO},

        {MKK1, MKK, NO_DFS, PSCAN_MKK1, DISALLOW_ADHOC_11A_TURB,
                /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F1_5170_5230, F4_5180_5240, F2_5260_5320, F4_5500_5700, -1, -1,
            -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T7_5210_5210, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T5_5200_5200, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            BMZERO,
            BMZERO,
            BMZERO},

        {MKK2, MKK, NO_DFS, PSCAN_MKK2, DISALLOW_ADHOC_11A_TURB,
                /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F1_4915_4925, F1_4935_4945, F1_4920_4980, F1_5035_5040,
            F1_5055_5055, F1_5040_5080, F1_5170_5230, F4_5180_5240,
            F2_5260_5320, F4_5500_5700, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T7_5210_5210, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T5_5200_5200, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            BMZERO,
            BMZERO,
            BMZERO},


        {MKK3, MKK, NO_DFS, PSCAN_MKK3, DISALLOW_ADHOC_11A_TURB,
                /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F4_5180_5240, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T9_5210_5210, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T1_5200_5200, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            BMZERO,
            BMZERO,
            BMZERO},


        {MKK4, MKK, DFS_MKK4, PSCAN_MKK3, DISALLOW_ADHOC_11A_TURB,
                /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F4_5180_5240, F2_5260_5320, -1, -1, -1, -1, -1, -1, -1, -1, -1,
            -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T10_5210_5210, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T6_5200_5200, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            BMZERO,
            BMZERO,
            BMZERO},


        {MKK5, MKK, DFS_MKK4, PSCAN_MKK3, DISALLOW_ADHOC_11A_TURB,
                /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F4_5180_5240, F2_5260_5320, F4_5500_5700, -1, -1, -1, -1, -1,
            -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T3_5210_5290, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T5_5200_5280, T3_5540_5660, -1, -1, -1, -1, -1, -1, -1, -1, -1,
            -1),
            BMZERO,
            BMZERO,
            BMZERO},


        {MKK6, MKK, NO_DFS, PSCAN_MKK1, DISALLOW_ADHOC_11A_TURB,
                /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F2_5170_5230, F4_5180_5240, -1, -1, -1, -1, -1, -1, -1, -1, -1,
            -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T3_5210_5210, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T6_5200_5200, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            BMZERO,
            BMZERO,
            BMZERO},


        {MKK7, MKK, DFS_MKK4, PSCAN_MKK1 | PSCAN_MKK3,
            DISALLOW_ADHOC_11A_TURB,
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F1_5170_5230, F4_5180_5240, F2_5260_5320, -1, -1, -1, -1, -1,
            -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T3_5210_5290, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T5_5200_5280, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            BMZERO,
            BMZERO,
            BMZERO},


        {MKK8, MKK, DFS_MKK4, PSCAN_MKK1 | PSCAN_MKK3,
            DISALLOW_ADHOC_11A_TURB,
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F1_5170_5230, F4_5180_5240, F2_5260_5320, F4_5500_5700, -1, -1,
            -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T3_5210_5290, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T5_5200_5280, T3_5540_5660, -1, -1, -1, -1, -1, -1, -1, -1, -1,
            -1),
            BMZERO,
            BMZERO,
            BMZERO},


        {MKK9, MKK, NO_DFS, PSCAN_MKK2 | PSCAN_MKK3,
            DISALLOW_ADHOC_11A_TURB,
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F1_4915_4925, F1_4935_4945, F1_4920_4980, F1_5035_5040,
            F1_5055_5055, F1_5040_5080, F4_5180_5240, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T9_5210_5210, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T1_5200_5200, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            BMZERO,
            BMZERO,
            BMZERO},


        {MKK10, MKK, DFS_MKK4, PSCAN_MKK2 | PSCAN_MKK3,
            DISALLOW_ADHOC_11A_TURB,
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F1_4915_4925, F1_4935_4945, F1_4920_4980, F1_5035_5040,
            F1_5055_5055, F1_5040_5080, F4_5180_5240, F2_5260_5320, -1, -1,
            -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T3_5210_5290, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T1_5200_5280, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            BMZERO,
            BMZERO,
            BMZERO},


        {MKK11, MKK, DFS_MKK4, PSCAN_MKK3, DISALLOW_ADHOC_11A_TURB,
                /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F1_4915_4925, F1_4935_4945, F1_4920_4980, F1_5035_5040,
            F1_5055_5055, F1_5040_5080, F4_5180_5240, F2_5260_5320,
            F4_5500_5700, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T3_5210_5290, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T1_5200_5280, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            BMZERO,
            BMZERO,
            BMZERO},


        {MKK12, MKK, DFS_MKK4, PSCAN_MKK1 | PSCAN_MKK3,
            DISALLOW_ADHOC_11A_TURB,
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F1_4915_4925, F1_4935_4945, F1_4920_4980, F1_5035_5040,
            F1_5055_5055, F1_5040_5080, F1_5170_5230, F4_5180_5240,
            F2_5260_5320, F4_5500_5700, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T3_5210_5290, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T1_5200_5280, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            BMZERO,
            BMZERO,
            BMZERO},


        {MKK13, MKK, DFS_MKK4, PSCAN_MKK1 | PSCAN_MKK3,
            DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB,
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F1_5170_5230, F7_5180_5240, F2_5260_5320, F4_5500_5700, -1, -1,
            -1, -1, -1, -1, -1, -1),
            BMZERO,
            BMZERO,
            BMZERO,
            BMZERO,
            BMZERO},


        {MKK14, MKK, DFS_MKK4, PSCAN_MKK1, DISALLOW_ADHOC_11A_TURB,
                /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F1_4915_4925, F1_4935_4945, F1_4920_4980, F1_5035_5040,
            F1_5040_5080, F1_5055_5055, F1_5170_5230, F4_5180_5240, -1, -1,
            -1, -1),
            BMZERO,
            BMZERO,
            BMZERO,
            BMZERO,
            BMZERO},


        {MKK15, MKK, DFS_MKK4, PSCAN_MKK1, DISALLOW_ADHOC_11A_TURB,
                /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F1_4915_4925, F1_4935_4945, F1_4920_4980, F1_5035_5040,
            F1_5040_5080, F1_5055_5055, F1_5170_5230, F4_5180_5240,
            F2_5260_5320, -1, -1, -1),
            BMZERO,
            BMZERO,
            BMZERO,
            BMZERO,
            BMZERO},


        {APLD, NO_CTL, NO_DFS, NO_PSCAN, NO_REQ,
            BMZERO,
            BMZERO,
            BMZERO,
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F2_2312_2372, F2_2412_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1,
            -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(G2_2312_2372, G2_2412_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1,
            -1),
            BMZERO},

        {ETSIA, NO_CTL, NO_DFS, PSCAN_ETSIA,
            DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB,
            BMZERO,
            BMZERO,
            BMZERO,
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F1_2457_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(G1_2457_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T2_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)},

        {ETSIB, ETSI, NO_DFS, PSCAN_ETSIB,
            DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB,
            BMZERO,
            BMZERO,
            BMZERO,
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F1_2432_2442, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(G1_2432_2442, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T2_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)},

        {ETSIC, ETSI, NO_DFS, PSCAN_ETSIC,
            DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB,
            BMZERO,
            BMZERO,
            BMZERO,
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F3_2412_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(G3_2412_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T2_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)},

        {FCCA, FCC, NO_DFS, NO_PSCAN, NO_REQ,
            BMZERO,
            BMZERO,
            BMZERO,
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F1_2412_2462, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(G1_2412_2462, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T2_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)},

        {MKKA, MKK, NO_DFS,
            PSCAN_MKKA | PSCAN_MKKA_G | PSCAN_MKKA1 | PSCAN_MKKA1_G |
            PSCAN_MKKA2 | PSCAN_MKKA2_G, DISALLOW_ADHOC_11A_TURB,
            BMZERO,
            BMZERO,
            BMZERO,
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F2_2412_2462, F1_2467_2472, F2_2484_2484, -1, -1, -1, -1, -1,
            -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(G2_2412_2462, G1_2467_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1,
            -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T2_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)},

        {MKKC, MKK, NO_DFS, NO_PSCAN, NO_REQ,
            BMZERO,
            BMZERO,
            BMZERO,
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F2_2412_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(G2_2412_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T2_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)},

        {WORLD, ETSI, NO_DFS, NO_PSCAN, NO_REQ,
            BMZERO,
            BMZERO,
            BMZERO,
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(F2_2412_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(G2_2412_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T2_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)},

        {WOR0_WORLD, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, ADHOC_PER_11D,
                /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(W1_5260_5320, W1_5180_5240, W1_5170_5230, W1_5745_5825,
            W1_5500_5700, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(WT1_5210_5250, WT1_5290_5290, WT1_5760_5800, -1, -1, -1, -1,
            -1, -1, -1, -1, -1),
            BMZERO,
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2472_2472,
            W1_2417_2432, W1_2447_2457, W1_2467_2467, W1_2484_2484, -1, -1,
            -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(WG1_2412_2462, WG1_2467_2472, -1, -1, -1, -1, -1, -1, -1, -1,
            -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)},

        {WOR01_WORLD, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR,
            ADHOC_PER_11D,
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(W1_5260_5320, W1_5180_5240, W1_5170_5230, W1_5745_5825,
            W1_5500_5700, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(WT1_5210_5250, WT1_5290_5290, WT1_5760_5800, -1, -1, -1, -1,
            -1, -1, -1, -1, -1),
            BMZERO,
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2417_2432,
            W1_2447_2457, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(WG1_2412_2462, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)},

        {WOR02_WORLD, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR,
            ADHOC_PER_11D,
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(W1_5260_5320, W1_5180_5240, W1_5170_5230, W1_5745_5825,
            W1_5500_5700, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(WT1_5210_5250, WT1_5290_5290, WT1_5760_5800, -1, -1, -1, -1,
            -1, -1, -1, -1, -1),
            BMZERO,
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2472_2472,
            W1_2417_2432, W1_2447_2457, W1_2467_2467, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(WG1_2412_2462, WG1_2467_2472, -1, -1, -1, -1, -1, -1, -1, -1,
            -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)},

        {EU1_WORLD, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, ADHOC_PER_11D,
                /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(W1_5260_5320, W1_5180_5240, W1_5170_5230, W1_5745_5825,
            W1_5500_5700, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(WT1_5210_5250, WT1_5290_5290, WT1_5760_5800, -1, -1, -1, -1,
            -1, -1, -1, -1, -1),
            BMZERO,
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W2_2472_2472,
            W1_2417_2432, W1_2447_2457, W2_2467_2467, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(WG1_2412_2462, WG2_2467_2472, -1, -1, -1, -1, -1, -1, -1, -1,
            -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)},

        {WOR1_WORLD, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, ADHOC_NO_11A,
                /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(W1_5260_5320, W1_5180_5240, W1_5170_5230, W1_5745_5825,
            W1_5500_5700, -1, -1, -1, -1, -1, -1, -1),
            BMZERO,
            BMZERO,
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2472_2472,
            W1_2417_2432, W1_2447_2457, W1_2467_2467, W1_2484_2484, -1, -1,
            -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(WG1_2412_2462, WG1_2467_2472, -1, -1, -1, -1, -1, -1, -1, -1,
            -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)},

        {WOR2_WORLD, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, ADHOC_NO_11A,
                /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(W1_5260_5320, W1_5180_5240, W1_5170_5230, W1_5745_5825,
            W1_5500_5700, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(WT1_5210_5250, WT1_5290_5290, WT1_5760_5800, -1, -1, -1, -1,
            -1, -1, -1, -1, -1),
            BMZERO,
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2472_2472,
            W1_2417_2432, W1_2447_2457, W1_2467_2467, W1_2484_2484, -1, -1,
            -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(WG1_2412_2462, WG1_2467_2472, -1, -1, -1, -1, -1, -1, -1, -1,
            -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)},

        {WOR3_WORLD, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, ADHOC_PER_11D,
                /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(W1_5260_5320, W1_5180_5240, W1_5170_5230, W1_5745_5825, -1, -1,
            -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(WT1_5210_5250, WT1_5290_5290, WT1_5760_5800, -1, -1, -1, -1,
            -1, -1, -1, -1, -1),
            BMZERO,
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2472_2472,
            W1_2417_2432, W1_2447_2457, W1_2467_2467, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(WG1_2412_2462, WG2_2467_2472, -1, -1, -1, -1, -1, -1, -1, -1,
            -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)},

        {WOR4_WORLD, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, ADHOC_NO_11A,
                /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(W1_5260_5320, W1_5180_5240, W1_5745_5825, -1, -1, -1, -1, -1,
            -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(WT1_5210_5250, WT1_5290_5290, WT1_5760_5800, -1, -1, -1, -1,
            -1, -1, -1, -1, -1),
            BMZERO,
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2417_2432,
            W1_2447_2457, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(WG1_2412_2462, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)},

        {WOR5_ETSIC, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, ADHOC_NO_11A,
                /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(W1_5260_5320, W1_5180_5240, W1_5745_5825, -1, -1, -1, -1, -1,
            -1, -1, -1, -1),
            BMZERO,
            BMZERO,
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2472_2472,
            W1_2417_2432, W1_2447_2457, W1_2467_2467, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(WG1_2412_2462, WG1_2467_2472, -1, -1, -1, -1, -1, -1, -1, -1,
            -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)},

        {WOR9_WORLD, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, ADHOC_NO_11A,
                /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(W1_5260_5320, W1_5180_5240, W1_5745_5825, W1_5500_5700, -1, -1,
            -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(WT1_5210_5250, WT1_5290_5290, WT1_5760_5800, -1, -1, -1, -1,
            -1, -1, -1, -1, -1),
            BMZERO,
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2417_2432,
            W1_2447_2457, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(WG1_2412_2462, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)},

        {WORA_WORLD, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, ADHOC_NO_11A,
                /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(W1_5260_5320, W1_5180_5240, W1_5745_5825, W1_5500_5700, -1, -1,
            -1, -1, -1, -1, -1, -1),
            BMZERO,
            BMZERO,
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2472_2472,
            W1_2417_2432, W1_2447_2457, W1_2467_2467, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(WG1_2412_2462, WG1_2467_2472, -1, -1, -1, -1, -1, -1, -1, -1,
            -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)},

        {WORB_WORLD, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, ADHOC_NO_11A,
                /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(W1_5260_5320, W1_5180_5240, W1_5500_5700, -1, -1, -1, -1, -1,
            -1, -1, -1, -1),
            BMZERO,
            BMZERO,
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2472_2472,
            W1_2417_2432, W1_2447_2457, W1_2467_2467, -1, -1, -1, -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(WG1_2412_2462, WG1_2467_2472, -1, -1, -1, -1, -1, -1, -1, -1,
            -1, -1),
            /* LINTED E_FALSE_LOGICAL_EXPR */
            BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1)},

        {NULL1, NO_CTL, NO_DFS, NO_PSCAN, NO_REQ,
            BMZERO,
            BMZERO,
            BMZERO,
            BMZERO,
            BMZERO,
            BMZERO}
};

static const struct cmode modes[] = {
        {ATH9K_MODE_11A, CHANNEL_A},
        {ATH9K_MODE_11B, CHANNEL_B},
        {ATH9K_MODE_11G, CHANNEL_G},
        {ATH9K_MODE_11NG_HT20, CHANNEL_G_HT20},
        {ATH9K_MODE_11NG_HT40PLUS, CHANNEL_G_HT40PLUS},
        {ATH9K_MODE_11NG_HT40MINUS, CHANNEL_G_HT40MINUS},
        {ATH9K_MODE_11NA_HT20, CHANNEL_A_HT20},
        {ATH9K_MODE_11NA_HT40PLUS, CHANNEL_A_HT40PLUS},
        {ATH9K_MODE_11NA_HT40MINUS, CHANNEL_A_HT40MINUS},
};

static struct japan_bandcheck j_bandcheck[] = {
        {F1_5170_5230, AR_EEPROM_EEREGCAP_EN_KK_U1_ODD},
        {F4_5180_5240, AR_EEPROM_EEREGCAP_EN_KK_U1_EVEN},
        {F2_5260_5320, AR_EEPROM_EEREGCAP_EN_KK_U2},
        {F4_5500_5700, AR_EEPROM_EEREGCAP_EN_KK_MIDBAND}
};

#ifdef __cplusplus
}
#endif

#endif /* _ARN_REGD_COMMON_H */