usr/src/boot/i386/libi386/cpuid.c
41
unsigned int regs[4];
usr/src/boot/i386/libi386/cpuid.c
61
do_cpuid(0, regs);
usr/src/boot/i386/libi386/cpuid.c
62
maxeax = regs[0];
usr/src/boot/i386/libi386/cpuid.c
72
do_cpuid(1, regs);
usr/src/boot/i386/libi386/cpuid.c
73
stdfeatures = regs[3];
usr/src/boot/i386/libi386/cpuid.c
77
do_cpuid(0x80000000, regs);
usr/src/boot/i386/libi386/cpuid.c
78
if (regs[0] & 0x80000000) {
usr/src/boot/i386/libi386/cpuid.c
79
maxeax = regs[0];
usr/src/boot/i386/libi386/cpuid.c
84
do_cpuid(0x80000001, regs);
usr/src/boot/i386/libi386/cpuid.c
85
xtdfeatures = regs[3];
usr/src/boot/libsa/x86/hypervisor.c
41
uint_t regs[4];
usr/src/boot/libsa/x86/hypervisor.c
45
do_cpuid(1, u.regs);
usr/src/boot/libsa/x86/hypervisor.c
46
if ((u.regs[2] & CPUID2_HV) == 0)
usr/src/boot/libsa/x86/hypervisor.c
49
do_cpuid(0x40000000, u.regs);
usr/src/cmd/bhyve/amd64/xmsr.c
241
u_int regs[4];
usr/src/cmd/bhyve/amd64/xmsr.c
244
do_cpuid(0, regs);
usr/src/cmd/bhyve/amd64/xmsr.c
245
((u_int *)&cpu_vendor)[0] = regs[1];
usr/src/cmd/bhyve/amd64/xmsr.c
246
((u_int *)&cpu_vendor)[1] = regs[3];
usr/src/cmd/bhyve/amd64/xmsr.c
247
((u_int *)&cpu_vendor)[2] = regs[2];
usr/src/cmd/bhyve/common/gdb.c
225
uint64_t regs[4];
usr/src/cmd/bhyve/common/gdb.c
233
if (vm_get_register_set(vcpu, nitems(regset), regset, regs) == -1)
usr/src/cmd/bhyve/common/gdb.c
241
paging->cr3 = regs[1];
usr/src/cmd/bhyve/common/gdb.c
243
if (regs[3] & EFER_LMA)
usr/src/cmd/bhyve/common/gdb.c
245
else if (regs[0] & CR0_PE)
usr/src/cmd/bhyve/common/gdb.c
249
if (!(regs[0] & CR0_PG))
usr/src/cmd/bhyve/common/gdb.c
251
else if (!(regs[2] & CR4_PAE))
usr/src/cmd/bhyve/common/gdb.c
253
else if (regs[3] & EFER_LME)
usr/src/cmd/bhyve/common/pci_hda.c
118
uint32_t regs[HDA_LAST_OFFSET];
usr/src/cmd/bhyve/common/pci_hda.c
290
sc->regs[offset] = value;
usr/src/cmd/bhyve/common/pci_hda.c
297
return sc->regs[offset];
usr/src/cmd/bhyve/common/pci_hda.c
554
memset(sc->regs, 0, sizeof(sc->regs));
usr/src/cmd/bhyve/common/pci_hda.c
583
memset(sc->regs + HDA_STREAM_REGS_BASE + off, 0, HDA_STREAM_REGS_LEN);
usr/src/cmd/bhyve/common/pci_nvme.c
1035
sc->regs.cap_lo = (ZERO_BASED(sc->max_qentries) & NVME_CAP_LO_REG_MQES_MASK) |
usr/src/cmd/bhyve/common/pci_nvme.c
1039
sc->regs.cap_hi = NVMEF(NVME_CAP_HI_REG_CSS_NVM, 1);
usr/src/cmd/bhyve/common/pci_nvme.c
1041
sc->regs.vs = NVME_REV(1,4); /* NVMe v1.4 */
usr/src/cmd/bhyve/common/pci_nvme.c
1043
sc->regs.cc = 0;
usr/src/cmd/bhyve/common/pci_nvme.c
1073
sc->regs.csts = 0;
usr/src/cmd/bhyve/common/pci_nvme.c
1096
asqs = ONE_BASED(NVMEV(NVME_AQA_REG_ASQS, sc->regs.aqa));
usr/src/cmd/bhyve/common/pci_nvme.c
1099
asqs - 1, sc->regs.aqa);
usr/src/cmd/bhyve/common/pci_nvme.c
1100
sc->regs.csts |= NVME_CSTS_CFS;
usr/src/cmd/bhyve/common/pci_nvme.c
1105
sc->regs.asq, sizeof(struct nvme_command) * asqs);
usr/src/cmd/bhyve/common/pci_nvme.c
1108
sc->regs.asq);
usr/src/cmd/bhyve/common/pci_nvme.c
1109
sc->regs.csts |= NVME_CSTS_CFS;
usr/src/cmd/bhyve/common/pci_nvme.c
1114
__func__, sc->regs.asq, sc->submit_queues[0].qbase);
usr/src/cmd/bhyve/common/pci_nvme.c
1116
acqs = ONE_BASED(NVMEV(NVME_AQA_REG_ACQS, sc->regs.aqa));
usr/src/cmd/bhyve/common/pci_nvme.c
1119
acqs - 1, sc->regs.aqa);
usr/src/cmd/bhyve/common/pci_nvme.c
1120
sc->regs.csts |= NVME_CSTS_CFS;
usr/src/cmd/bhyve/common/pci_nvme.c
1125
sc->regs.acq, sizeof(struct nvme_completion) * acqs);
usr/src/cmd/bhyve/common/pci_nvme.c
1128
sc->regs.acq);
usr/src/cmd/bhyve/common/pci_nvme.c
1129
sc->regs.csts |= NVME_CSTS_CFS;
usr/src/cmd/bhyve/common/pci_nvme.c
1135
__func__, sc->regs.acq, sc->compl_queues[0].qbase);
usr/src/cmd/bhyve/common/pci_nvme.c
2323
NVME_CC_GET_EN(sc->regs.cc) && !(NVME_CSTS_GET_RDY(sc->regs.csts)))
usr/src/cmd/bhyve/common/pci_nvme.c
2324
sc->regs.csts |= NVME_CSTS_RDY;
usr/src/cmd/bhyve/common/pci_nvme.c
2983
if ((sc->regs.csts & NVME_CSTS_RDY) == 0) {
usr/src/cmd/bhyve/common/pci_nvme.c
3047
sc->regs.csts &= ~NVMEM(NVME_CSTS_REG_SHST);
usr/src/cmd/bhyve/common/pci_nvme.c
3048
sc->regs.csts |= NVMEF(NVME_CSTS_REG_SHST,
usr/src/cmd/bhyve/common/pci_nvme.c
3051
if (NVME_CC_GET_EN(ccreg) != NVME_CC_GET_EN(sc->regs.cc)) {
usr/src/cmd/bhyve/common/pci_nvme.c
3060
sc->regs.cc &= ~NVME_CC_WRITE_MASK;
usr/src/cmd/bhyve/common/pci_nvme.c
3061
sc->regs.cc |= ccreg & NVME_CC_WRITE_MASK;
usr/src/cmd/bhyve/common/pci_nvme.c
3064
sc->regs.cc &= ~NVME_CC_NEN_WRITE_MASK;
usr/src/cmd/bhyve/common/pci_nvme.c
3065
sc->regs.cc |= ccreg & NVME_CC_NEN_WRITE_MASK;
usr/src/cmd/bhyve/common/pci_nvme.c
3066
sc->regs.csts &= ~NVME_CSTS_RDY;
usr/src/cmd/bhyve/common/pci_nvme.c
3068
!(sc->regs.csts & NVME_CSTS_CFS)) {
usr/src/cmd/bhyve/common/pci_nvme.c
3069
sc->regs.csts |= NVME_CSTS_RDY;
usr/src/cmd/bhyve/common/pci_nvme.c
3078
sc->regs.aqa = (uint32_t)value;
usr/src/cmd/bhyve/common/pci_nvme.c
3081
sc->regs.asq = (sc->regs.asq & (0xFFFFFFFF00000000)) |
usr/src/cmd/bhyve/common/pci_nvme.c
3085
sc->regs.asq = (sc->regs.asq & (0x00000000FFFFFFFF)) |
usr/src/cmd/bhyve/common/pci_nvme.c
3089
sc->regs.acq = (sc->regs.acq & (0xFFFFFFFF00000000)) |
usr/src/cmd/bhyve/common/pci_nvme.c
3093
sc->regs.acq = (sc->regs.acq & (0x00000000FFFFFFFF)) |
usr/src/cmd/bhyve/common/pci_nvme.c
3137
void *p = &(sc->regs);
usr/src/cmd/bhyve/common/pci_nvme.c
326
struct nvme_registers regs;
usr/src/cmd/bhyve/common/tpm_intf_crb.c
148
#define CRB_CMD_SIZE_READ(regs) (regs.cmd_size)
usr/src/cmd/bhyve/common/tpm_intf_crb.c
149
#define CRB_CMD_SIZE_WRITE(regs, val) \
usr/src/cmd/bhyve/common/tpm_intf_crb.c
151
regs.cmd_size = val; \
usr/src/cmd/bhyve/common/tpm_intf_crb.c
153
#define CRB_CMD_ADDR_READ(regs) \
usr/src/cmd/bhyve/common/tpm_intf_crb.c
154
(((uint64_t)regs.cmd_addr_hi << 32) | regs.cmd_addr_lo)
usr/src/cmd/bhyve/common/tpm_intf_crb.c
155
#define CRB_CMD_ADDR_WRITE(regs, val) \
usr/src/cmd/bhyve/common/tpm_intf_crb.c
157
regs.cmd_addr_lo = val & 0xFFFFFFFF; \
usr/src/cmd/bhyve/common/tpm_intf_crb.c
158
regs.cmd_addr_hi = val >> 32; \
usr/src/cmd/bhyve/common/tpm_intf_crb.c
160
#define CRB_RSP_SIZE_READ(regs) (regs.rsp_size)
usr/src/cmd/bhyve/common/tpm_intf_crb.c
161
#define CRB_RSP_SIZE_WRITE(regs, val) \
usr/src/cmd/bhyve/common/tpm_intf_crb.c
163
regs.rsp_size = val; \
usr/src/cmd/bhyve/common/tpm_intf_crb.c
165
#define CRB_RSP_ADDR_READ(regs) (regs.rsp_addr)
usr/src/cmd/bhyve/common/tpm_intf_crb.c
166
#define CRB_RSP_ADDR_WRITE(regs, val) \
usr/src/cmd/bhyve/common/tpm_intf_crb.c
168
regs.rsp_addr = val; \
usr/src/cmd/bhyve/common/tpm_intf_crb.c
184
struct tpm_crb_regs regs;
usr/src/cmd/bhyve/common/tpm_intf_crb.c
211
const uint64_t cmd_addr = CRB_CMD_ADDR_READ(crb->regs);
usr/src/cmd/bhyve/common/tpm_intf_crb.c
212
const uint64_t rsp_addr = CRB_RSP_ADDR_READ(crb->regs);
usr/src/cmd/bhyve/common/tpm_intf_crb.c
213
const uint32_t cmd_size = CRB_CMD_SIZE_READ(crb->regs);
usr/src/cmd/bhyve/common/tpm_intf_crb.c
214
const uint32_t rsp_size = CRB_RSP_SIZE_READ(crb->regs);
usr/src/cmd/bhyve/common/tpm_intf_crb.c
251
memcpy(cmd, crb->regs.data_buffer, TPM_CRB_DATA_BUFFER_SIZE);
usr/src/cmd/bhyve/common/tpm_intf_crb.c
288
memset(crb->regs.data_buffer, 0, TPM_CRB_DATA_BUFFER_SIZE);
usr/src/cmd/bhyve/common/tpm_intf_crb.c
289
memcpy(&crb->regs.data_buffer[rsp_off], &rsp[rsp_off], rsp_size);
usr/src/cmd/bhyve/common/tpm_intf_crb.c
291
crb->regs.ctrl_start.start = false;
usr/src/cmd/bhyve/common/tpm_intf_crb.c
332
ptr = (uint8_t *)&crb->regs + off;
usr/src/cmd/bhyve/common/tpm_intf_crb.c
350
crb->regs.loc_sts.granted = false;
usr/src/cmd/bhyve/common/tpm_intf_crb.c
351
crb->regs.loc_state.loc_assigned = false;
usr/src/cmd/bhyve/common/tpm_intf_crb.c
353
crb->regs.loc_sts.granted = true;
usr/src/cmd/bhyve/common/tpm_intf_crb.c
354
crb->regs.loc_state.loc_assigned = true;
usr/src/cmd/bhyve/common/tpm_intf_crb.c
369
crb->regs.ctrl_sts.tpm_idle = false;
usr/src/cmd/bhyve/common/tpm_intf_crb.c
371
crb->regs.ctrl_sts.tpm_idle = true;
usr/src/cmd/bhyve/common/tpm_intf_crb.c
399
if (!start.start || crb->regs.ctrl_start.start) {
usr/src/cmd/bhyve/common/tpm_intf_crb.c
404
crb->regs.ctrl_start.start = true;
usr/src/cmd/bhyve/common/tpm_intf_crb.c
491
crb->regs.loc_state.tpm_req_valid_sts = true;
usr/src/cmd/bhyve/common/tpm_intf_crb.c
492
crb->regs.loc_state.tpm_established = true;
usr/src/cmd/bhyve/common/tpm_intf_crb.c
494
crb->regs.intf_id.interface_type = TPM_INTF_TYPE_CRB;
usr/src/cmd/bhyve/common/tpm_intf_crb.c
495
crb->regs.intf_id.interface_version = TPM_INTF_VERSION_CRB;
usr/src/cmd/bhyve/common/tpm_intf_crb.c
496
crb->regs.intf_id.cap_locality = false;
usr/src/cmd/bhyve/common/tpm_intf_crb.c
497
crb->regs.intf_id.cap_crb_idle_bypass = false;
usr/src/cmd/bhyve/common/tpm_intf_crb.c
498
crb->regs.intf_id.cap_data_xfer_size_support =
usr/src/cmd/bhyve/common/tpm_intf_crb.c
500
crb->regs.intf_id.cap_fifo = false;
usr/src/cmd/bhyve/common/tpm_intf_crb.c
501
crb->regs.intf_id.cap_crb = true;
usr/src/cmd/bhyve/common/tpm_intf_crb.c
502
crb->regs.intf_id.interface_selector = TPM_INTF_SELECTOR_CRB;
usr/src/cmd/bhyve/common/tpm_intf_crb.c
503
crb->regs.intf_id.intf_sel_lock = false;
usr/src/cmd/bhyve/common/tpm_intf_crb.c
504
crb->regs.intf_id.rid = 0;
usr/src/cmd/bhyve/common/tpm_intf_crb.c
505
crb->regs.intf_id.vid = 0x1014; /* IBM */
usr/src/cmd/bhyve/common/tpm_intf_crb.c
506
crb->regs.intf_id.did = 0x1014; /* IBM */
usr/src/cmd/bhyve/common/tpm_intf_crb.c
508
crb->regs.ctrl_sts.tpm_idle = true;
usr/src/cmd/bhyve/common/tpm_intf_crb.c
510
CRB_CMD_SIZE_WRITE(crb->regs, TPM_CRB_DATA_BUFFER_SIZE);
usr/src/cmd/bhyve/common/tpm_intf_crb.c
511
CRB_CMD_ADDR_WRITE(crb->regs, TPM_CRB_DATA_BUFFER_ADDRESS);
usr/src/cmd/bhyve/common/tpm_intf_crb.c
512
CRB_RSP_SIZE_WRITE(crb->regs, TPM_CRB_DATA_BUFFER_SIZE);
usr/src/cmd/bhyve/common/tpm_intf_crb.c
513
CRB_RSP_ADDR_WRITE(crb->regs, TPM_CRB_DATA_BUFFER_ADDRESS);
usr/src/cmd/bhyvectl/bhyvectl.c
348
u_int regs[4], v[3];
usr/src/cmd/bhyvectl/bhyvectl.c
350
do_cpuid(0, regs);
usr/src/cmd/bhyvectl/bhyvectl.c
351
v[0] = regs[1];
usr/src/cmd/bhyvectl/bhyvectl.c
352
v[1] = regs[3];
usr/src/cmd/bhyvectl/bhyvectl.c
353
v[2] = regs[2];
usr/src/cmd/cxgbetool/cudbg_view.c
2394
dump_block_regs(const struct reg_info *reg_array, const u32 *regs,
usr/src/cmd/cxgbetool/cudbg_view.c
2402
reg_val = regs[reg_array->addr / 4];
usr/src/cmd/cxgbetool/cudbg_view.c
2424
dump_regs_table(const u32 *regs, const struct mod_regs *modtab,
usr/src/cmd/cxgbetool/cudbg_view.c
2433
regs + modtab->offset, cudbg_poutbuf);
usr/src/cmd/cxgbetool/cudbg_view.c
2445
dump_regs_t6(const u32 *regs, struct cudbg_buffer *cudbg_poutbuf)
usr/src/cmd/cxgbetool/cudbg_view.c
2476
return dump_regs_table(regs, t6_mod,
usr/src/cmd/cxgbetool/cudbg_view.c
2488
dump_regs_t5(const u32 *regs, struct cudbg_buffer *cudbg_poutbuf)
usr/src/cmd/cxgbetool/cudbg_view.c
2520
return dump_regs_table(regs, t5_mod,
usr/src/cmd/cxgbetool/cudbg_view.c
2535
u32 *regs;
usr/src/cmd/cxgbetool/cudbg_view.c
2541
regs = (u32 *) ((unsigned int *)dc_buff.data);
usr/src/cmd/cxgbetool/cudbg_view.c
2543
rc = dump_regs_t5((u32 *)regs, cudbg_poutbuf);
usr/src/cmd/cxgbetool/cudbg_view.c
2545
rc = dump_regs_t6((u32 *)regs, cudbg_poutbuf);
usr/src/cmd/cxgbetool/cudbg_view.c
3532
u32 indirect_addr, const u32 *regs,
usr/src/cmd/cxgbetool/cudbg_view.c
3540
reg_val = regs[i];
usr/src/cmd/cxgbetool/cxgbetool.c
257
int dump_block_regs(const struct reg_info *reg_array, const u32 *regs)
usr/src/cmd/cxgbetool/cxgbetool.c
263
reg_val = regs[reg_array->addr / 4];
usr/src/cmd/cxgbetool/cxgbetool.c
279
const u32 *regs, const struct mod_regs *modtab,
usr/src/cmd/cxgbetool/cxgbetool.c
293
regs + modtab->offset);
usr/src/cmd/cxgbetool/cxgbetool.c
303
dump_regs_t5(int argc, char *argv[], int start_arg, uint32_t *regs)
usr/src/cmd/cxgbetool/cxgbetool.c
335
return dump_regs_table(argc, argv, start_arg, regs, t5_mod,
usr/src/cmd/cxgbetool/cxgbetool.c
346
static int dump_regs_t6(int argc, char *argv[], int start_arg, const u32 *regs)
usr/src/cmd/cxgbetool/cxgbetool.c
377
return dump_regs_table(argc, argv, start_arg, regs, t6_mod,
usr/src/cmd/cxgbetool/cxgbetool.c
391
struct t4_regdump *regs;
usr/src/cmd/cxgbetool/cxgbetool.c
395
regs = malloc(len + sizeof(struct t4_regdump));
usr/src/cmd/cxgbetool/cxgbetool.c
396
if (!regs)
usr/src/cmd/cxgbetool/cxgbetool.c
399
regs->len = len;
usr/src/cmd/cxgbetool/cxgbetool.c
401
rc = doit(iff_name, T4_IOCTL_REGDUMP, regs);
usr/src/cmd/cxgbetool/cxgbetool.c
404
length = regs->len;
usr/src/cmd/cxgbetool/cxgbetool.c
405
free(regs);
usr/src/cmd/cxgbetool/cxgbetool.c
407
regs = malloc(length + sizeof(struct t4_regdump));
usr/src/cmd/cxgbetool/cxgbetool.c
408
if (regs == NULL)
usr/src/cmd/cxgbetool/cxgbetool.c
411
rc = doit(iff_name, T4_IOCTL_REGDUMP, regs);
usr/src/cmd/cxgbetool/cxgbetool.c
415
free(regs);
usr/src/cmd/cxgbetool/cxgbetool.c
419
vers = regs->version & 0x3ff;
usr/src/cmd/cxgbetool/cxgbetool.c
420
revision = (regs->version >> 10) & 0x3f;
usr/src/cmd/cxgbetool/cxgbetool.c
421
is_pcie = (regs->version & 0x80000000) != 0;
usr/src/cmd/cxgbetool/cxgbetool.c
424
return dump_regs_t5(argc, argv, start_arg, regs->data);
usr/src/cmd/cxgbetool/cxgbetool.c
426
return dump_regs_t6(argc, argv, start_arg, regs->data);
usr/src/cmd/fs.d/ufs/fsdb/fsdb.c
1124
regs[c].sv_addr = addr;
usr/src/cmd/fs.d/ufs/fsdb/fsdb.c
1125
regs[c].sv_value = value;
usr/src/cmd/fs.d/ufs/fsdb/fsdb.c
1126
regs[c].sv_objsz = objsz;
usr/src/cmd/fs.d/ufs/fsdb/fsdb.c
1145
addr = regs[c].sv_addr;
usr/src/cmd/fs.d/ufs/fsdb/fsdb.c
1146
value = regs[c].sv_value;
usr/src/cmd/fs.d/ufs/fsdb/fsdb.c
1147
objsz = regs[c].sv_objsz;
usr/src/cmd/fs.d/ufs/fsdb/fsdb.c
181
} regs[NREG];
usr/src/cmd/geniconvtbl/geniconvtbl.c
147
#define REG(n) (*(ist->regs + (n)))
usr/src/cmd/geniconvtbl/geniconvtbl.c
1686
return (*(ist->regs + expr->data.operand[0].itm_ptr)
usr/src/cmd/geniconvtbl/geniconvtbl.c
1848
(void) memset(ist->regs, 0,
usr/src/cmd/geniconvtbl/geniconvtbl.c
218
ist->regs = NULL;
usr/src/cmd/geniconvtbl/geniconvtbl.c
220
ist->regs = malloc((sizeof (itm_num_t)) * hdr->reg_num);
usr/src/cmd/geniconvtbl/geniconvtbl.c
221
if (NULL == ist->regs) {
usr/src/cmd/geniconvtbl/geniconvtbl.c
227
(void) memset(ist->regs, 0,
usr/src/cmd/geniconvtbl/geniconvtbl.c
259
free(ist->regs);
usr/src/cmd/geniconvtbl/geniconvtbl.c
85
itm_num_t *regs; /* register */
usr/src/cmd/luxadm/fcalupdate.c
143
volatile socal_reg_t *regs;
usr/src/cmd/luxadm/fcalupdate.c
265
regs = (socal_reg_t *)((int)addr + REG_OFFSET);
usr/src/cmd/luxadm/fcalupdate.c
275
retval += load_file(file, addr, regs);
usr/src/cmd/luxadm/fcalupdate.c
442
volatile socal_reg_t *regs)
usr/src/cmd/luxadm/fcalupdate.c
447
if (!write_feprom((uchar_t *)0, dest_address, regs)) {
usr/src/cmd/luxadm/fcalupdate.c
456
if (feprom_erase(dest_address, regs))
usr/src/cmd/luxadm/fcalupdate.c
476
if (!(write_feprom(source_address, dest_address, regs))) {
usr/src/cmd/luxadm/fcalupdate.c
484
regs->socal_cr.w &= ~(0x30000);
usr/src/cmd/luxadm/fcalupdate.c
494
volatile socal_reg_t *regs)
usr/src/cmd/luxadm/fcalupdate.c
505
regs->socal_cr.w &= ~(0x30000);
usr/src/cmd/luxadm/fcalupdate.c
506
regs->socal_cr.w |= i & 0x30000;
usr/src/cmd/luxadm/fcalupdate.c
535
feprom_erase(volatile uchar_t *dest_address, volatile socal_reg_t *regs)
usr/src/cmd/luxadm/fcalupdate.c
549
regs->socal_cr.w &= ~(0x30000);
usr/src/cmd/luxadm/fcalupdate.c
550
regs->socal_cr.w |= i & 0x30000;
usr/src/cmd/luxadm/fcalupdate.c
682
int offset, int size, volatile socal_reg_t *regs)
usr/src/cmd/luxadm/fcalupdate.c
696
regs->socal_cr.w = i & 0xf0000;
usr/src/cmd/luxadm/fcalupdate.c
716
load_file(char *file, caddr_t prom, volatile socal_reg_t *regs)
usr/src/cmd/luxadm/fcalupdate.c
765
FEPROM_WWN_OFFSET, 4, regs);
usr/src/cmd/luxadm/fcalupdate.c
767
FEPROM_WWN_OFFSET + 4, 4, regs);
usr/src/cmd/luxadm/fcalupdate.c
788
if (feprom_program((uchar_t *)buffer, (uchar_t *)prom, regs) == 0) {
usr/src/cmd/mdb/common/modules/libumem/leaky_subr.c
572
const uintptr_t *regs = (const uintptr_t *)&lwp->pr_reg;
usr/src/cmd/mdb/common/modules/libumem/leaky_subr.c
579
leaky_grep_ptr(regs[i]);
usr/src/cmd/mdb/common/modules/libumem/leaky_subr.c
581
sp = regs[i++] + STACK_BIAS;
usr/src/cmd/mdb/common/modules/libumem/leaky_subr.c
586
leaky_grep_ptr(regs[i]);
usr/src/cmd/mdb/i86pc/modules/unix/unix.c
420
#define DUMP(reg) #reg, regs->r_##reg
usr/src/cmd/mdb/i86pc/modules/unix/unix.c
426
struct regs *regs = &rec->ttr_regs;
usr/src/cmd/mdb/i86pc/modules/unix/unix.c
434
mdb_printf(THREEREGS, DUMP(gs), "trp", regs->r_trapno, DUMP(err));
usr/src/cmd/mdb/i86pc/modules/unix/unix.c
438
"fsb", regs->__r_fsbase,
usr/src/cmd/mdb/i86pc/modules/unix/unix.c
439
"gsb", regs->__r_gsbase);
usr/src/cmd/mdb/i86pc/modules/unix/unix.c
445
#define DUMP(reg) #reg, regs->r_##reg
usr/src/cmd/mdb/i86pc/modules/unix/unix.c
451
struct regs *regs = &rec->ttr_regs;
usr/src/cmd/mdb/i86pc/modules/unix/unix.c
456
mdb_printf(FOURREGS, "trp", regs->r_trapno, DUMP(err),
usr/src/cmd/mdb/i86pc/modules/unix/unix.c
458
mdb_printf(FOURREGS, DUMP(efl), "usp", regs->r_uesp, DUMP(ss),
usr/src/cmd/mdb/i86pc/modules/unix/unix.c
468
struct regs *regs = &rec->ttr_regs;
usr/src/cmd/mdb/i86pc/modules/unix/unix.c
501
mdb_printf(" %a\n", regs->r_pc);
usr/src/cmd/mdb/intel/kmdb/kaif.c
211
mdb_tgt_gregset_t *regs;
usr/src/cmd/mdb/intel/kmdb/kaif.c
214
if ((regs = kaif_kdi_to_gregs(DPI_MASTER_CPUID)) == NULL)
usr/src/cmd/mdb/intel/kmdb/kaif.c
226
return (®s->kregs[rd->rd_num]);
usr/src/cmd/mdb/intel/mdb/kvm_amd64dep.c
183
kt_regs_to_kregs(struct regs *regs, mdb_tgt_gregset_t *gregs)
usr/src/cmd/mdb/intel/mdb/kvm_amd64dep.c
185
gregs->kregs[KREG_SAVFP] = regs->r_savfp;
usr/src/cmd/mdb/intel/mdb/kvm_amd64dep.c
186
gregs->kregs[KREG_SAVPC] = regs->r_savpc;
usr/src/cmd/mdb/intel/mdb/kvm_amd64dep.c
187
gregs->kregs[KREG_RDI] = regs->r_rdi;
usr/src/cmd/mdb/intel/mdb/kvm_amd64dep.c
188
gregs->kregs[KREG_RSI] = regs->r_rsi;
usr/src/cmd/mdb/intel/mdb/kvm_amd64dep.c
189
gregs->kregs[KREG_RDX] = regs->r_rdx;
usr/src/cmd/mdb/intel/mdb/kvm_amd64dep.c
190
gregs->kregs[KREG_RCX] = regs->r_rcx;
usr/src/cmd/mdb/intel/mdb/kvm_amd64dep.c
191
gregs->kregs[KREG_R8] = regs->r_r8;
usr/src/cmd/mdb/intel/mdb/kvm_amd64dep.c
192
gregs->kregs[KREG_R9] = regs->r_r9;
usr/src/cmd/mdb/intel/mdb/kvm_amd64dep.c
193
gregs->kregs[KREG_RAX] = regs->r_rax;
usr/src/cmd/mdb/intel/mdb/kvm_amd64dep.c
194
gregs->kregs[KREG_RBX] = regs->r_rbx;
usr/src/cmd/mdb/intel/mdb/kvm_amd64dep.c
195
gregs->kregs[KREG_RBP] = regs->r_rbp;
usr/src/cmd/mdb/intel/mdb/kvm_amd64dep.c
196
gregs->kregs[KREG_R10] = regs->r_r10;
usr/src/cmd/mdb/intel/mdb/kvm_amd64dep.c
197
gregs->kregs[KREG_R11] = regs->r_r11;
usr/src/cmd/mdb/intel/mdb/kvm_amd64dep.c
198
gregs->kregs[KREG_R12] = regs->r_r12;
usr/src/cmd/mdb/intel/mdb/kvm_amd64dep.c
199
gregs->kregs[KREG_R13] = regs->r_r13;
usr/src/cmd/mdb/intel/mdb/kvm_amd64dep.c
200
gregs->kregs[KREG_R14] = regs->r_r14;
usr/src/cmd/mdb/intel/mdb/kvm_amd64dep.c
201
gregs->kregs[KREG_R15] = regs->r_r15;
usr/src/cmd/mdb/intel/mdb/kvm_amd64dep.c
202
gregs->kregs[KREG_DS] = regs->r_ds;
usr/src/cmd/mdb/intel/mdb/kvm_amd64dep.c
203
gregs->kregs[KREG_ES] = regs->r_es;
usr/src/cmd/mdb/intel/mdb/kvm_amd64dep.c
204
gregs->kregs[KREG_FS] = regs->r_fs;
usr/src/cmd/mdb/intel/mdb/kvm_amd64dep.c
205
gregs->kregs[KREG_GS] = regs->r_gs;
usr/src/cmd/mdb/intel/mdb/kvm_amd64dep.c
206
gregs->kregs[KREG_TRAPNO] = regs->r_trapno;
usr/src/cmd/mdb/intel/mdb/kvm_amd64dep.c
207
gregs->kregs[KREG_ERR] = regs->r_err;
usr/src/cmd/mdb/intel/mdb/kvm_amd64dep.c
208
gregs->kregs[KREG_RIP] = regs->r_rip;
usr/src/cmd/mdb/intel/mdb/kvm_amd64dep.c
209
gregs->kregs[KREG_CS] = regs->r_cs;
usr/src/cmd/mdb/intel/mdb/kvm_amd64dep.c
210
gregs->kregs[KREG_RFLAGS] = regs->r_rfl;
usr/src/cmd/mdb/intel/mdb/kvm_amd64dep.c
211
gregs->kregs[KREG_RSP] = regs->r_rsp;
usr/src/cmd/mdb/intel/mdb/kvm_amd64dep.c
212
gregs->kregs[KREG_SS] = regs->r_ss;
usr/src/cmd/mdb/intel/mdb/kvm_amd64dep.c
220
struct regs regs;
usr/src/cmd/mdb/intel/mdb/kvm_amd64dep.c
298
mdb_tgt_vread(t, ®s, sizeof (regs), addr) == sizeof (regs)) {
usr/src/cmd/mdb/intel/mdb/kvm_amd64dep.c
299
kt_regs_to_kregs(®s, kt->k_regs);
usr/src/cmd/mdb/intel/mdb/kvm_ia32dep.c
181
kt_regs_to_kregs(struct regs *regs, mdb_tgt_gregset_t *gregs)
usr/src/cmd/mdb/intel/mdb/kvm_ia32dep.c
183
gregs->kregs[KREG_SAVFP] = regs->r_savfp;
usr/src/cmd/mdb/intel/mdb/kvm_ia32dep.c
184
gregs->kregs[KREG_SAVPC] = regs->r_savpc;
usr/src/cmd/mdb/intel/mdb/kvm_ia32dep.c
185
gregs->kregs[KREG_EAX] = regs->r_eax;
usr/src/cmd/mdb/intel/mdb/kvm_ia32dep.c
186
gregs->kregs[KREG_EBX] = regs->r_ebx;
usr/src/cmd/mdb/intel/mdb/kvm_ia32dep.c
187
gregs->kregs[KREG_ECX] = regs->r_ecx;
usr/src/cmd/mdb/intel/mdb/kvm_ia32dep.c
188
gregs->kregs[KREG_EDX] = regs->r_edx;
usr/src/cmd/mdb/intel/mdb/kvm_ia32dep.c
189
gregs->kregs[KREG_ESI] = regs->r_esi;
usr/src/cmd/mdb/intel/mdb/kvm_ia32dep.c
190
gregs->kregs[KREG_EDI] = regs->r_edi;
usr/src/cmd/mdb/intel/mdb/kvm_ia32dep.c
191
gregs->kregs[KREG_EBP] = regs->r_ebp;
usr/src/cmd/mdb/intel/mdb/kvm_ia32dep.c
192
gregs->kregs[KREG_ESP] = regs->r_esp;
usr/src/cmd/mdb/intel/mdb/kvm_ia32dep.c
193
gregs->kregs[KREG_CS] = regs->r_cs;
usr/src/cmd/mdb/intel/mdb/kvm_ia32dep.c
194
gregs->kregs[KREG_DS] = regs->r_ds;
usr/src/cmd/mdb/intel/mdb/kvm_ia32dep.c
195
gregs->kregs[KREG_SS] = regs->r_ss;
usr/src/cmd/mdb/intel/mdb/kvm_ia32dep.c
196
gregs->kregs[KREG_ES] = regs->r_es;
usr/src/cmd/mdb/intel/mdb/kvm_ia32dep.c
197
gregs->kregs[KREG_FS] = regs->r_fs;
usr/src/cmd/mdb/intel/mdb/kvm_ia32dep.c
198
gregs->kregs[KREG_GS] = regs->r_gs;
usr/src/cmd/mdb/intel/mdb/kvm_ia32dep.c
199
gregs->kregs[KREG_EFLAGS] = regs->r_efl;
usr/src/cmd/mdb/intel/mdb/kvm_ia32dep.c
200
gregs->kregs[KREG_EIP] = regs->r_eip;
usr/src/cmd/mdb/intel/mdb/kvm_ia32dep.c
201
gregs->kregs[KREG_UESP] = regs->r_uesp;
usr/src/cmd/mdb/intel/mdb/kvm_ia32dep.c
202
gregs->kregs[KREG_TRAPNO] = regs->r_trapno;
usr/src/cmd/mdb/intel/mdb/kvm_ia32dep.c
203
gregs->kregs[KREG_ERR] = regs->r_err;
usr/src/cmd/mdb/intel/mdb/kvm_ia32dep.c
212
struct regs regs;
usr/src/cmd/mdb/intel/mdb/kvm_ia32dep.c
292
mdb_tgt_vread(t, ®s, sizeof (regs), addr) == sizeof (regs)) {
usr/src/cmd/mdb/intel/mdb/kvm_ia32dep.c
293
kt_regs_to_kregs(®s, kt->k_regs);
usr/src/cmd/mdb/intel/mdb/kvm_isadep.c
133
mdb_tgt_gregset_t regs;
usr/src/cmd/mdb/intel/mdb/kvm_isadep.c
156
if (kt_kvmregs(t, cpuid, ®s) != 0) {
usr/src/cmd/mdb/intel/mdb/kvm_isadep.c
165
addr = regs.kregs[KREG_FP];
usr/src/cmd/mdb/intel/mdb/kvm_isadep.c
178
mdb_tgt_gregset_t regs;
usr/src/cmd/mdb/intel/mdb/kvm_isadep.c
203
if (kt_kvmregs(t, cpuid, ®s) != 0) {
usr/src/cmd/mdb/intel/mdb/kvm_isadep.c
208
return (kt_regs((uintptr_t)®s, flags, argc, argv));
usr/src/cmd/mdb/intel/mdb/kvm_isadep.h
40
extern void kt_regs_to_kregs(struct regs *, mdb_tgt_gregset_t *);
usr/src/cmd/mdb/intel/modules/genunix/gcore_isadep.c
101
struct regs *r = lwptoregs(lwp);
usr/src/cmd/mdb/intel/modules/genunix/gcore_isadep.c
46
struct regs rgs;
usr/src/cmd/mdb/intel/modules/genunix/gcore_isadep.c
47
struct regs *rp;
usr/src/cmd/mdb/intel/modules/mdb_kb/mdb_kb.c
1508
struct regs *regs;
usr/src/cmd/mdb/intel/modules/mdb_kb/mdb_kb.c
1519
regs = &mregs->pm_gregs;
usr/src/cmd/mdb/intel/modules/mdb_kb/mdb_kb.c
1521
regs->r_ss = ur->ss;
usr/src/cmd/mdb/intel/modules/mdb_kb/mdb_kb.c
1522
regs->r_cs = ur->cs;
usr/src/cmd/mdb/intel/modules/mdb_kb/mdb_kb.c
1523
regs->r_ds = ur->ds;
usr/src/cmd/mdb/intel/modules/mdb_kb/mdb_kb.c
1524
regs->r_es = ur->es;
usr/src/cmd/mdb/intel/modules/mdb_kb/mdb_kb.c
1525
regs->r_fs = ur->fs;
usr/src/cmd/mdb/intel/modules/mdb_kb/mdb_kb.c
1526
regs->r_gs = ur->gs;
usr/src/cmd/mdb/intel/modules/mdb_kb/mdb_kb.c
1527
regs->r_trapno = ur->entry_vector;
usr/src/cmd/mdb/intel/modules/mdb_kb/mdb_kb.c
1528
regs->r_err = ur->error_code;
usr/src/cmd/mdb/intel/modules/mdb_kb/mdb_kb.c
1530
regs->r_savfp = ur->rbp;
usr/src/cmd/mdb/intel/modules/mdb_kb/mdb_kb.c
1531
regs->r_savpc = ur->rip;
usr/src/cmd/mdb/intel/modules/mdb_kb/mdb_kb.c
1532
regs->r_rdi = ur->rdi;
usr/src/cmd/mdb/intel/modules/mdb_kb/mdb_kb.c
1533
regs->r_rsi = ur->rsi;
usr/src/cmd/mdb/intel/modules/mdb_kb/mdb_kb.c
1534
regs->r_rdx = ur->rdx;
usr/src/cmd/mdb/intel/modules/mdb_kb/mdb_kb.c
1535
regs->r_rcx = ur->rcx;
usr/src/cmd/mdb/intel/modules/mdb_kb/mdb_kb.c
1536
regs->r_r8 = ur->r8;
usr/src/cmd/mdb/intel/modules/mdb_kb/mdb_kb.c
1537
regs->r_r9 = ur->r9;
usr/src/cmd/mdb/intel/modules/mdb_kb/mdb_kb.c
1538
regs->r_rax = ur->rax;
usr/src/cmd/mdb/intel/modules/mdb_kb/mdb_kb.c
1539
regs->r_rbx = ur->rbx;
usr/src/cmd/mdb/intel/modules/mdb_kb/mdb_kb.c
1540
regs->r_rbp = ur->rbp;
usr/src/cmd/mdb/intel/modules/mdb_kb/mdb_kb.c
1541
regs->r_r10 = ur->r10;
usr/src/cmd/mdb/intel/modules/mdb_kb/mdb_kb.c
1542
regs->r_r11 = ur->r11;
usr/src/cmd/mdb/intel/modules/mdb_kb/mdb_kb.c
1543
regs->r_r12 = ur->r12;
usr/src/cmd/mdb/intel/modules/mdb_kb/mdb_kb.c
1544
regs->r_r13 = ur->r13;
usr/src/cmd/mdb/intel/modules/mdb_kb/mdb_kb.c
1545
regs->r_r14 = ur->r14;
usr/src/cmd/mdb/intel/modules/mdb_kb/mdb_kb.c
1546
regs->r_r15 = ur->r15;
usr/src/cmd/mdb/intel/modules/mdb_kb/mdb_kb.c
1547
regs->r_rip = ur->rip;
usr/src/cmd/mdb/intel/modules/mdb_kb/mdb_kb.c
1548
regs->r_rfl = ur->rflags;
usr/src/cmd/mdb/intel/modules/mdb_kb/mdb_kb.c
1549
regs->r_rsp = ur->rsp;
usr/src/cmd/mdb/intel/modules/mdb_kb/mdb_kb.c
1551
regs->r_savfp = ur->ebp;
usr/src/cmd/mdb/intel/modules/mdb_kb/mdb_kb.c
1552
regs->r_savpc = ur->eip;
usr/src/cmd/mdb/intel/modules/mdb_kb/mdb_kb.c
1553
regs->r_edi = ur->edi;
usr/src/cmd/mdb/intel/modules/mdb_kb/mdb_kb.c
1554
regs->r_esi = ur->esi;
usr/src/cmd/mdb/intel/modules/mdb_kb/mdb_kb.c
1555
regs->r_ebp = ur->ebp;
usr/src/cmd/mdb/intel/modules/mdb_kb/mdb_kb.c
1556
regs->r_esp = ur->esp;
usr/src/cmd/mdb/intel/modules/mdb_kb/mdb_kb.c
1557
regs->r_ebx = ur->ebx;
usr/src/cmd/mdb/intel/modules/mdb_kb/mdb_kb.c
1558
regs->r_edx = ur->edx;
usr/src/cmd/mdb/intel/modules/mdb_kb/mdb_kb.c
1559
regs->r_ecx = ur->ecx;
usr/src/cmd/mdb/intel/modules/mdb_kb/mdb_kb.c
1560
regs->r_eax = ur->eax;
usr/src/cmd/mdb/intel/modules/mdb_kb/mdb_kb.c
1561
regs->r_eip = ur->eip;
usr/src/cmd/mdb/intel/modules/mdb_kb/mdb_kb.c
1562
regs->r_efl = ur->eflags;
usr/src/cmd/mdb/intel/modules/mdb_kb/mdb_kb.c
1563
regs->r_uesp = 0;
usr/src/cmd/pcieadm/pcieadm.c
238
int inst, nprop, *regs;
usr/src/cmd/pcieadm/pcieadm.c
253
nprop = di_prop_lookup_ints(DDI_DEV_T_ANY, node, "reg", ®s);
usr/src/cmd/pcieadm/pcieadm.c
258
(void) snprintf(bdf, sizeof (bdf), "%x/%x/%x", PCI_REG_BUS_G(regs[0]),
usr/src/cmd/pcieadm/pcieadm.c
259
PCI_REG_DEV_G(regs[0]), PCI_REG_FUNC_G(regs[0]));
usr/src/cmd/pcieadm/pcieadm.c
261
PCI_REG_BUS_G(regs[0]), PCI_REG_DEV_G(regs[0]),
usr/src/cmd/pcieadm/pcieadm.c
262
PCI_REG_FUNC_G(regs[0]));
usr/src/cmd/pcieadm/pcieadm.c
556
int fd, nregs, *regs;
usr/src/cmd/pcieadm/pcieadm.c
583
®s);
usr/src/cmd/pcieadm/pcieadm.c
597
pck->pck_bus = PCI_REG_BUS_G(regs[0]);
usr/src/cmd/pcieadm/pcieadm.c
598
pck->pck_dev = PCI_REG_DEV_G(regs[0]);
usr/src/cmd/pcieadm/pcieadm.c
599
pck->pck_func = PCI_REG_FUNC_G(regs[0]);
usr/src/cmd/pcieadm/pcieadm_cfgspace.c
5753
int fd, nregs, *regs;
usr/src/cmd/pcieadm/pcieadm_cfgspace.c
5769
nregs = di_prop_lookup_ints(DDI_DEV_T_ANY, devi, "reg", ®s);
usr/src/cmd/pcieadm/pcieadm_cfgspace.c
5778
PCI_REG_BUS_G(regs[0]), PCI_REG_DEV_G(regs[0]),
usr/src/cmd/pcieadm/pcieadm_cfgspace.c
5779
PCI_REG_FUNC_G(regs[0]));
usr/src/cmd/pcieadm/pcieadm_devs.c
423
int nprop, *regs = NULL, *did, *vid, *mwidth, *cwidth, *rev;
usr/src/cmd/pcieadm/pcieadm_devs.c
441
nprop = di_prop_lookup_ints(DDI_DEV_T_ANY, node, "reg", ®s);
usr/src/cmd/pcieadm/pcieadm_devs.c
448
oarg.psdo_bus = PCI_REG_BUS_G(regs[0]);
usr/src/cmd/pcieadm/pcieadm_devs.c
449
oarg.psdo_dev = PCI_REG_DEV_G(regs[0]);
usr/src/cmd/pcieadm/pcieadm_devs.c
450
oarg.psdo_func = PCI_REG_FUNC_G(regs[0]);
usr/src/cmd/ptools/pstack/pstack.c
340
((error = td_thr_getgregs(Thp, tip->regs)) != TD_OK &&
usr/src/cmd/ptools/pstack/pstack.c
342
(void) memset(tip->regs, 0, sizeof (prgregset_t));
usr/src/cmd/ptools/pstack/pstack.c
413
(void) memcpy(lwpstatus.pr_reg, tip->regs,
usr/src/cmd/ptools/pstack/pstack.c
477
(void) memcpy(lwpstatus.pr_reg, tip->regs,
usr/src/cmd/ptools/pstack/pstack.c
67
prgregset_t regs;
usr/src/cmd/sgs/rtld/common/audit.c
805
uint_t ndx, void *regs, uint_t *flags)
usr/src/cmd/sgs/rtld/common/audit.c
837
&(racp->ac_cookie), &(dacp->ac_cookie), regs,
usr/src/cmd/sgs/rtld/common/audit.c
856
void *regs, uint_t *flags)
usr/src/cmd/sgs/rtld/common/audit.c
872
ndx, regs, flags);
usr/src/cmd/sgs/rtld/common/audit.c
876
ndx, regs, flags);
usr/src/cmd/sunpc/other/dos2unix.c
326
union REGS regs;
usr/src/cmd/sunpc/other/dos2unix.c
327
regs.h.ah = 0x66; /* get/set global code page */
usr/src/cmd/sunpc/other/dos2unix.c
328
regs.h.al = 0x01; /* get */
usr/src/cmd/sunpc/other/dos2unix.c
329
intdos(®s, ®s);
usr/src/cmd/sunpc/other/dos2unix.c
330
type = regs.x.bx;
usr/src/cmd/sunpc/other/unix2dos.c
331
union REGS regs;
usr/src/cmd/sunpc/other/unix2dos.c
332
regs.h.ah = 0x66; /* get/set global code page */
usr/src/cmd/sunpc/other/unix2dos.c
333
regs.h.al = 0x01; /* get */
usr/src/cmd/sunpc/other/unix2dos.c
334
intdos(®s, ®s);
usr/src/cmd/sunpc/other/unix2dos.c
335
type = regs.x.bx;
usr/src/common/dis/i386/dis_tables.c
3947
char **regs;
usr/src/common/dis/i386/dis_tables.c
3951
regs = (char **)dis_REG32;
usr/src/common/dis/i386/dis_tables.c
3953
regs = (char **)dis_REG64;
usr/src/common/dis/i386/dis_tables.c
3965
bregs = regs;
usr/src/common/dis/i386/dis_tables.c
3979
(void) strlcat(opnd, regs[base], OPLEN);
usr/src/grub/grub-0.97/netboot/tg3.c
105
#define tw32_mailbox(reg, val) writel(((val) & 0xffffffff), tg3.regs + (reg))
usr/src/grub/grub-0.97/netboot/tg3.c
106
#define tw16(reg,val) writew(((val) & 0xffff), tg3.regs + (reg))
usr/src/grub/grub-0.97/netboot/tg3.c
107
#define tw8(reg,val) writeb(((val) & 0xff), tg3.regs + (reg))
usr/src/grub/grub-0.97/netboot/tg3.c
108
#define tr32(reg) readl(tg3.regs + (reg))
usr/src/grub/grub-0.97/netboot/tg3.c
109
#define tr16(reg) readw(tg3.regs + (reg))
usr/src/grub/grub-0.97/netboot/tg3.c
110
#define tr8(reg) readb(tg3.regs + (reg))
usr/src/grub/grub-0.97/netboot/tg3.c
3134
iounmap((void *)tp->regs);
usr/src/grub/grub-0.97/netboot/tg3.c
3215
tp->regs = (unsigned long) ioremap(tg3reg_base, tg3reg_len);
usr/src/grub/grub-0.97/netboot/tg3.c
3216
if (tp->regs == 0UL) {
usr/src/grub/grub-0.97/netboot/tg3.c
3280
iounmap((void *)tp->regs);
usr/src/grub/grub-0.97/netboot/tg3.h
2154
unsigned long regs;
usr/src/head/ieeefp.h
225
long regs[19]; /* all registers */
usr/src/lib/libc/amd64/unwind/unwind.c
156
void _Unw_capture_regs(uint64_t *regs);
usr/src/lib/libc/amd64/unwind/unwind.c
157
void _Unw_jmp(uint64_t pc, uint64_t *regs);
usr/src/lib/libcurses/screen/tparm.c
267
short *regs = cur_term->_regs;
usr/src/lib/libcurses/screen/tparm.c
547
regs[*cp++ - 'A'] =
usr/src/lib/libcurses/screen/tparm.c
566
push(&stk, regs[*cp++ - 'A']);
usr/src/lib/libdisasm/common/dis_sparc_fmt.c
1934
const char **regs = NULL;
usr/src/lib/libdisasm/common/dis_sparc_fmt.c
1953
regs = fcc_names;
usr/src/lib/libdisasm/common/dis_sparc_fmt.c
1955
regs = icc_names;
usr/src/lib/libdisasm/common/dis_sparc_fmt.c
1956
if (regs[f->f3c.cc] == NULL)
usr/src/lib/libdisasm/common/dis_sparc_fmt.c
1962
bprintf(dhp, "%s, ", regs[f->f3c.cc]);
usr/src/lib/libdwarf/common/dwarf_line.c
60
_dwarf_set_line_table_regs_default_values(Dwarf_Line_Registers regs,
usr/src/lib/libdwarf/common/dwarf_line.c
64
*regs = _dwarf_line_table_regs_default_values;
usr/src/lib/libdwarf/common/dwarf_line.c
67
regs->lr_file = 0;
usr/src/lib/libdwarf/common/dwarf_line.c
69
regs->lr_is_stmt = is_stmt;
usr/src/lib/libdwarf/common/dwarf_line.h
280
Dwarf_Line_Registers regs,
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1065
struct Dwarf_Line_Registers_s regs;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1104
_dwarf_set_line_table_regs_default_values(®s,
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1204
regs.lr_address = regs.lr_address + (operation_advance *
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1207
regs.lr_address = regs.lr_address +
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1209
((regs.lr_op_index + operation_advance)/
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1211
regs.lr_op_index = (regs.lr_op_index +operation_advance)%
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1215
regs.lr_line = regs.lr_line + line_context->lc_line_base +
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1217
if ((Dwarf_Signed)regs.lr_line < 0) {
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1226
"are not correct.",(Dwarf_Signed)regs.lr_line);
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1231
regs.lr_line = 0;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1245
opcode,line_count+1, ®s,is_single_table, is_actuals_table);
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1264
curr_line->li_address = regs.lr_address;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1266
(Dwarf_Signed) regs.lr_file;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1268
(Dwarf_Signed) regs.lr_line;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1270
(Dwarf_Half) regs.lr_column;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1272
regs.lr_is_stmt;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1274
regs.lr_basic_block;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1277
li_epilogue_begin = regs.lr_epilogue_begin;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1279
regs.lr_prologue_end;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1280
curr_line->li_addr_line.li_l_data.li_isa = regs.lr_isa;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1282
regs.lr_discriminator;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1284
regs.lr_call_context;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1286
regs.lr_subprogram;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1307
regs.lr_basic_block = false;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1308
regs.lr_prologue_end = false;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1309
regs.lr_epilogue_begin = false;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1310
regs.lr_discriminator = 0;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1324
opcode,line_count+1, ®s,is_single_table, is_actuals_table);
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1340
curr_line->li_address = regs.lr_address;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1342
(Dwarf_Signed) regs.lr_file;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1344
(Dwarf_Signed) regs.lr_line;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1346
(Dwarf_Half) regs.lr_column;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1348
regs.lr_is_stmt;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1350
li_basic_block = regs.lr_basic_block;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1352
li_end_sequence = regs.lr_end_sequence;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1356
li_epilogue_begin = regs.lr_epilogue_begin;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1358
li_prologue_end = regs.lr_prologue_end;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1359
curr_line->li_addr_line.li_l_data.li_isa = regs.lr_isa;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1361
regs.lr_discriminator;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1363
regs.lr_call_context;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1365
regs.lr_subprogram;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1384
regs.lr_basic_block = false;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1385
regs.lr_prologue_end = false;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1386
regs.lr_epilogue_begin = false;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1387
regs.lr_discriminator = 0;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1421
regs.lr_address = regs.lr_address +
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1455
regs.lr_line = regs.lr_line + advance_line;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1456
if ((Dwarf_Signed)regs.lr_line < 0) {
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1465
(Dwarf_Signed)regs.lr_line);
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1473
regs.lr_line = 0;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1499
regs.lr_file = utmp2;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1504
regs.lr_file);
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1527
regs.lr_column = utmp2;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1533
regs.lr_column);
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1536
regs.lr_column);
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1543
regs.lr_is_stmt = !regs.lr_is_stmt;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1550
regs.lr_basic_block = true;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1564
regs.lr_address = regs.lr_address +
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1570
regs.lr_address = regs.lr_address +
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1572
((regs.lr_op_index + operation_advance)/
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1574
regs.lr_op_index = (regs.lr_op_index +operation_advance)%
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1582
regs.lr_address);
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1629
regs.lr_address = regs.lr_address + fixed_advance_pc;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1630
regs.lr_op_index = 0;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1642
regs.lr_address);
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1652
regs.lr_prologue_end = true;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1657
regs.lr_epilogue_begin = true;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1683
regs.lr_isa = utmp2;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1694
if (regs.lr_isa != utmp2) {
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1735
regs.lr_line = regs.lr_line + advance_line;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1736
if ((Dwarf_Signed)regs.lr_line < 0) {
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1745
(Dwarf_Signed)regs.lr_line);
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1753
regs.lr_line = 0;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1761
if (regs.lr_line >= 1 &&
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1762
regs.lr_line - 1 < logicals_count) {
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1763
regs.lr_address =
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1764
logicals[regs.lr_line - 1]->li_address;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1765
regs.lr_op_index = 0;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1779
regs.lr_address);
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1790
regs.lr_line);
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1793
regs.lr_line);
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1805
regs.lr_call_context = 0;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1818
regs.lr_subprogram = utmp2;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1851
regs.lr_call_context = line_count + stmp;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1857
regs.lr_subprogram = ilcuw;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1878
regs.lr_subprogram);
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1881
regs.lr_subprogram);
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1884
regs.lr_call_context);
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1887
regs.lr_call_context);
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1897
Dwarf_Unsigned logical_num = regs.lr_call_context;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1906
regs.lr_file =
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1908
regs.lr_line =
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1910
regs.lr_column =
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1912
regs.lr_discriminator =
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1914
regs.lr_is_stmt =
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1916
regs.lr_call_context =
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
1918
regs.lr_subprogram =
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
2025
regs.lr_end_sequence = true;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
2039
ext_opcode, line_count+1,®s,
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
2042
curr_line->li_address = regs.lr_address;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
2044
(Dwarf_Signed) regs.lr_file;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
2046
(Dwarf_Signed) regs.lr_line;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
2048
(Dwarf_Half) regs.lr_column;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
2050
regs.lr_is_stmt;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
2052
li_basic_block = regs.lr_basic_block;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
2054
li_end_sequence = regs.lr_end_sequence;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
2058
li_epilogue_begin = regs.lr_epilogue_begin;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
2060
li_prologue_end = regs.lr_prologue_end;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
2061
curr_line->li_addr_line.li_l_data.li_isa = regs.lr_isa;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
2063
regs.lr_discriminator;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
2065
regs.lr_call_context;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
2067
regs.lr_subprogram;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
2083
_dwarf_set_line_table_regs_default_values(®s,
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
2095
®s.lr_address,line_ptr,
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
2116
regs.lr_address);
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
2135
curr_line->li_address = regs.lr_address;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
2154
regs.lr_op_index = 0;
usr/src/lib/libdwarf/common/dwarf_line_table_reader_common.h
2308
regs.lr_discriminator = utmp2;
usr/src/lib/libdwarf/common/dwarf_print_lines.c
100
dwarfstring_append_printf_u(&m1,"/%01u",regs->lr_op_index);
usr/src/lib/libdwarf/common/dwarf_print_lines.c
101
dwarfstring_append_printf_u(&m1," %5lu", regs->lr_line);
usr/src/lib/libdwarf/common/dwarf_print_lines.c
102
dwarfstring_append_printf_u(&m1," %3d",regs->lr_isa);
usr/src/lib/libdwarf/common/dwarf_print_lines.c
103
dwarfstring_append_printf_i(&m1," %1d", regs->lr_basic_block);
usr/src/lib/libdwarf/common/dwarf_print_lines.c
104
dwarfstring_append_printf_i(&m1,"%1d\n", regs->lr_end_sequence);
usr/src/lib/libdwarf/common/dwarf_print_lines.c
117
"x%" DW_PR_XZEROS DW_PR_DUx, regs->lr_address);
usr/src/lib/libdwarf/common/dwarf_print_lines.c
119
"/%01u", regs->lr_op_index);
usr/src/lib/libdwarf/common/dwarf_print_lines.c
120
dwarfstring_append_printf_u(&m1," %2lu ",regs->lr_file);
usr/src/lib/libdwarf/common/dwarf_print_lines.c
121
dwarfstring_append_printf_u(&m1,"%4lu ",regs->lr_line);
usr/src/lib/libdwarf/common/dwarf_print_lines.c
122
dwarfstring_append_printf_u(&m1,"%1lu",regs->lr_column);
usr/src/lib/libdwarf/common/dwarf_print_lines.c
123
if (regs->lr_discriminator ||
usr/src/lib/libdwarf/common/dwarf_print_lines.c
124
regs->lr_prologue_end ||
usr/src/lib/libdwarf/common/dwarf_print_lines.c
125
regs->lr_epilogue_begin ||
usr/src/lib/libdwarf/common/dwarf_print_lines.c
126
regs->lr_isa ||
usr/src/lib/libdwarf/common/dwarf_print_lines.c
127
regs->lr_is_stmt ||
usr/src/lib/libdwarf/common/dwarf_print_lines.c
128
regs->lr_call_context ||
usr/src/lib/libdwarf/common/dwarf_print_lines.c
129
regs->lr_subprogram) {
usr/src/lib/libdwarf/common/dwarf_print_lines.c
132
regs->lr_discriminator); /* DWARF4 */
usr/src/lib/libdwarf/common/dwarf_print_lines.c
134
" x%02" DW_PR_DUx , regs->lr_call_context); /* EXPERIMENTAL */
usr/src/lib/libdwarf/common/dwarf_print_lines.c
136
" x%02" DW_PR_DUx , regs->lr_subprogram); /* EXPERIMENTAL */
usr/src/lib/libdwarf/common/dwarf_print_lines.c
138
" %1d", regs->lr_is_stmt);
usr/src/lib/libdwarf/common/dwarf_print_lines.c
140
"%1d", (int) regs->lr_isa);
usr/src/lib/libdwarf/common/dwarf_print_lines.c
142
"%1d", regs->lr_prologue_end); /* DWARF3 */
usr/src/lib/libdwarf/common/dwarf_print_lines.c
144
"%1d", regs->lr_epilogue_begin); /* DWARF3 */
usr/src/lib/libdwarf/common/dwarf_print_lines.c
160
regs->lr_address);
usr/src/lib/libdwarf/common/dwarf_print_lines.c
162
"%2lu ", regs->lr_file);
usr/src/lib/libdwarf/common/dwarf_print_lines.c
164
"%4lu ", regs->lr_line);
usr/src/lib/libdwarf/common/dwarf_print_lines.c
166
"%2lu ", regs->lr_column);
usr/src/lib/libdwarf/common/dwarf_print_lines.c
168
"%1d ",regs->lr_is_stmt);
usr/src/lib/libdwarf/common/dwarf_print_lines.c
170
"%1d ", regs->lr_basic_block);
usr/src/lib/libdwarf/common/dwarf_print_lines.c
172
"%1d",regs->lr_end_sequence);
usr/src/lib/libdwarf/common/dwarf_print_lines.c
173
if (regs->lr_discriminator ||
usr/src/lib/libdwarf/common/dwarf_print_lines.c
174
regs->lr_prologue_end ||
usr/src/lib/libdwarf/common/dwarf_print_lines.c
175
regs->lr_epilogue_begin ||
usr/src/lib/libdwarf/common/dwarf_print_lines.c
176
regs->lr_isa) {
usr/src/lib/libdwarf/common/dwarf_print_lines.c
178
" %1d", regs->lr_prologue_end); /* DWARF3 */
usr/src/lib/libdwarf/common/dwarf_print_lines.c
180
" %1d", regs->lr_epilogue_begin); /* DWARF3 */
usr/src/lib/libdwarf/common/dwarf_print_lines.c
182
" %1d", regs->lr_isa); /* DWARF3 */
usr/src/lib/libdwarf/common/dwarf_print_lines.c
184
" 0x%" DW_PR_DUx , regs->lr_discriminator); /* DWARF4 */
usr/src/lib/libdwarf/common/dwarf_print_lines.c
89
struct Dwarf_Line_Registers_s * regs,
usr/src/lib/libdwarf/common/dwarf_print_lines.c
99
regs->lr_address);
usr/src/lib/libproc/amd64/Pisadep.c
259
Pstack_iter32(struct ps_prochandle *P, const prgregset_t regs,
usr/src/lib/libproc/amd64/Pisadep.c
295
(void) memcpy(gregs, regs, sizeof (gregs));
usr/src/lib/libproc/amd64/Pisadep.c
297
fp = regs[R_FP];
usr/src/lib/libproc/amd64/Pisadep.c
298
ctf_pc = pc = regs[R_PC];
usr/src/lib/libproc/amd64/Pisadep.c
496
Pstack_iter(struct ps_prochandle *P, const prgregset_t regs,
usr/src/lib/libproc/amd64/Pisadep.c
532
return (Pstack_iter32(P, regs, func, arg));
usr/src/lib/libproc/amd64/Pisadep.c
535
(void) memcpy(gregs, regs, sizeof (gregs));
usr/src/lib/libproc/common/Pservice.c
125
ps_lgetregs(struct ps_prochandle *P, lwpid_t lwpid, prgregset_t regs)
usr/src/lib/libproc/common/Pservice.c
130
if (Plwp_getregs(P, lwpid, regs) == 0)
usr/src/lib/libproc/common/Pservice.c
137
ps_lsetregs(struct ps_prochandle *P, lwpid_t lwpid, const prgregset_t regs)
usr/src/lib/libproc/common/Pservice.c
142
if (Plwp_setregs(P, lwpid, regs) == 0)
usr/src/lib/libproc/common/Pservice.c
149
ps_lgetfpregs(struct ps_prochandle *P, lwpid_t lwpid, prfpregset_t *regs)
usr/src/lib/libproc/common/Pservice.c
154
if (Plwp_getfpregs(P, lwpid, regs) == 0)
usr/src/lib/libproc/common/Pservice.c
161
ps_lsetfpregs(struct ps_prochandle *P, lwpid_t lwpid, const prfpregset_t *regs)
usr/src/lib/libproc/common/Pservice.c
166
if (Plwp_setfpregs(P, lwpid, regs) == 0)
usr/src/lib/libproc/common/Pservice.c
293
prgregset_t regs;
usr/src/lib/libproc/common/Pservice.c
307
if ((error = ps_lgetregs(P, lwpid, regs)) != PS_OK)
usr/src/lib/libproc/common/Pservice.c
310
gs = regs[GS];
usr/src/lib/libproc/common/Psyscall.c
117
(void) memcpy(&cmd.regs, &P->status.pr_lwp.pr_reg[0],
usr/src/lib/libproc/common/Psyscall.c
88
prgregset_t regs;
usr/src/lib/libproc/i386/Pisadep.c
197
Pstack_iter(struct ps_prochandle *P, const prgregset_t regs,
usr/src/lib/libproc/i386/Pisadep.c
232
(void) memcpy(gregs, regs, sizeof (gregs));
usr/src/lib/libproc/i386/Pisadep.c
234
fp = regs[R_FP];
usr/src/lib/libproc/i386/Pisadep.c
235
ctf_pc = pc = regs[R_PC];
usr/src/lib/libproc/sparc/Pisadep.c
255
Pstack_iter(struct ps_prochandle *P, const prgregset_t regs,
usr/src/lib/libproc/sparc/Pisadep.c
272
(void) memcpy(gregs, regs, sizeof (gregs));
usr/src/lib/libproc/sparcv9/Pisadep.c
337
Pstack_iter(struct ps_prochandle *P, const prgregset_t regs,
usr/src/lib/libproc/sparcv9/Pisadep.c
354
(void) memcpy(gregs, regs, sizeof (gregs));
usr/src/lib/libslp/javalib/com/sun/slp/ServerDATable.java
382
Enumeration regs = forwardRegs.elements();
usr/src/lib/libslp/javalib/com/sun/slp/ServerDATable.java
419
while (regs.hasMoreElements()) {
usr/src/lib/libslp/javalib/com/sun/slp/ServerDATable.java
420
SrvLocMsg reg = (SrvLocMsg)regs.nextElement();
usr/src/stand/lib/fs/nfs/pmap.c
202
xdr_pmap(XDR *xdrs, struct pmap *regs)
usr/src/stand/lib/fs/nfs/pmap.c
204
if (xdr_rpcprog(xdrs, ®s->pm_prog) &&
usr/src/stand/lib/fs/nfs/pmap.c
205
xdr_rpcvers(xdrs, ®s->pm_vers) &&
usr/src/stand/lib/fs/nfs/pmap.c
206
xdr_rpcprot(xdrs, ®s->pm_prot))
usr/src/stand/lib/fs/nfs/pmap.c
207
return (xdr_rpcprot(xdrs, ®s->pm_port));
usr/src/test/bhyve-tests/tests/common/common.c
156
uint_t regs[4];
usr/src/test/bhyve-tests/tests/common/common.c
159
do_cpuid(0, regs);
usr/src/test/bhyve-tests/tests/common/common.c
160
((uint_t *)&cpu_vendor)[0] = regs[1];
usr/src/test/bhyve-tests/tests/common/common.c
161
((uint_t *)&cpu_vendor)[1] = regs[3];
usr/src/test/bhyve-tests/tests/common/common.c
162
((uint_t *)&cpu_vendor)[2] = regs[2];
usr/src/test/bhyve-tests/tests/inst_emul/inout.c
172
uint_t regs[4];
usr/src/test/bhyve-tests/tests/inst_emul/inout.c
173
do_cpuid(0x8000000a, regs);
usr/src/test/bhyve-tests/tests/inst_emul/inout.c
174
const bool have_decodeassist = (regs[3] & (1 << 7)) != 0;
usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid.c
129
uint32_t regs[4];
usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid.c
132
cpuid(0, 0, regs);
usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid.c
133
if (!leaf_cmp(regs, expected_base)) {
usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid.c
138
cpuid(regs[0], 0, expected_fallback);
usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid.c
142
cpuid(cases[i].func, cases[i].idx, regs);
usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid.c
144
if (!leaf_cmp(regs, expected_fallback)) {
usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid.c
148
if (regs[0] != cases[i].val_eax) {
usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid_guest_state.c
105
cpuid(0xD, 0, regs);
usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid_guest_state.c
107
if (regs[0] != TEST_CPUID_D_0_EAX ||
usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid_guest_state.c
108
regs[2] != XSAVE_AREA_SIZE_MAX || regs[3] != 0) {
usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid_guest_state.c
114
cpuid(0xD, 0, regs);
usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid_guest_state.c
115
if (regs[1] != XSAVE_AREA_SIZE_BASE) {
usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid_guest_state.c
120
cpuid(0xD, 0, regs);
usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid_guest_state.c
121
if (regs[1] != XSAVE_AREA_SIZE_BASE + XSAVE_AREA_SIZE_AVX) {
usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid_guest_state.c
134
uint32_t regs[4];
usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid_guest_state.c
146
cpuid(leaf, 1, regs);
usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid_guest_state.c
148
if (regs[0] != TEST_CPUID_D_1_EAX || regs[2] != 0 ||
usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid_guest_state.c
149
regs[3] != 0) {
usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid_guest_state.c
155
cpuid(leaf, 1, regs);
usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid_guest_state.c
156
if (regs[1] != XSAVE_AREA_SIZE_BASE) {
usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid_guest_state.c
161
cpuid(leaf, 1, regs);
usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid_guest_state.c
162
if (regs[1] != XSAVE_AREA_SIZE_BASE + XSAVE_AREA_SIZE_AVX) {
usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid_guest_state.c
178
uint32_t regs[4];
usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid_guest_state.c
185
cpuid(0, 0, regs);
usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid_guest_state.c
186
if (!leaf_cmp(regs, expected_base)) {
usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid_guest_state.c
211
uint32_t regs[4];
usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid_guest_state.c
219
cpuid(1, 0, regs);
usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid_guest_state.c
220
if (!leaf_cmp(regs, zero_cpuid)) {
usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid_guest_state.c
46
uint32_t regs[4];
usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid_guest_state.c
48
cpuid(1, 0, regs);
usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid_guest_state.c
49
if (regs[0] != TEST_CPUID_1_EAX || regs[1] != TEST_CPUID_1_EBX ||
usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid_guest_state.c
50
regs[3] != TEST_CPUID_1_EDX) {
usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid_guest_state.c
59
uint32_t regs[4];
usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid_guest_state.c
63
cpuid(1, 0, regs);
usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid_guest_state.c
64
if (regs[2] != (TEST_CPUID_1_ECX & ~CPUID2_OSXSAVE)) {
usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid_guest_state.c
70
cpuid(1, 0, regs);
usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid_guest_state.c
71
if (regs[2] != (TEST_CPUID_1_ECX | CPUID2_OSXSAVE)) {
usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid_guest_state.c
81
uint32_t regs[4];
usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid_guest_state.c
84
cpuid(1, 0, regs);
usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid_guest_state.c
85
if (regs[3] != (TEST_CPUID_1_EDX & ~CPUID_APIC)) {
usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid_guest_state.c
89
cpuid(1, 0, regs);
usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid_guest_state.c
90
if (regs[3] != (TEST_CPUID_1_EDX | CPUID_APIC)) {
usr/src/test/bhyve-tests/tests/inst_emul/payload_cpuid_guest_state.c
99
uint32_t regs[4];
usr/src/tools/smatch/src/compile-i386.c
309
const unsigned char regs[30];
usr/src/tools/smatch/src/compile-i386.c
338
const unsigned char *regs = info->aliases+1;
usr/src/tools/smatch/src/compile-i386.c
340
while ((regno = *regs) != NOREG) {
usr/src/tools/smatch/src/compile-i386.c
341
regs++;
usr/src/tools/smatch/src/compile-i386.c
353
const unsigned char *regs = class->regs;
usr/src/tools/smatch/src/compile-i386.c
356
while ((regno = *regs) != NOREG) {
usr/src/tools/smatch/src/compile-i386.c
357
regs++;
usr/src/uts/common/dtrace/dtrace.c
4074
dtrace_dif_subr(uint_t subr, uint_t rd, uint64_t *regs,
usr/src/uts/common/dtrace/dtrace.c
4094
regs[rd] = (dtrace_gethrtime() * 2416 + 374441) % 1771875;
usr/src/uts/common/dtrace/dtrace.c
4100
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
4106
regs[rd] = MUTEX_OWNER(&m.mi) != MUTEX_NO_OWNER;
usr/src/uts/common/dtrace/dtrace.c
4108
regs[rd] = LOCK_HELD(&m.mi.m_spin.m_spinlock);
usr/src/uts/common/dtrace/dtrace.c
4114
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
4121
regs[rd] = (uintptr_t)MUTEX_OWNER(&m.mi);
usr/src/uts/common/dtrace/dtrace.c
4123
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
4129
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
4134
regs[rd] = MUTEX_TYPE_ADAPTIVE(&m.mi);
usr/src/uts/common/dtrace/dtrace.c
4140
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
4145
regs[rd] = MUTEX_TYPE_SPIN(&m.mi);
usr/src/uts/common/dtrace/dtrace.c
4153
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
4158
regs[rd] = _RW_READ_HELD(&r.ri, tmp);
usr/src/uts/common/dtrace/dtrace.c
4165
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
4170
regs[rd] = _RW_WRITE_HELD(&r.ri);
usr/src/uts/common/dtrace/dtrace.c
4176
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
4181
regs[rd] = _RW_ISWRITER(&r.ri);
usr/src/uts/common/dtrace/dtrace.c
4195
*illval = regs[rd];
usr/src/uts/common/dtrace/dtrace.c
4200
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
4228
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
4239
regs[rd] = dest;
usr/src/uts/common/dtrace/dtrace.c
4254
*illval = regs[rd];
usr/src/uts/common/dtrace/dtrace.c
4278
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
4288
regs[rd] = dest;
usr/src/uts/common/dtrace/dtrace.c
4303
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
4345
regs[rd] = count;
usr/src/uts/common/dtrace/dtrace.c
4366
regs[rd] = rval;
usr/src/uts/common/dtrace/dtrace.c
4371
regs[rd] = dtrace_speculation(state);
usr/src/uts/common/dtrace/dtrace.c
4413
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
4416
regs[rd] = dtrace_strlen((char *)addr, lim);
usr/src/uts/common/dtrace/dtrace.c
4437
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
4442
for (regs[rd] = 0; addr < addr_limit; addr++) {
usr/src/uts/common/dtrace/dtrace.c
4444
regs[rd] = addr;
usr/src/uts/common/dtrace/dtrace.c
4477
regs[rd] = notfound;
usr/src/uts/common/dtrace/dtrace.c
4480
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
4486
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
4498
regs[rd] = (uintptr_t)addr;
usr/src/uts/common/dtrace/dtrace.c
4500
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
4560
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
4572
regs[rd] = len;
usr/src/uts/common/dtrace/dtrace.c
4581
for (regs[rd] = notfound; addr != limit; addr += inc) {
usr/src/uts/common/dtrace/dtrace.c
4593
regs[rd] = (uintptr_t)(addr - orig);
usr/src/uts/common/dtrace/dtrace.c
4598
regs[rd] = (uintptr_t)addr;
usr/src/uts/common/dtrace/dtrace.c
4621
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
4628
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
4653
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
4694
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
4716
regs[rd] = (uintptr_t)dest;
usr/src/uts/common/dtrace/dtrace.c
4733
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
4739
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
4771
regs[rd] = (uintptr_t)d;
usr/src/uts/common/dtrace/dtrace.c
4790
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
4796
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
4828
if ((regs[rd] = (uintptr_t)dtrace_json(size, json, elemlist,
usr/src/uts/common/dtrace/dtrace.c
4854
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
4860
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
4876
regs[rd] = (uintptr_t)dest;
usr/src/uts/common/dtrace/dtrace.c
4883
regs[rd] = (tupregs[0].dttk_value >> NBITSMINOR64) & MAXMAJ64;
usr/src/uts/common/dtrace/dtrace.c
4885
regs[rd] = (tupregs[0].dttk_value >> NBITSMINOR) & MAXMAJ;
usr/src/uts/common/dtrace/dtrace.c
4891
regs[rd] = tupregs[0].dttk_value & MAXMIN64;
usr/src/uts/common/dtrace/dtrace.c
4893
regs[rd] = tupregs[0].dttk_value & MAXMIN;
usr/src/uts/common/dtrace/dtrace.c
4920
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
4925
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
5083
regs[rd] = (uintptr_t)end;
usr/src/uts/common/dtrace/dtrace.c
5101
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
5107
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
5114
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
5127
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
5138
regs[rd] = (uintptr_t)d;
usr/src/uts/common/dtrace/dtrace.c
5159
regs[rd] = INT64_MIN;
usr/src/uts/common/dtrace/dtrace.c
5163
regs[rd] = dtrace_strtoll((char *)s, base, lim);
usr/src/uts/common/dtrace/dtrace.c
5186
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
5210
regs[rd] = (uintptr_t)end + 1;
usr/src/uts/common/dtrace/dtrace.c
5218
regs[rd] = (uint16_t)tupregs[0].dttk_value;
usr/src/uts/common/dtrace/dtrace.c
5220
regs[rd] = DT_BSWAP_16((uint16_t)tupregs[0].dttk_value);
usr/src/uts/common/dtrace/dtrace.c
5228
regs[rd] = (uint32_t)tupregs[0].dttk_value;
usr/src/uts/common/dtrace/dtrace.c
5230
regs[rd] = DT_BSWAP_32((uint32_t)tupregs[0].dttk_value);
usr/src/uts/common/dtrace/dtrace.c
5238
regs[rd] = (uint64_t)tupregs[0].dttk_value;
usr/src/uts/common/dtrace/dtrace.c
5240
regs[rd] = DT_BSWAP_64((uint64_t)tupregs[0].dttk_value);
usr/src/uts/common/dtrace/dtrace.c
5255
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
5261
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
5371
regs[rd] = (uintptr_t)dest;
usr/src/uts/common/dtrace/dtrace.c
5382
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
5395
regs[rd] = (uintptr_t)fp;
usr/src/uts/common/dtrace/dtrace.c
5408
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
5414
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
5521
regs[rd] = (uintptr_t)dest;
usr/src/uts/common/dtrace/dtrace.c
5547
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
5562
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
5606
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
5623
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
5733
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
5737
inetout: regs[rd] = (uintptr_t)end + 1;
usr/src/uts/common/dtrace/dtrace.c
5767
uint64_t regs[DIF_DIR_NREGS];
usr/src/uts/common/dtrace/dtrace.c
5783
regs[DIF_REG_R0] = 0; /* %r0 is fixed at zero */
usr/src/uts/common/dtrace/dtrace.c
5795
regs[rd] = regs[r1] | regs[r2];
usr/src/uts/common/dtrace/dtrace.c
5798
regs[rd] = regs[r1] ^ regs[r2];
usr/src/uts/common/dtrace/dtrace.c
5801
regs[rd] = regs[r1] & regs[r2];
usr/src/uts/common/dtrace/dtrace.c
5804
regs[rd] = regs[r1] << regs[r2];
usr/src/uts/common/dtrace/dtrace.c
5807
regs[rd] = regs[r1] >> regs[r2];
usr/src/uts/common/dtrace/dtrace.c
5810
regs[rd] = regs[r1] - regs[r2];
usr/src/uts/common/dtrace/dtrace.c
5813
regs[rd] = regs[r1] + regs[r2];
usr/src/uts/common/dtrace/dtrace.c
5816
regs[rd] = regs[r1] * regs[r2];
usr/src/uts/common/dtrace/dtrace.c
5819
if (regs[r2] == 0) {
usr/src/uts/common/dtrace/dtrace.c
5820
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
5824
regs[rd] = (int64_t)regs[r1] /
usr/src/uts/common/dtrace/dtrace.c
5825
(int64_t)regs[r2];
usr/src/uts/common/dtrace/dtrace.c
5831
if (regs[r2] == 0) {
usr/src/uts/common/dtrace/dtrace.c
5832
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
5836
regs[rd] = regs[r1] / regs[r2];
usr/src/uts/common/dtrace/dtrace.c
5842
if (regs[r2] == 0) {
usr/src/uts/common/dtrace/dtrace.c
5843
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
5847
regs[rd] = (int64_t)regs[r1] %
usr/src/uts/common/dtrace/dtrace.c
5848
(int64_t)regs[r2];
usr/src/uts/common/dtrace/dtrace.c
5854
if (regs[r2] == 0) {
usr/src/uts/common/dtrace/dtrace.c
5855
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
5859
regs[rd] = regs[r1] % regs[r2];
usr/src/uts/common/dtrace/dtrace.c
5865
regs[rd] = ~regs[r1];
usr/src/uts/common/dtrace/dtrace.c
5868
regs[rd] = regs[r1];
usr/src/uts/common/dtrace/dtrace.c
5871
cc_r = regs[r1] - regs[r2];
usr/src/uts/common/dtrace/dtrace.c
5875
cc_c = regs[r1] < regs[r2];
usr/src/uts/common/dtrace/dtrace.c
5879
cc_z = regs[r1] == 0;
usr/src/uts/common/dtrace/dtrace.c
5925
if (!dtrace_canload(regs[r1], 1, mstate, vstate))
usr/src/uts/common/dtrace/dtrace.c
5929
regs[rd] = (int8_t)dtrace_load8(regs[r1]);
usr/src/uts/common/dtrace/dtrace.c
5932
if (!dtrace_canload(regs[r1], 2, mstate, vstate))
usr/src/uts/common/dtrace/dtrace.c
5936
regs[rd] = (int16_t)dtrace_load16(regs[r1]);
usr/src/uts/common/dtrace/dtrace.c
5939
if (!dtrace_canload(regs[r1], 4, mstate, vstate))
usr/src/uts/common/dtrace/dtrace.c
5943
regs[rd] = (int32_t)dtrace_load32(regs[r1]);
usr/src/uts/common/dtrace/dtrace.c
5946
if (!dtrace_canload(regs[r1], 1, mstate, vstate))
usr/src/uts/common/dtrace/dtrace.c
5950
regs[rd] = dtrace_load8(regs[r1]);
usr/src/uts/common/dtrace/dtrace.c
5953
if (!dtrace_canload(regs[r1], 2, mstate, vstate))
usr/src/uts/common/dtrace/dtrace.c
5957
regs[rd] = dtrace_load16(regs[r1]);
usr/src/uts/common/dtrace/dtrace.c
5960
if (!dtrace_canload(regs[r1], 4, mstate, vstate))
usr/src/uts/common/dtrace/dtrace.c
5964
regs[rd] = dtrace_load32(regs[r1]);
usr/src/uts/common/dtrace/dtrace.c
5967
if (!dtrace_canload(regs[r1], 8, mstate, vstate))
usr/src/uts/common/dtrace/dtrace.c
5971
regs[rd] = dtrace_load64(regs[r1]);
usr/src/uts/common/dtrace/dtrace.c
5975
regs[rd] = (int8_t)
usr/src/uts/common/dtrace/dtrace.c
5976
dtrace_fuword8((void *)(uintptr_t)regs[r1]);
usr/src/uts/common/dtrace/dtrace.c
5981
regs[rd] = (int16_t)
usr/src/uts/common/dtrace/dtrace.c
5982
dtrace_fuword16((void *)(uintptr_t)regs[r1]);
usr/src/uts/common/dtrace/dtrace.c
5987
regs[rd] = (int32_t)
usr/src/uts/common/dtrace/dtrace.c
5988
dtrace_fuword32((void *)(uintptr_t)regs[r1]);
usr/src/uts/common/dtrace/dtrace.c
5993
regs[rd] =
usr/src/uts/common/dtrace/dtrace.c
5994
dtrace_fuword8((void *)(uintptr_t)regs[r1]);
usr/src/uts/common/dtrace/dtrace.c
5999
regs[rd] =
usr/src/uts/common/dtrace/dtrace.c
6000
dtrace_fuword16((void *)(uintptr_t)regs[r1]);
usr/src/uts/common/dtrace/dtrace.c
6005
regs[rd] =
usr/src/uts/common/dtrace/dtrace.c
6006
dtrace_fuword32((void *)(uintptr_t)regs[r1]);
usr/src/uts/common/dtrace/dtrace.c
6011
regs[rd] =
usr/src/uts/common/dtrace/dtrace.c
6012
dtrace_fuword64((void *)(uintptr_t)regs[r1]);
usr/src/uts/common/dtrace/dtrace.c
6016
rval = regs[rd];
usr/src/uts/common/dtrace/dtrace.c
6022
regs[rd] = inttab[DIF_INSTR_INTEGER(instr)];
usr/src/uts/common/dtrace/dtrace.c
6025
regs[rd] = (uint64_t)(uintptr_t)
usr/src/uts/common/dtrace/dtrace.c
6030
uintptr_t s1 = regs[r1];
usr/src/uts/common/dtrace/dtrace.c
6031
uintptr_t s2 = regs[r2];
usr/src/uts/common/dtrace/dtrace.c
6057
regs[rd] = dtrace_dif_variable(mstate, state,
usr/src/uts/common/dtrace/dtrace.c
6058
r1, regs[r2]);
usr/src/uts/common/dtrace/dtrace.c
6072
regs[rd] = svar->dtsv_data;
usr/src/uts/common/dtrace/dtrace.c
6084
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
6086
regs[rd] = a + sizeof (uint64_t);
usr/src/uts/common/dtrace/dtrace.c
6092
regs[rd] = dtrace_dif_variable(mstate, state, id, 0);
usr/src/uts/common/dtrace/dtrace.c
6096
dtrace_dif_variable_write(mstate, state, r1, regs[r2],
usr/src/uts/common/dtrace/dtrace.c
6097
regs[rd]);
usr/src/uts/common/dtrace/dtrace.c
6118
if (regs[rd] == 0) {
usr/src/uts/common/dtrace/dtrace.c
6126
(void *)(uintptr_t)regs[rd], &v->dtdv_type,
usr/src/uts/common/dtrace/dtrace.c
6130
dtrace_vcopy((void *)(uintptr_t)regs[rd],
usr/src/uts/common/dtrace/dtrace.c
6135
svar->dtsv_data = regs[rd];
usr/src/uts/common/dtrace/dtrace.c
6144
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
6154
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
6181
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
6183
regs[rd] = a + sizeof (uint64_t);
usr/src/uts/common/dtrace/dtrace.c
6191
regs[rd] = tmp[CPU->cpu_id];
usr/src/uts/common/dtrace/dtrace.c
6215
if (regs[rd] == 0) {
usr/src/uts/common/dtrace/dtrace.c
6224
(void *)(uintptr_t)regs[rd], &v->dtdv_type,
usr/src/uts/common/dtrace/dtrace.c
6228
dtrace_vcopy((void *)(uintptr_t)regs[rd],
usr/src/uts/common/dtrace/dtrace.c
6235
tmp[CPU->cpu_id] = regs[rd];
usr/src/uts/common/dtrace/dtrace.c
6258
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
6263
regs[rd] = (uint64_t)(uintptr_t)dvar->dtdv_data;
usr/src/uts/common/dtrace/dtrace.c
6265
regs[rd] = *((uint64_t *)dvar->dtdv_data);
usr/src/uts/common/dtrace/dtrace.c
6290
regs[rd] ? DTRACE_DYNVAR_ALLOC :
usr/src/uts/common/dtrace/dtrace.c
6306
(void *)(uintptr_t)regs[rd],
usr/src/uts/common/dtrace/dtrace.c
6310
dtrace_vcopy((void *)(uintptr_t)regs[rd],
usr/src/uts/common/dtrace/dtrace.c
6313
*((uint64_t *)dvar->dtdv_data) = regs[rd];
usr/src/uts/common/dtrace/dtrace.c
6320
regs[rd] = (int64_t)regs[r1] >> regs[r2];
usr/src/uts/common/dtrace/dtrace.c
6325
regs, tupregs, ttop, mstate, state);
usr/src/uts/common/dtrace/dtrace.c
6344
dtrace_strlen((char *)(uintptr_t)regs[rd],
usr/src/uts/common/dtrace/dtrace.c
6345
regs[r2] ? regs[r2] :
usr/src/uts/common/dtrace/dtrace.c
6348
if (regs[r2] > LONG_MAX) {
usr/src/uts/common/dtrace/dtrace.c
6353
tupregs[ttop].dttk_size = regs[r2];
usr/src/uts/common/dtrace/dtrace.c
6356
tupregs[ttop++].dttk_value = regs[rd];
usr/src/uts/common/dtrace/dtrace.c
6365
tupregs[ttop].dttk_value = regs[rd];
usr/src/uts/common/dtrace/dtrace.c
6407
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
6412
regs[rd] = (uint64_t)(uintptr_t)dvar->dtdv_data;
usr/src/uts/common/dtrace/dtrace.c
6414
regs[rd] = *((uint64_t *)dvar->dtdv_data);
usr/src/uts/common/dtrace/dtrace.c
6446
regs[rd] ? DTRACE_DYNVAR_ALLOC :
usr/src/uts/common/dtrace/dtrace.c
6456
(void *)(uintptr_t)regs[rd], &v->dtdv_type,
usr/src/uts/common/dtrace/dtrace.c
6460
dtrace_vcopy((void *)(uintptr_t)regs[rd],
usr/src/uts/common/dtrace/dtrace.c
6463
*((uint64_t *)dvar->dtdv_data) = regs[rd];
usr/src/uts/common/dtrace/dtrace.c
6471
size_t size = ptr - mstate->dtms_scratch_ptr + regs[r1];
usr/src/uts/common/dtrace/dtrace.c
6478
if (size < regs[r1] ||
usr/src/uts/common/dtrace/dtrace.c
6481
regs[rd] = 0;
usr/src/uts/common/dtrace/dtrace.c
6487
regs[rd] = ptr;
usr/src/uts/common/dtrace/dtrace.c
6492
if (!dtrace_canstore(regs[rd], regs[r2],
usr/src/uts/common/dtrace/dtrace.c
6495
*illval = regs[rd];
usr/src/uts/common/dtrace/dtrace.c
6499
if (!dtrace_canload(regs[r1], regs[r2], mstate, vstate))
usr/src/uts/common/dtrace/dtrace.c
6502
dtrace_bcopy((void *)(uintptr_t)regs[r1],
usr/src/uts/common/dtrace/dtrace.c
6503
(void *)(uintptr_t)regs[rd], (size_t)regs[r2]);
usr/src/uts/common/dtrace/dtrace.c
6507
if (!dtrace_canstore(regs[rd], 1, mstate, vstate)) {
usr/src/uts/common/dtrace/dtrace.c
6509
*illval = regs[rd];
usr/src/uts/common/dtrace/dtrace.c
6512
*((uint8_t *)(uintptr_t)regs[rd]) = (uint8_t)regs[r1];
usr/src/uts/common/dtrace/dtrace.c
6516
if (!dtrace_canstore(regs[rd], 2, mstate, vstate)) {
usr/src/uts/common/dtrace/dtrace.c
6518
*illval = regs[rd];
usr/src/uts/common/dtrace/dtrace.c
6521
if (regs[rd] & 1) {
usr/src/uts/common/dtrace/dtrace.c
6523
*illval = regs[rd];
usr/src/uts/common/dtrace/dtrace.c
6526
*((uint16_t *)(uintptr_t)regs[rd]) = (uint16_t)regs[r1];
usr/src/uts/common/dtrace/dtrace.c
6530
if (!dtrace_canstore(regs[rd], 4, mstate, vstate)) {
usr/src/uts/common/dtrace/dtrace.c
6532
*illval = regs[rd];
usr/src/uts/common/dtrace/dtrace.c
6535
if (regs[rd] & 3) {
usr/src/uts/common/dtrace/dtrace.c
6537
*illval = regs[rd];
usr/src/uts/common/dtrace/dtrace.c
6540
*((uint32_t *)(uintptr_t)regs[rd]) = (uint32_t)regs[r1];
usr/src/uts/common/dtrace/dtrace.c
6544
if (!dtrace_canstore(regs[rd], 8, mstate, vstate)) {
usr/src/uts/common/dtrace/dtrace.c
6546
*illval = regs[rd];
usr/src/uts/common/dtrace/dtrace.c
6549
if (regs[rd] & 7) {
usr/src/uts/common/dtrace/dtrace.c
6551
*illval = regs[rd];
usr/src/uts/common/dtrace/dtrace.c
6554
*((uint64_t *)(uintptr_t)regs[rd]) = regs[r1];
usr/src/uts/common/fs/nfs/nfs_dlinet.c
2145
myxdr_pmap(XDR *xdrs, struct pmap *regs)
usr/src/uts/common/fs/nfs/nfs_dlinet.c
2147
if (xdr_rpcprog(xdrs, ®s->pm_prog) &&
usr/src/uts/common/fs/nfs/nfs_dlinet.c
2148
xdr_rpcvers(xdrs, ®s->pm_vers) &&
usr/src/uts/common/fs/nfs/nfs_dlinet.c
2149
xdr_rpcprot(xdrs, ®s->pm_prot))
usr/src/uts/common/fs/nfs/nfs_dlinet.c
2150
return (xdr_rpcport(xdrs, ®s->pm_port));
usr/src/uts/common/fs/proc/prioctl.c
1671
prgregset32_t regs;
usr/src/uts/common/fs/proc/prioctl.c
1697
prgregset_t regs;
usr/src/uts/common/fs/proc/prioctl.c
178
prgregset_t regs;
usr/src/uts/common/fs/proc/prioctl.c
1869
if (copyin(cmaddr, un32.regs, sizeof (un32.regs)))
usr/src/uts/common/fs/proc/prioctl.c
2272
bzero(un32.regs, sizeof (un32.regs));
usr/src/uts/common/fs/proc/prioctl.c
2276
prgetprregs32(lwp, un32.regs);
usr/src/uts/common/fs/proc/prioctl.c
2281
copyout(un32.regs, cmaddr, sizeof (un32.regs)))
usr/src/uts/common/fs/proc/prioctl.c
2293
prgregset_32ton(lwp, un32.regs, un.regs);
usr/src/uts/common/fs/proc/prioctl.c
2294
prsetprregs(lwp, un.regs, 0);
usr/src/uts/common/fs/proc/prioctl.c
351
if (copyin(cmaddr, un.regs, sizeof (un.regs)))
usr/src/uts/common/fs/proc/prioctl.c
719
bzero(un.regs, sizeof (un.regs));
usr/src/uts/common/fs/proc/prioctl.c
723
prgetprregs(lwp, un.regs);
usr/src/uts/common/fs/proc/prioctl.c
727
if (copyout(un.regs, cmaddr, sizeof (un.regs)))
usr/src/uts/common/fs/proc/prioctl.c
737
prsetprregs(lwp, un.regs, 0);
usr/src/uts/common/io/ath/ath_main.c
1965
caddr_t regs;
usr/src/uts/common/io/ath/ath_main.c
2044
®s, 0, 0, &ath_reg_accattr, &asc->asc_io_handle);
usr/src/uts/common/io/ath/ath_main.c
2046
"regs map1 = %x err=%d\n", regs, err));
usr/src/uts/common/io/ath/ath_main.c
2053
ah = ath_hal_attach(device_id, asc, 0, regs, &status);
usr/src/uts/common/io/audio/drv/audiocmi/audiocmi.c
911
if (ddi_regs_map_setup(dip, 1, &dev->regs, 0, 0, &acc_attr,
usr/src/uts/common/io/audio/drv/audiocmi/audiocmi.h
301
caddr_t regs;
usr/src/uts/common/io/audio/drv/audiocmi/audiocmi.h
325
ddi_get8(dev->acch, (uint8_t *)(dev->regs + (offset)))
usr/src/uts/common/io/audio/drv/audiocmi/audiocmi.h
327
ddi_get16(dev->acch, (uint16_t *)(void *)(dev->regs + (offset)))
usr/src/uts/common/io/audio/drv/audiocmi/audiocmi.h
329
ddi_get32(dev->acch, (uint32_t *)(void *)(dev->regs + (offset)))
usr/src/uts/common/io/audio/drv/audiocmi/audiocmi.h
331
ddi_put8(dev->acch, (uint8_t *)(dev->regs + (offset)), v)
usr/src/uts/common/io/audio/drv/audiocmi/audiocmi.h
333
ddi_put16(dev->acch, (uint16_t *)(void *)(dev->regs + (offset)), v)
usr/src/uts/common/io/audio/drv/audiocmi/audiocmi.h
335
ddi_put32(dev->acch, (uint32_t *)(void *)(dev->regs + (offset)), v)
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1106
OUTL(devc, 0x00000000, devc->regs + 0x0c); /* Intr disable */
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1109
devc->regs + HCFG);
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1119
OUTL(devc, 0, devc->regs + IE);
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1173
OUTL(devc, 0x600000, devc->regs + 0x20);
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1174
OUTL(devc, 0x14, devc->regs + 0x24);
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1177
OUTL(devc, 0x6E0000, devc->regs + 0x20);
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1179
OUTL(devc, 0xFF00FF00, devc->regs + 0x24);
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1182
tmp = INL(devc, devc->regs + HCFG);
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1184
OUTL(devc, tmp, devc->regs + HCFG);
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1191
tmp = INL(devc, devc->regs + 0x18);
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1194
OUTL(devc, tmp, devc->regs + 0x18);
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1208
OUTL(devc, 0x600000, devc->regs + 0x20);
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1209
OUTL(devc, 0x14, devc->regs + 0x24);
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1212
OUTL(devc, 0x7B0000, devc->regs + 0x20);
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1213
OUTL(devc, 0xFF000000, devc->regs + 0x24);
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1216
OUTL(devc, 0x7A0000, devc->regs + 0x20);
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1217
OUTL(devc, 0xFF000000, devc->regs + 0x24);
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1219
tmp = INL(devc, devc->regs + 0x18) & ~0x8;
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1220
OUTL(devc, tmp, devc->regs + 0x18);
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1234
A_HCFG_AUTOMUTE | mode, devc->regs + HCFG);
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1236
OUTL(devc, INL(devc, devc->regs + 0x18) |
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1237
0x0004, devc->regs + 0x18); /* GPIO (S/PDIF enable) */
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1241
tmp = INL(devc, devc->regs + 0x18);
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1242
OUTL(devc, tmp | A_IOCFG_GPOUT2, devc->regs + 0x18);
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1245
devc->regs + 0x18);
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1247
OUTL(devc, tmp, devc->regs + 0x18);
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1251
HCFG_AUTOMUTE | HCFG_JOYENABLE, devc->regs + HCFG);
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1256
tmp = INL(devc, devc->regs + HCFG);
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1257
OUTL(devc, tmp | HCFG_GPOUT2, devc->regs + HCFG);
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1259
OUTL(devc, tmp | HCFG_GPOUT1 | HCFG_GPOUT2, devc->regs + HCFG);
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1261
OUTL(devc, tmp, devc->regs + HCFG);
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1268
reg = INL(devc, devc->regs + 0x18) & ~A_IOCFG_GPOUT0;
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1270
OUTL(devc, reg, devc->regs + 0x18);
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1273
reg = INL(devc, devc->regs + HCFG) & ~HCFG_GPOUT0;
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1275
OUTL(devc, reg, devc->regs + HCFG);
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1279
OUTL(devc, INL(devc, devc->regs + 0x18) | 0x0060,
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1280
devc->regs + 0x18);
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1282
OUTL(devc, INL(devc, devc->regs + 0x18) | 0x0040,
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1283
devc->regs + 0x18);
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1285
OUTL(devc, INL(devc, devc->regs + 0x18) | 0x0080,
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1286
devc->regs + 0x18);
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1440
val = INL(devc, devc->regs + 0x18);
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1443
OUTL(devc, val, devc->regs + 0x18);
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1446
val = INL(devc, devc->regs + HCFG);
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1449
OUTL(devc, val, devc->regs + HCFG);
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
183
OUTB(devc, index, devc->regs + 0x1e);
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
185
if (INB(devc, devc->regs + 0x1e) & 0x80)
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
192
dtemp = INW(devc, devc->regs + 0x1c);
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
1968
if ((ddi_regs_map_setup(dip, 1, &devc->regs, 0, 0, &dev_attr,
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
207
OUTB(devc, index, devc->regs + 0x1e);
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
209
if (INB(devc, devc->regs + 0x1e) & 0x80)
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
211
OUTW(devc, data, devc->regs + 0x1c);
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
225
OUTL(devc, ptr, devc->regs + 0x00); /* Pointer */
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
226
val = INL(devc, devc->regs + 0x04); /* Data */
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
2302
HCFG_MUTEBUTTONENABLE, devc->regs + HCFG);
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
247
OUTL(devc, ptr, devc->regs + 0x00); /* Pointer */
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
254
value |= INL(devc, devc->regs + 0x04) & ~mask; /* data */
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.c
256
OUTL(devc, value, devc->regs + 0x04); /* Data */
usr/src/uts/common/io/audio/drv/audioemu10k/audioemu10k.h
388
caddr_t regs;
usr/src/uts/common/io/audio/drv/audioens/audioens.c
1087
if (ddi_regs_map_setup(dip, 1, &dev->regs, 0, 0, &acc_attr,
usr/src/uts/common/io/audio/drv/audioens/audioens.c
131
caddr_t regs;
usr/src/uts/common/io/audio/drv/audioens/audioens.c
171
ddi_get8(dev->acch, (uint8_t *)(dev->regs + (offset)))
usr/src/uts/common/io/audio/drv/audioens/audioens.c
173
ddi_get16(dev->acch, (uint16_t *)(void *)(dev->regs + (offset)))
usr/src/uts/common/io/audio/drv/audioens/audioens.c
175
ddi_get32(dev->acch, (uint32_t *)(void *)(dev->regs + (offset)))
usr/src/uts/common/io/audio/drv/audioens/audioens.c
177
ddi_put8(dev->acch, (uint8_t *)(dev->regs + (offset)), v)
usr/src/uts/common/io/audio/drv/audioens/audioens.c
179
ddi_put16(dev->acch, (uint16_t *)(void *)(dev->regs + (offset)), v)
usr/src/uts/common/io/audio/drv/audioens/audioens.c
181
ddi_put32(dev->acch, (uint32_t *)(void *)(dev->regs + (offset)), v)
usr/src/uts/common/io/audio/drv/audiopci/audiopci.c
1220
if (ddi_regs_map_setup(dip, 1, &dev->regs, 0, 0, &acc_attr,
usr/src/uts/common/io/audio/drv/audiopci/audiopci.c
143
caddr_t regs;
usr/src/uts/common/io/audio/drv/audiopci/audiopci.c
181
ddi_get8(dev->acch, (uint8_t *)(dev->regs + (offset)))
usr/src/uts/common/io/audio/drv/audiopci/audiopci.c
183
ddi_get16(dev->acch, (uint16_t *)(void *)(dev->regs + (offset)))
usr/src/uts/common/io/audio/drv/audiopci/audiopci.c
185
ddi_get32(dev->acch, (uint32_t *)(void *)(dev->regs + (offset)))
usr/src/uts/common/io/audio/drv/audiopci/audiopci.c
187
ddi_put8(dev->acch, (uint8_t *)(dev->regs + (offset)), v)
usr/src/uts/common/io/audio/drv/audiopci/audiopci.c
189
ddi_put16(dev->acch, (uint16_t *)(void *)(dev->regs + (offset)), v)
usr/src/uts/common/io/audio/drv/audiopci/audiopci.c
191
ddi_put32(dev->acch, (uint32_t *)(void *)(dev->regs + (offset)), v)
usr/src/uts/common/io/audio/drv/audiots/audiots.c
1291
audiots_regs_t *regs = state->ts_regs;
usr/src/uts/common/io/audio/drv/audiots/audiots.c
1299
aram = ®s->aud_ram[port->tp_dma_stream].aram;
usr/src/uts/common/io/audio/drv/audiots/audiots.c
1300
eram = ®s->aud_ram[port->tp_dma_stream].eram;
usr/src/uts/common/io/audio/drv/audiots/audiots.c
1337
ddi_put32(handle, ®s->aud_regs.ap_stop, port->tp_dma_mask);
usr/src/uts/common/io/audio/drv/audiots/audiots.c
1340
ddi_put32(handle, ®s->aud_regs.ap_start, port->tp_dma_mask);
usr/src/uts/common/io/audio/drv/audiots/audiots.c
649
audiots_regs_t *regs = state->ts_regs;
usr/src/uts/common/io/audio/drv/audiots/audiots.c
653
ddi_put32(handle, ®s->aud_regs.ap_stop, TS_ALL_DMA_ENGINES);
usr/src/uts/common/io/audio/drv/audiots/audiots.c
654
ddi_put32(handle, ®s->aud_regs.ap_ainten, TS_ALL_DMA_OFF);
usr/src/uts/common/io/audio/drv/audiots/audiots.c
657
ddi_put32(handle, ®s->aud_regs.ap_volume, 0x0);
usr/src/uts/common/io/audio/drv/audiots/audiots.c
660
ddi_put32(handle, ®s->aud_regs.ap_cir_gc, AP_CIR_GC_ENDLP_IE);
usr/src/uts/common/io/audio/drv/audiots/audiots.c
669
®s->aud_ram[str].eram.eram_gvsel_pan_vol,
usr/src/uts/common/io/audio/drv/audiots/audiots.c
673
®s->aud_ram[str].eram.eram_gvsel_pan_vol,
usr/src/uts/common/io/audio/drv/audiots/audiots.c
683
ddi_put32(handle, ®s->aud_ram[str].eram.eram_ebuf1,
usr/src/uts/common/io/audio/drv/audiots/audiots.c
685
ddi_put32(handle, ®s->aud_ram[str].eram.eram_ebuf2,
usr/src/uts/common/io/audio/drv/audiots/audiots.c
689
ddi_put16(handle, ®s->aud_ram[str].aram.aram_delta,
usr/src/uts/common/io/audio/drv/audiots/audiots.c
691
ddi_put16(handle, ®s->aud_ram[str].eram.eram_ctrl_ec,
usr/src/uts/common/io/avintr.c
772
struct regs;
usr/src/uts/common/io/avintr.c
778
av_dispatch_nmivect(struct regs *rp)
usr/src/uts/common/io/bge/bge_main2.c
3618
caddr_t regs;
usr/src/uts/common/io/bge/bge_main2.c
3712
®s, 0, 0, &bge_reg_accattr, &bgep->ape_handle);
usr/src/uts/common/io/bge/bge_main2.c
3718
bgep->ape_regs = regs;
usr/src/uts/common/io/bge/bge_main2.c
3830
®s, 0, 0, &bge_reg_accattr, &bgep->io_handle);
usr/src/uts/common/io/bge/bge_main2.c
3835
bgep->io_regs = regs;
usr/src/uts/common/io/bge/bge_mii.c
119
uint16_t regs[32];
usr/src/uts/common/io/bge/bge_mii.c
127
regs[i] = bge_mii_get16(bgep, i);
usr/src/uts/common/io/bge/bge_mii.c
131
regs[i] = mii_status;
usr/src/uts/common/io/bge/bge_mii.c
135
regs[i] = aux;
usr/src/uts/common/io/bge/bge_mii.c
143
regs[i] = 0;
usr/src/uts/common/io/bge/bge_mii.c
150
regs[i+0], regs[i+1], regs[i+2], regs[i+3],
usr/src/uts/common/io/bge/bge_mii.c
151
regs[i+4], regs[i+5], regs[i+6], regs[i+7]));
usr/src/uts/common/io/busra.c
1031
"available", (caddr_t)®s, &rlen) == DDI_SUCCESS) {
usr/src/uts/common/io/busra.c
1045
switch (PCI_REG_ADDR_G(regs[i].pci_phys_hi)) {
usr/src/uts/common/io/busra.c
1048
(uint64_t)regs[i].pci_phys_low,
usr/src/uts/common/io/busra.c
1049
(uint64_t)regs[i].pci_size_low,
usr/src/uts/common/io/busra.c
1050
(regs[i].pci_phys_hi & PCI_REG_PF_M) ?
usr/src/uts/common/io/busra.c
1057
((uint64_t)(regs[i].pci_phys_mid) << 32) |
usr/src/uts/common/io/busra.c
1058
((uint64_t)(regs[i].pci_phys_low)),
usr/src/uts/common/io/busra.c
1059
((uint64_t)(regs[i].pci_size_hi) << 32) |
usr/src/uts/common/io/busra.c
1060
((uint64_t)(regs[i].pci_size_low)),
usr/src/uts/common/io/busra.c
1061
(regs[i].pci_phys_hi & PCI_REG_PF_M) ?
usr/src/uts/common/io/busra.c
1068
(uint64_t)regs[i].pci_phys_low,
usr/src/uts/common/io/busra.c
1069
(uint64_t)regs[i].pci_size_low,
usr/src/uts/common/io/busra.c
1078
PCI_REG_ADDR_G(regs[i].pci_phys_hi));
usr/src/uts/common/io/busra.c
1082
kmem_free(regs, rlen);
usr/src/uts/common/io/busra.c
1330
pci_regspec_t *regs, *newregs;
usr/src/uts/common/io/busra.c
1348
"available", (caddr_t)®s, &rlen);
usr/src/uts/common/io/busra.c
1363
if (type == (regs[i].pci_phys_hi & PCI_ADDR_TYPE_MASK)) {
usr/src/uts/common/io/busra.c
1366
range_base = ((uint64_t)(regs[i].pci_phys_mid) << 32) |
usr/src/uts/common/io/busra.c
1367
((uint64_t)(regs[i].pci_phys_low));
usr/src/uts/common/io/busra.c
1368
range_len = ((uint64_t)(regs[i].pci_size_hi) << 32) |
usr/src/uts/common/io/busra.c
1369
((uint64_t)(regs[i].pci_size_low));
usr/src/uts/common/io/busra.c
1393
newregs[j].pci_phys_hi = regs[i].pci_phys_hi;
usr/src/uts/common/io/busra.c
1405
newregs[j].pci_phys_hi = regs[i].pci_phys_hi;
usr/src/uts/common/io/busra.c
1422
newregs[j] = regs[k];
usr/src/uts/common/io/busra.c
1430
newregs[j] = regs[i];
usr/src/uts/common/io/busra.c
1446
kmem_free(regs, rlen);
usr/src/uts/common/io/busra.c
1469
kmem_free(regs, rlen);
usr/src/uts/common/io/busra.c
1481
pci_regspec_t *regs, *newregs;
usr/src/uts/common/io/busra.c
1500
"available", (caddr_t)®s, &rlen);
usr/src/uts/common/io/busra.c
1525
if (type == (regs[i].pci_phys_hi & PCI_ADDR_TYPE_MASK)) {
usr/src/uts/common/io/busra.c
1528
range_base = ((uint64_t)(regs[i].pci_phys_mid) << 32) |
usr/src/uts/common/io/busra.c
1529
((uint64_t)(regs[i].pci_phys_low));
usr/src/uts/common/io/busra.c
1530
range_len = ((uint64_t)(regs[i].pci_size_hi) << 32) |
usr/src/uts/common/io/busra.c
1531
((uint64_t)(regs[i].pci_size_low));
usr/src/uts/common/io/busra.c
1607
newregs[j].pci_phys_hi = regs[i].pci_phys_hi;
usr/src/uts/common/io/busra.c
1621
newregs[k].pci_phys_hi = regs[i].pci_phys_hi;
usr/src/uts/common/io/busra.c
1632
newregs[j] = regs[i];
usr/src/uts/common/io/busra.c
1661
kmem_free(regs, rlen);
usr/src/uts/common/io/busra.c
1690
kmem_free(regs, rlen);
usr/src/uts/common/io/busra.c
945
pci_regspec_t *regs;
usr/src/uts/common/io/cardbus/cardbus.c
1072
(caddr_t)®s, ®len) != DDI_SUCCESS)
usr/src/uts/common/io/cardbus/cardbus.c
1086
rn, regs[rn].pci_size_low);
usr/src/uts/common/io/cardbus/cardbus.c
1087
*(off_t *)result = regs[rn].pci_size_low;
usr/src/uts/common/io/cardbus/cardbus.c
1089
kmem_free(regs, reglen);
usr/src/uts/common/io/cardbus/cardbus.c
919
pci_regspec_t *regs;
usr/src/uts/common/io/cardbus/cardbus_cfg.c
4494
uint32_t *regs = (uint32_t *)regspec;
usr/src/uts/common/io/cardbus/cardbus_cfg.c
4500
i, regs[0], regs[1], regs[2], regs[3], regs[4]);
usr/src/uts/common/io/comstar/port/qlt/qlt.c
461
if (ddi_regs_map_setup(dip, 1, &qlt->regs, 0, regsize_1,
usr/src/uts/common/io/comstar/port/qlt/qlt.c
473
if (ddi_regs_map_setup(dip, 2, &qlt->regs, 0, 0x100,
usr/src/uts/common/io/comstar/port/qlt/qlt.h
359
caddr_t regs;
usr/src/uts/common/io/comstar/port/qlt/qlt.h
543
ddi_get8(qlt->regs_acc_handle, (uint8_t *)(qlt->regs + addr))
usr/src/uts/common/io/comstar/port/qlt/qlt.h
545
ddi_get16(qlt->regs_acc_handle, (uint16_t *)(qlt->regs + addr))
usr/src/uts/common/io/comstar/port/qlt/qlt.h
547
ddi_get32(qlt->regs_acc_handle, (uint32_t *)(qlt->regs + addr))
usr/src/uts/common/io/comstar/port/qlt/qlt.h
549
ddi_put16(qlt->regs_acc_handle, (uint16_t *)(qlt->regs + addr), \
usr/src/uts/common/io/comstar/port/qlt/qlt.h
552
ddi_put32(qlt->regs_acc_handle, (uint32_t *)(qlt->regs + addr), \
usr/src/uts/common/io/e1000g/e1000g_main.c
1213
pci_regspec_t *regs;
usr/src/uts/common/io/e1000g/e1000g_main.c
1224
DDI_PROP_DONTPASS, "reg", (int **)®s,
usr/src/uts/common/io/e1000g/e1000g_main.c
1234
if (PCI_REG_REG_G(regs[rnumber].pci_phys_hi) == bar_offset) {
usr/src/uts/common/io/e1000g/e1000g_main.c
1235
type = regs[rnumber].pci_phys_hi & PCI_ADDR_MASK;
usr/src/uts/common/io/e1000g/e1000g_main.c
1240
ddi_prop_free(regs);
usr/src/uts/common/io/ena/ena.c
686
pci_regspec_t *regs;
usr/src/uts/common/io/ena/ena.c
699
DDI_PROP_DONTPASS, "reg", (int **)®s, ®s_length) !=
usr/src/uts/common/io/ena/ena.c
707
if (PCI_REG_REG_G(regs[i].pci_phys_hi) == bar_offset) {
usr/src/uts/common/io/ena/ena.c
713
ddi_prop_free(regs);
usr/src/uts/common/io/ena/ena_admin.c
288
int *regs;
usr/src/uts/common/io/ena/ena_admin.c
320
DDI_PROP_DONTPASS, "reg", ®s, &nregs) == DDI_PROP_SUCCESS) {
usr/src/uts/common/io/ena/ena_admin.c
322
ehi->ehi_bdf |= PCI_REG_BUS_G(regs[0]) << 8;
usr/src/uts/common/io/ena/ena_admin.c
323
ehi->ehi_bdf |= PCI_REG_DEV_G(regs[0]) << 3;
usr/src/uts/common/io/ena/ena_admin.c
324
ehi->ehi_bdf |= PCI_REG_FUNC_G(regs[0]);
usr/src/uts/common/io/ena/ena_admin.c
327
ddi_prop_free(regs);
usr/src/uts/common/io/hme/hme.c
1002
int *regs;
usr/src/uts/common/io/hme/hme.c
1016
"reg", ®s, &nregs)) != DDI_PROP_SUCCESS) {
usr/src/uts/common/io/hme/hme.c
1021
ddi_prop_free(regs);
usr/src/uts/common/io/hme/hme.c
1025
rom.bus = PCI_REG_BUS_G(regs[0]);
usr/src/uts/common/io/hme/hme.c
1026
rom.dev = PCI_REG_DEV_G(regs[0]);
usr/src/uts/common/io/hme/hme.c
950
int *regs;
usr/src/uts/common/io/hme/hme.c
967
"reg", ®s, &nregs)) != DDI_PROP_SUCCESS) {
usr/src/uts/common/io/hme/hme.c
972
ddi_prop_free(regs);
usr/src/uts/common/io/hme/hme.c
975
reg = regs[0];
usr/src/uts/common/io/hme/hme.c
976
ddi_prop_free(regs);
usr/src/uts/common/io/hxge/hxge_pfc.h
216
hxge_tcam_reg_t regs;
usr/src/uts/common/io/hxge/hxge_pfc.h
223
#define key_reg0 key.regs.reg0
usr/src/uts/common/io/hxge/hxge_pfc.h
224
#define key_reg1 key.regs.reg1
usr/src/uts/common/io/hxge/hxge_pfc.h
225
#define mask_reg0 mask.regs.reg0
usr/src/uts/common/io/hxge/hxge_pfc.h
226
#define mask_reg1 mask.regs.reg1
usr/src/uts/common/io/hxge/hxge_pfc.h
228
#define key0 key.regs.reg0
usr/src/uts/common/io/hxge/hxge_pfc.h
229
#define key1 key.regs.reg1
usr/src/uts/common/io/hxge/hxge_pfc.h
230
#define mask0 mask.regs.reg0
usr/src/uts/common/io/hxge/hxge_pfc.h
231
#define mask1 mask.regs.reg1
usr/src/uts/common/io/i2c/nexus/i2cnex.c
1237
int regs[2] = { dev->id_addr.ia_type, dev->id_addr.ia_addr };
usr/src/uts/common/io/i2c/nexus/i2cnex.c
1238
if (ndi_prop_update_int_array(DDI_DEV_T_NONE, nex->in_dip, "reg", regs,
usr/src/uts/common/io/i40e/i40e_main.c
961
int *regs, i;
usr/src/uts/common/io/i40e/i40e_main.c
968
®s, &nregs) != DDI_PROP_SUCCESS) {
usr/src/uts/common/io/i40e/i40e_main.c
973
ddi_prop_free(regs);
usr/src/uts/common/io/i40e/i40e_main.c
977
bus = PCI_REG_BUS_G(regs[0]);
usr/src/uts/common/io/i40e/i40e_main.c
978
device = PCI_REG_DEV_G(regs[0]);
usr/src/uts/common/io/i40e/i40e_main.c
979
func = PCI_REG_FUNC_G(regs[0]);
usr/src/uts/common/io/i40e/i40e_main.c
980
ddi_prop_free(regs);
usr/src/uts/common/io/igc/igc.c
702
int *regs;
usr/src/uts/common/io/igc/igc.c
718
DDI_PROP_DONTPASS, "reg", ®s, &nprop)) != DDI_PROP_SUCCESS) {
usr/src/uts/common/io/igc/igc.c
731
igc->igc_hw.bus.func = PCI_REG_FUNC_G(regs[0]);
usr/src/uts/common/io/igc/igc.c
734
ddi_prop_free(regs);
usr/src/uts/common/io/iprb/iprb.c
285
if (ddi_regs_map_setup(dip, 1, &ip->regs, 0, 0, &acc_attr,
usr/src/uts/common/io/iprb/iprb.h
225
ddi_get8(ip->regsh, (void *)(ip->regs + (offset)))
usr/src/uts/common/io/iprb/iprb.h
227
ddi_get16(ip->regsh, (void *)(ip->regs + (offset)))
usr/src/uts/common/io/iprb/iprb.h
229
ddi_get32(ip->regsh, (void *)(ip->regs + (offset)))
usr/src/uts/common/io/iprb/iprb.h
231
ddi_put8(ip->regsh, (void *)(ip->regs + (offset)), (val))
usr/src/uts/common/io/iprb/iprb.h
233
ddi_put16(ip->regsh, (void *)(ip->regs + (offset)), (val))
usr/src/uts/common/io/iprb/iprb.h
235
ddi_put32(ip->regsh, (void *)(ip->regs + (offset)), (val))
usr/src/uts/common/io/iprb/iprb.h
52
caddr_t regs;
usr/src/uts/common/io/ipw/ipw2100.c
258
caddr_t regs;
usr/src/uts/common/io/ipw/ipw2100.c
293
err = ddi_regs_map_setup(dip, IPW2100_PCI_CFG_RNUM, ®s,
usr/src/uts/common/io/ipw/ipw2100.c
300
ddi_put8(cfgh, (uint8_t *)(regs + 0x41), 0);
usr/src/uts/common/io/iwi/ipw2200.c
292
caddr_t regs;
usr/src/uts/common/io/iwi/ipw2200.c
299
err = ddi_regs_map_setup(dip, IPW2200_PCI_CFG_RNUM, ®s,
usr/src/uts/common/io/iwi/ipw2200.c
307
ddi_put8(cfgh, (uint8_t *)(regs + 0x41), 0);
usr/src/uts/common/io/iwi/ipw2200.c
309
(uint16_t *)((uintptr_t)regs + PCI_CONF_VENID));
usr/src/uts/common/io/iwi/ipw2200.c
311
(uint16_t *)((uintptr_t)regs + PCI_CONF_DEVID));
usr/src/uts/common/io/iwi/ipw2200.c
313
(uint16_t *)((uintptr_t)regs + PCI_CONF_SUBVENID));
usr/src/uts/common/io/iwi/ipw2200.c
315
(uint16_t *)((uintptr_t)regs + PCI_CONF_SUBSYSID));
usr/src/uts/common/io/mr_sas/mr_sas.c
1302
if (instance->unroll.regs == 1) {
usr/src/uts/common/io/mr_sas/mr_sas.c
1304
instance->unroll.regs = 0;
usr/src/uts/common/io/mr_sas/mr_sas.c
656
instance->unroll.regs = 1;
usr/src/uts/common/io/mr_sas/mr_sas.h
558
uint8_t regs; /* Controller registers mapped. */
usr/src/uts/common/io/nge/nge_main.c
2380
caddr_t regs;
usr/src/uts/common/io/nge/nge_main.c
2448
®s, 0, 0, &nge_reg_accattr, &ngep->io_handle);
usr/src/uts/common/io/nge/nge_main.c
2453
ngep->io_regs = regs;
usr/src/uts/common/io/nxge/nxge_hio_guest.c
105
nxge->npi_vreg_handle.regh = regs->nxge_regh;
usr/src/uts/common/io/nxge/nxge_hio_guest.c
106
nxge->npi_vreg_handle.regp = (npi_reg_ptr_t)regs->nxge_regp;
usr/src/uts/common/io/nxge/nxge_hio_guest.c
112
regs->nxge_vir_regp = regs->nxge_regp;
usr/src/uts/common/io/nxge/nxge_hio_guest.c
113
regs->nxge_vir_regh = regs->nxge_regh;
usr/src/uts/common/io/nxge/nxge_hio_guest.c
63
dev_regs_t *regs;
usr/src/uts/common/io/nxge/nxge_hio_guest.c
74
regs = nxge->dev_regs;
usr/src/uts/common/io/nxge/nxge_hio_guest.c
81
rv = ddi_regs_map_setup(nxge->dip, 0, (caddr_t *)®s->nxge_regp, 0, 0,
usr/src/uts/common/io/nxge/nxge_hio_guest.c
82
&nxge_guest_register_access_attributes, ®s->nxge_regh);
usr/src/uts/common/io/nxge/nxge_hio_guest.c
89
nxge->npi_handle.regh = regs->nxge_regh;
usr/src/uts/common/io/nxge/nxge_hio_guest.c
90
nxge->npi_handle.regp = (npi_reg_ptr_t)regs->nxge_regp;
usr/src/uts/common/io/nxge/nxge_hio_guest.c
97
nxge->npi_reg_handle.regh = regs->nxge_regh;
usr/src/uts/common/io/nxge/nxge_hio_guest.c
98
nxge->npi_reg_handle.regp = (npi_reg_ptr_t)regs->nxge_regp;
usr/src/uts/common/io/pcic.c
5882
pci_regspec_t *pci_avail_p, *regs;
usr/src/uts/common/io/pcic.c
5980
(caddr_t)®s, &rlen) == DDI_SUCCESS) {
usr/src/uts/common/io/pcic.c
5994
if ((PCI_REG_ADDR_G(regs[0].pci_phys_hi) ==
usr/src/uts/common/io/pcic.c
5996
regs[0].pci_size_low == 0x1000000) {
usr/src/uts/common/io/pcic.c
5997
ra.ra_addr_lo = regs[0].pci_phys_low;
usr/src/uts/common/io/pcic.c
5998
ra.ra_len = regs[0].pci_size_low;
usr/src/uts/common/io/pcic.c
6001
if ((PCI_REG_ADDR_G(regs[1].pci_phys_hi) ==
usr/src/uts/common/io/pcic.c
6003
(regs[1].pci_size_low == 0x8000 ||
usr/src/uts/common/io/pcic.c
6004
regs[1].pci_size_low == 0x4000)) /* UB-IIi || UB-I */
usr/src/uts/common/io/pcic.c
6006
ra.ra_addr_lo = regs[1].pci_phys_low;
usr/src/uts/common/io/pcic.c
6007
ra.ra_len = regs[1].pci_size_low;
usr/src/uts/common/io/pcic.c
6010
kmem_free((caddr_t)regs, rlen);
usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c
4148
const union dbg_idle_chk_reg *regs;
usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c
4152
regs = &((const union dbg_idle_chk_reg*)s_dbg_arrays[BIN_BUF_DBG_IDLE_CHK_REGS].ptr)[rule->reg_offset];
usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c
4153
cond_regs = ®s[0].cond_reg;
usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c
4154
info_regs = ®s[rule->num_cond_regs].info_reg;
usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c
4265
const union dbg_idle_chk_reg *regs;
usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c
4271
regs = &((const union dbg_idle_chk_reg*)s_dbg_arrays[BIN_BUF_DBG_IDLE_CHK_REGS].ptr)[rule->reg_offset];
usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dbg_fw_funcs.c
4272
cond_regs = ®s[0].cond_reg;
usr/src/uts/common/io/ral/rt2560.c
2351
caddr_t regs;
usr/src/uts/common/io/ral/rt2560.c
2386
err = ddi_regs_map_setup(devinfo, 0, ®s, 0, 0, &ral_csr_accattr,
usr/src/uts/common/io/ral/rt2560.c
2394
cachelsz = ddi_get8(ioh, (uint8_t *)(regs + PCI_CONF_CACHE_LINESZ));
usr/src/uts/common/io/ral/rt2560.c
2400
(uint16_t *)((uintptr_t)regs + PCI_CONF_VENID));
usr/src/uts/common/io/ral/rt2560.c
2402
(uint16_t *)((uintptr_t)regs + PCI_CONF_DEVID));
usr/src/uts/common/io/ral/rt2560.c
2412
ddi_put16(ioh, (uint16_t *)((uintptr_t)regs + PCI_CONF_COMM), command);
usr/src/uts/common/io/ral/rt2560.c
2416
ddi_put8(ioh, (uint8_t *)(regs + PCI_CONF_LATENCY_TIMER), 0xa8);
usr/src/uts/common/io/ral/rt2560.c
2417
ddi_put8(ioh, (uint8_t *)(regs + PCI_CONF_ILINE), 0x10);
usr/src/uts/common/io/ral/rt2560.c
2424
"regs map1 = %x err=%d\n", regs, err);
usr/src/uts/common/io/rge/rge_chip.c
261
uint16_t regs[32];
usr/src/uts/common/io/rge/rge_chip.c
267
regs[i] = rge_mii_get16(rgep, i);
usr/src/uts/common/io/rge/rge_chip.c
273
regs[i+0], regs[i+1], regs[i+2], regs[i+3],
usr/src/uts/common/io/rge/rge_chip.c
274
regs[i+4], regs[i+5], regs[i+6], regs[i+7]));
usr/src/uts/common/io/rge/rge_main.c
1571
caddr_t regs;
usr/src/uts/common/io/rge/rge_main.c
1642
err = ddi_regs_map_setup(devinfo, 2, ®s,
usr/src/uts/common/io/rge/rge_main.c
1650
err = ddi_regs_map_setup(devinfo, 1, ®s,
usr/src/uts/common/io/rge/rge_main.c
1657
rgep->io_regs = regs;
usr/src/uts/common/io/rtw/rtw.c
1000
uint32_t idr0 = RTW_READ(regs, RTW_IDR0),
usr/src/uts/common/io/rtw/rtw.c
1001
idr1 = RTW_READ(regs, RTW_IDR1);
usr/src/uts/common/io/rtw/rtw.c
1053
rtw_idle(struct rtw_regs *regs)
usr/src/uts/common/io/rtw/rtw.c
1059
RTW_WRITE8(regs, RTW_TPPOLL, RTW_TPPOLL_SALL);
usr/src/uts/common/io/rtw/rtw.c
1062
(RTW_READ8(regs, RTW_TPPOLL) & RTW_TPPOLL_ALL) != 0; active++)
usr/src/uts/common/io/rtw/rtw.c
1070
struct rtw_regs *regs = &rsc->sc_regs;
usr/src/uts/common/io/rtw/rtw.c
1075
cr = RTW_READ8(regs, RTW_CR);
usr/src/uts/common/io/rtw/rtw.c
1091
RTW_WRITE8(regs, RTW_CR, cr);
usr/src/uts/common/io/rtw/rtw.c
1092
(void) RTW_READ8(regs, RTW_CR);
usr/src/uts/common/io/rtw/rtw.c
1310
struct rtw_regs *regs = &rsc->sc_regs;
usr/src/uts/common/io/rtw/rtw.c
1315
RTW_WRITE(regs, RTW_RDSAR, RTW_RING_BASE(phybaseaddr, hd_rx));
usr/src/uts/common/io/rtw/rtw.c
1316
RTW_WRITE(regs, RTW_TLPDA, RTW_RING_BASE(phybaseaddr, hd_txlo));
usr/src/uts/common/io/rtw/rtw.c
1317
RTW_WRITE(regs, RTW_TNPDA, RTW_RING_BASE(phybaseaddr, hd_txmd));
usr/src/uts/common/io/rtw/rtw.c
1318
RTW_WRITE(regs, RTW_THPDA, RTW_RING_BASE(phybaseaddr, hd_txhi));
usr/src/uts/common/io/rtw/rtw.c
1319
RTW_WRITE(regs, RTW_TBDA, RTW_RING_BASE(phybaseaddr, hd_bcn));
usr/src/uts/common/io/rtw/rtw.c
1320
rsc->hw_start = RTW_READ(regs, RTW_TNPDA);
usr/src/uts/common/io/rtw/rtw.c
1321
rsc->hw_go = RTW_READ(regs, RTW_TNPDA);
usr/src/uts/common/io/rtw/rtw.c
1421
rtw_maxim_pwrstate(struct rtw_regs *regs, enum rtw_pwrstate power,
usr/src/uts/common/io/rtw/rtw.c
1426
anaparm = RTW_READ(regs, RTW_ANAPARM);
usr/src/uts/common/io/rtw/rtw.c
1453
RTW_WRITE(regs, RTW_ANAPARM, anaparm);
usr/src/uts/common/io/rtw/rtw.c
1454
RTW_SYNC(regs, RTW_ANAPARM, RTW_ANAPARM);
usr/src/uts/common/io/rtw/rtw.c
1463
rtw_rfmd_pwrstate(struct rtw_regs *regs, enum rtw_pwrstate power,
usr/src/uts/common/io/rtw/rtw.c
1468
anaparm = RTW_READ(regs, RTW_ANAPARM);
usr/src/uts/common/io/rtw/rtw.c
1495
RTW_WRITE(regs, RTW_ANAPARM, anaparm);
usr/src/uts/common/io/rtw/rtw.c
1496
RTW_SYNC(regs, RTW_ANAPARM, RTW_ANAPARM);
usr/src/uts/common/io/rtw/rtw.c
1500
rtw_philips_pwrstate(struct rtw_regs *regs, enum rtw_pwrstate power,
usr/src/uts/common/io/rtw/rtw.c
1505
anaparm = RTW_READ(regs, RTW_ANAPARM);
usr/src/uts/common/io/rtw/rtw.c
1537
RTW_WRITE(regs, RTW_ANAPARM, anaparm);
usr/src/uts/common/io/rtw/rtw.c
1538
RTW_SYNC(regs, RTW_ANAPARM, RTW_ANAPARM);
usr/src/uts/common/io/rtw/rtw.c
1545
struct rtw_regs *regs = &rsc->sc_regs;
usr/src/uts/common/io/rtw/rtw.c
1547
rtw_set_access(regs, RTW_ACCESS_ANAPARM);
usr/src/uts/common/io/rtw/rtw.c
1549
(*rsc->sc_pwrstate_cb)(regs, power, before_rf, digphy);
usr/src/uts/common/io/rtw/rtw.c
1551
rtw_set_access(regs, RTW_ACCESS_NONE);
usr/src/uts/common/io/rtw/rtw.c
1665
struct rtw_regs *regs = &rsc->sc_regs;
usr/src/uts/common/io/rtw/rtw.c
1691
RTW_WRITE(regs, RTW_MAR0, 0xffffffff);
usr/src/uts/common/io/rtw/rtw.c
1692
RTW_WRITE(regs, RTW_MAR1, 0xffffffff);
usr/src/uts/common/io/rtw/rtw.c
1694
RTW_WRITE(regs, RTW_RCR, rsc->sc_rcr);
usr/src/uts/common/io/rtw/rtw.c
1695
RTW_SYNC(regs, RTW_MAR0, RTW_RCR); /* RTW_MAR0 < RTW_MAR1 < RTW_RCR */
usr/src/uts/common/io/rtw/rtw.c
1699
RTW_READ(regs, RTW_MAR0),
usr/src/uts/common/io/rtw/rtw.c
1700
RTW_READ(regs, RTW_MAR1), RTW_READ(regs, RTW_RCR));
usr/src/uts/common/io/rtw/rtw.c
1701
RTW_WRITE(regs, RTW_RCR, rsc->sc_rcr);
usr/src/uts/common/io/rtw/rtw.c
1705
rtw_transmit_config(struct rtw_regs *regs)
usr/src/uts/common/io/rtw/rtw.c
1709
tcr = RTW_READ(regs, RTW_TCR);
usr/src/uts/common/io/rtw/rtw.c
1723
RTW_WRITE(regs, RTW_TCR, tcr);
usr/src/uts/common/io/rtw/rtw.c
1724
RTW_SYNC(regs, RTW_TCR, RTW_TCR);
usr/src/uts/common/io/rtw/rtw.c
1730
struct rtw_regs *regs;
usr/src/uts/common/io/rtw/rtw.c
1733
regs = &rsc->sc_regs;
usr/src/uts/common/io/rtw/rtw.c
1738
rtw_beacon_tx_disable(regs);
usr/src/uts/common/io/rtw/rtw.c
1740
rtw_set_mode(regs, RTW_EPROM_CMD_CONFIG);
usr/src/uts/common/io/rtw/rtw.c
1742
rtw_transmit_config(regs);
usr/src/uts/common/io/rtw/rtw.c
1744
rtw_set_access(regs, RTW_ACCESS_CONFIG);
usr/src/uts/common/io/rtw/rtw.c
1745
RTW_WRITE(regs, RTW_TINT, 0xffffffff);
usr/src/uts/common/io/rtw/rtw.c
1746
RTW_WRITE8(regs, RTW_MSR, 0x0); /* no link */
usr/src/uts/common/io/rtw/rtw.c
1747
RTW_WRITE16(regs, RTW_BRSR, 0);
usr/src/uts/common/io/rtw/rtw.c
1749
rtw_set_access(regs, RTW_ACCESS_ANAPARM);
usr/src/uts/common/io/rtw/rtw.c
1750
rtw_set_access(regs, RTW_ACCESS_NONE);
usr/src/uts/common/io/rtw/rtw.c
1751
RTW_WRITE(regs, RTW_FEMR, 0xffff);
usr/src/uts/common/io/rtw/rtw.c
1752
RTW_SYNC(regs, RTW_FEMR, RTW_FEMR);
usr/src/uts/common/io/rtw/rtw.c
1753
rtw_set_rfprog(regs, rsc->sc_rfchipid, "rtw");
usr/src/uts/common/io/rtw/rtw.c
1755
RTW_WRITE8(regs, RTW_PHYDELAY, rsc->sc_phydelay);
usr/src/uts/common/io/rtw/rtw.c
1756
RTW_WRITE8(regs, RTW_CRCOUNT, RTW_CRCOUNT_MAGIC);
usr/src/uts/common/io/rtw/rtw.c
1757
rtw_set_mode(regs, RTW_EPROM_CMD_NORMAL);
usr/src/uts/common/io/rtw/rtw.c
1883
rtw_check_phydelay(struct rtw_regs *regs, uint32_t rcr0)
usr/src/uts/common/io/rtw/rtw.c
1890
RTW_WRITE(regs, RTW_RCR, REVAB);
usr/src/uts/common/io/rtw/rtw.c
1891
RTW_WBW(regs, RTW_RCR, RTW_RCR);
usr/src/uts/common/io/rtw/rtw.c
1892
RTW_WRITE(regs, RTW_RCR, REVC);
usr/src/uts/common/io/rtw/rtw.c
1894
RTW_WBR(regs, RTW_RCR, RTW_RCR);
usr/src/uts/common/io/rtw/rtw.c
1895
if ((RTW_READ(regs, RTW_RCR) & REVC) == REVC)
usr/src/uts/common/io/rtw/rtw.c
1898
RTW_WRITE(regs, RTW_RCR, rcr0); /* restore RCR */
usr/src/uts/common/io/rtw/rtw.c
1899
RTW_SYNC(regs, RTW_RCR, RTW_RCR);
usr/src/uts/common/io/rtw/rtw.c
2347
struct rtw_regs *regs = &rsc->sc_regs;
usr/src/uts/common/io/rtw/rtw.c
2350
RTW_WRITE8(regs, RTW_BSSID + i, bssid[i]);
usr/src/uts/common/io/rtw/rtw.c
2352
RTW_SYNC(regs, RTW_BSSID16, RTW_BSSID32);
usr/src/uts/common/io/rtw/rtw.c
2353
rtw_set_access(regs, RTW_ACCESS_CONFIG);
usr/src/uts/common/io/rtw/rtw.c
2355
RTW_WRITE8(regs, RTW_MSR, 0x8); /* sta mode link ok */
usr/src/uts/common/io/rtw/rtw.c
2358
bcnitv = RTW_READ16(regs, RTW_BCNITV) & ~RTW_BCNITV_BCNITV_MASK;
usr/src/uts/common/io/rtw/rtw.c
2360
RTW_WRITE16(regs, RTW_BCNITV, bcnitv);
usr/src/uts/common/io/rtw/rtw.c
2361
RTW_WRITE16(regs, RTW_ATIMWND, LSHIFT(1, RTW_ATIMWND_ATIMWND));
usr/src/uts/common/io/rtw/rtw.c
2362
RTW_WRITE16(regs, RTW_ATIMTRITV, LSHIFT(2, RTW_ATIMTRITV_ATIMTRITV));
usr/src/uts/common/io/rtw/rtw.c
2364
rtw_set_access(regs, RTW_ACCESS_NONE);
usr/src/uts/common/io/rtw/rtw.c
252
rtw_print_regs(struct rtw_regs *regs, const char *dvname, const char *where)
usr/src/uts/common/io/rtw/rtw.c
257
dvname, reg, RTW_READ(regs, reg))
usr/src/uts/common/io/rtw/rtw.c
262
dvname, reg, RTW_READ16(regs, reg))
usr/src/uts/common/io/rtw/rtw.c
267
dvname, reg, RTW_READ8(regs, reg))
usr/src/uts/common/io/rtw/rtw.c
271
PRINTREG32(regs, RTW_IDR0);
usr/src/uts/common/io/rtw/rtw.c
272
PRINTREG32(regs, RTW_IDR1);
usr/src/uts/common/io/rtw/rtw.c
273
PRINTREG32(regs, RTW_MAR0);
usr/src/uts/common/io/rtw/rtw.c
274
PRINTREG32(regs, RTW_MAR1);
usr/src/uts/common/io/rtw/rtw.c
275
PRINTREG32(regs, RTW_TSFTRL);
usr/src/uts/common/io/rtw/rtw.c
276
PRINTREG32(regs, RTW_TSFTRH);
usr/src/uts/common/io/rtw/rtw.c
277
PRINTREG32(regs, RTW_TLPDA);
usr/src/uts/common/io/rtw/rtw.c
278
PRINTREG32(regs, RTW_TNPDA);
usr/src/uts/common/io/rtw/rtw.c
2787
struct rtw_regs *regs = &rsc->sc_regs;
usr/src/uts/common/io/rtw/rtw.c
279
PRINTREG32(regs, RTW_THPDA);
usr/src/uts/common/io/rtw/rtw.c
2791
isr = RTW_READ16(regs, RTW_ISR);
usr/src/uts/common/io/rtw/rtw.c
2792
RTW_WRITE16(regs, RTW_ISR, isr);
usr/src/uts/common/io/rtw/rtw.c
280
PRINTREG32(regs, RTW_TCR);
usr/src/uts/common/io/rtw/rtw.c
281
PRINTREG32(regs, RTW_RCR);
usr/src/uts/common/io/rtw/rtw.c
282
PRINTREG32(regs, RTW_TINT);
usr/src/uts/common/io/rtw/rtw.c
283
PRINTREG32(regs, RTW_TBDA);
usr/src/uts/common/io/rtw/rtw.c
284
PRINTREG32(regs, RTW_ANAPARM);
usr/src/uts/common/io/rtw/rtw.c
285
PRINTREG32(regs, RTW_BB);
usr/src/uts/common/io/rtw/rtw.c
2850
struct rtw_regs *regs = &rsc->sc_regs;
usr/src/uts/common/io/rtw/rtw.c
2853
rtw_disable_interrupts(regs);
usr/src/uts/common/io/rtw/rtw.c
2855
RTW_WRITE8(regs, RTW_TPPOLL, RTW_TPPOLL_SALL);
usr/src/uts/common/io/rtw/rtw.c
286
PRINTREG32(regs, RTW_PHYCFG);
usr/src/uts/common/io/rtw/rtw.c
287
PRINTREG32(regs, RTW_WAKEUP0L);
usr/src/uts/common/io/rtw/rtw.c
288
PRINTREG32(regs, RTW_WAKEUP0H);
usr/src/uts/common/io/rtw/rtw.c
2883
struct rtw_regs *regs;
usr/src/uts/common/io/rtw/rtw.c
2887
regs = &rsc->sc_regs;
usr/src/uts/common/io/rtw/rtw.c
289
PRINTREG32(regs, RTW_WAKEUP1L);
usr/src/uts/common/io/rtw/rtw.c
2890
rtw_disable_interrupts(regs);
usr/src/uts/common/io/rtw/rtw.c
2892
RTW_WRITE8(regs, RTW_TPPOLL, RTW_TPPOLL_SALL);
usr/src/uts/common/io/rtw/rtw.c
290
PRINTREG32(regs, RTW_WAKEUP1H);
usr/src/uts/common/io/rtw/rtw.c
291
PRINTREG32(regs, RTW_WAKEUP2LL);
usr/src/uts/common/io/rtw/rtw.c
292
PRINTREG32(regs, RTW_WAKEUP2LH);
usr/src/uts/common/io/rtw/rtw.c
293
PRINTREG32(regs, RTW_WAKEUP2HL);
usr/src/uts/common/io/rtw/rtw.c
294
PRINTREG32(regs, RTW_WAKEUP2HH);
usr/src/uts/common/io/rtw/rtw.c
295
PRINTREG32(regs, RTW_WAKEUP3LL);
usr/src/uts/common/io/rtw/rtw.c
296
PRINTREG32(regs, RTW_WAKEUP3LH);
usr/src/uts/common/io/rtw/rtw.c
2967
struct rtw_regs *regs = &rsc->sc_regs;
usr/src/uts/common/io/rtw/rtw.c
297
PRINTREG32(regs, RTW_WAKEUP3HL);
usr/src/uts/common/io/rtw/rtw.c
2974
RTW_WRITE(regs, RTW_IDR0, ntohl(t));
usr/src/uts/common/io/rtw/rtw.c
2976
RTW_WRITE(regs, RTW_IDR1, ntohl(t));
usr/src/uts/common/io/rtw/rtw.c
298
PRINTREG32(regs, RTW_WAKEUP3HH);
usr/src/uts/common/io/rtw/rtw.c
2985
struct rtw_regs *regs = &rsc->sc_regs;
usr/src/uts/common/io/rtw/rtw.c
299
PRINTREG32(regs, RTW_WAKEUP4LL);
usr/src/uts/common/io/rtw/rtw.c
2994
RTW_WRITE(regs, RTW_RCR, rsc->sc_rcr);
usr/src/uts/common/io/rtw/rtw.c
300
PRINTREG32(regs, RTW_WAKEUP4LH);
usr/src/uts/common/io/rtw/rtw.c
3004
struct rtw_regs *regs = &rsc->sc_regs;
usr/src/uts/common/io/rtw/rtw.c
301
PRINTREG32(regs, RTW_WAKEUP4HL);
usr/src/uts/common/io/rtw/rtw.c
3012
RTW_WRITE(regs, RTW_MAR0, ntohl(t));
usr/src/uts/common/io/rtw/rtw.c
3014
RTW_WRITE(regs, RTW_MAR1, ntohl(t));
usr/src/uts/common/io/rtw/rtw.c
3015
RTW_WRITE(regs, RTW_RCR, rsc->sc_rcr);
usr/src/uts/common/io/rtw/rtw.c
3016
RTW_SYNC(regs, RTW_MAR0, RTW_RCR);
usr/src/uts/common/io/rtw/rtw.c
3019
RTW_WRITE(regs, RTW_MAR0, 0);
usr/src/uts/common/io/rtw/rtw.c
302
PRINTREG32(regs, RTW_WAKEUP4HH);
usr/src/uts/common/io/rtw/rtw.c
3020
RTW_WRITE(regs, RTW_MAR1, 0);
usr/src/uts/common/io/rtw/rtw.c
3021
RTW_WRITE(regs, RTW_RCR, rsc->sc_rcr);
usr/src/uts/common/io/rtw/rtw.c
3022
RTW_SYNC(regs, RTW_MAR0, RTW_RCR);
usr/src/uts/common/io/rtw/rtw.c
303
PRINTREG32(regs, RTW_DK0);
usr/src/uts/common/io/rtw/rtw.c
304
PRINTREG32(regs, RTW_DK1);
usr/src/uts/common/io/rtw/rtw.c
305
PRINTREG32(regs, RTW_DK2);
usr/src/uts/common/io/rtw/rtw.c
306
PRINTREG32(regs, RTW_DK3);
usr/src/uts/common/io/rtw/rtw.c
307
PRINTREG32(regs, RTW_RETRYCTR);
usr/src/uts/common/io/rtw/rtw.c
308
PRINTREG32(regs, RTW_RDSAR);
usr/src/uts/common/io/rtw/rtw.c
309
PRINTREG32(regs, RTW_FER);
usr/src/uts/common/io/rtw/rtw.c
310
PRINTREG32(regs, RTW_FEMR);
usr/src/uts/common/io/rtw/rtw.c
311
PRINTREG32(regs, RTW_FPSR);
usr/src/uts/common/io/rtw/rtw.c
312
PRINTREG32(regs, RTW_FFER);
usr/src/uts/common/io/rtw/rtw.c
315
PRINTREG16(regs, RTW_BRSR);
usr/src/uts/common/io/rtw/rtw.c
316
PRINTREG16(regs, RTW_IMR);
usr/src/uts/common/io/rtw/rtw.c
317
PRINTREG16(regs, RTW_ISR);
usr/src/uts/common/io/rtw/rtw.c
318
PRINTREG16(regs, RTW_BCNITV);
usr/src/uts/common/io/rtw/rtw.c
319
PRINTREG16(regs, RTW_ATIMWND);
usr/src/uts/common/io/rtw/rtw.c
320
PRINTREG16(regs, RTW_BINTRITV);
usr/src/uts/common/io/rtw/rtw.c
321
PRINTREG16(regs, RTW_ATIMTRITV);
usr/src/uts/common/io/rtw/rtw.c
322
PRINTREG16(regs, RTW_CRC16ERR);
usr/src/uts/common/io/rtw/rtw.c
323
PRINTREG16(regs, RTW_CRC0);
usr/src/uts/common/io/rtw/rtw.c
324
PRINTREG16(regs, RTW_CRC1);
usr/src/uts/common/io/rtw/rtw.c
325
PRINTREG16(regs, RTW_CRC2);
usr/src/uts/common/io/rtw/rtw.c
326
PRINTREG16(regs, RTW_CRC3);
usr/src/uts/common/io/rtw/rtw.c
327
PRINTREG16(regs, RTW_CRC4);
usr/src/uts/common/io/rtw/rtw.c
328
PRINTREG16(regs, RTW_CWR);
usr/src/uts/common/io/rtw/rtw.c
331
PRINTREG8(regs, RTW_CR);
usr/src/uts/common/io/rtw/rtw.c
332
PRINTREG8(regs, RTW_9346CR);
usr/src/uts/common/io/rtw/rtw.c
333
PRINTREG8(regs, RTW_CONFIG0);
usr/src/uts/common/io/rtw/rtw.c
334
PRINTREG8(regs, RTW_CONFIG1);
usr/src/uts/common/io/rtw/rtw.c
335
PRINTREG8(regs, RTW_CONFIG2);
usr/src/uts/common/io/rtw/rtw.c
336
PRINTREG8(regs, RTW_MSR);
usr/src/uts/common/io/rtw/rtw.c
337
PRINTREG8(regs, RTW_CONFIG3);
usr/src/uts/common/io/rtw/rtw.c
338
PRINTREG8(regs, RTW_CONFIG4);
usr/src/uts/common/io/rtw/rtw.c
339
PRINTREG8(regs, RTW_TESTR);
usr/src/uts/common/io/rtw/rtw.c
340
PRINTREG8(regs, RTW_PSR);
usr/src/uts/common/io/rtw/rtw.c
341
PRINTREG8(regs, RTW_SCR);
usr/src/uts/common/io/rtw/rtw.c
342
PRINTREG8(regs, RTW_PHYDELAY);
usr/src/uts/common/io/rtw/rtw.c
343
PRINTREG8(regs, RTW_CRCOUNT);
usr/src/uts/common/io/rtw/rtw.c
344
PRINTREG8(regs, RTW_PHYADDR);
usr/src/uts/common/io/rtw/rtw.c
345
PRINTREG8(regs, RTW_PHYDATAW);
usr/src/uts/common/io/rtw/rtw.c
346
PRINTREG8(regs, RTW_PHYDATAR);
usr/src/uts/common/io/rtw/rtw.c
347
PRINTREG8(regs, RTW_CONFIG5);
usr/src/uts/common/io/rtw/rtw.c
348
PRINTREG8(regs, RTW_TPPOLL);
usr/src/uts/common/io/rtw/rtw.c
350
PRINTREG16(regs, RTW_BSSID16);
usr/src/uts/common/io/rtw/rtw.c
351
PRINTREG32(regs, RTW_BSSID32);
usr/src/uts/common/io/rtw/rtw.c
377
rtw_config0123_enable(struct rtw_regs *regs, int enable)
usr/src/uts/common/io/rtw/rtw.c
380
ecr = RTW_READ8(regs, RTW_9346CR);
usr/src/uts/common/io/rtw/rtw.c
385
RTW_WBW(regs, RTW_9346CR, MAX(RTW_CONFIG0, RTW_CONFIG3));
usr/src/uts/common/io/rtw/rtw.c
388
RTW_WRITE8(regs, RTW_9346CR, ecr);
usr/src/uts/common/io/rtw/rtw.c
389
RTW_SYNC(regs, RTW_9346CR, RTW_9346CR);
usr/src/uts/common/io/rtw/rtw.c
396
rtw_anaparm_enable(struct rtw_regs *regs, int enable)
usr/src/uts/common/io/rtw/rtw.c
400
cfg3 = RTW_READ8(regs, RTW_CONFIG3);
usr/src/uts/common/io/rtw/rtw.c
406
RTW_WRITE8(regs, RTW_CONFIG3, cfg3);
usr/src/uts/common/io/rtw/rtw.c
407
RTW_SYNC(regs, RTW_CONFIG3, RTW_CONFIG3);
usr/src/uts/common/io/rtw/rtw.c
417
struct rtw_regs *regs = &rsc->sc_regs;
usr/src/uts/common/io/rtw/rtw.c
419
anaparm = RTW_READ(regs, RTW_ANAPARM);
usr/src/uts/common/io/rtw/rtw.c
424
RTW_WRITE(regs, RTW_ANAPARM, anaparm);
usr/src/uts/common/io/rtw/rtw.c
425
RTW_SYNC(regs, RTW_ANAPARM, RTW_ANAPARM);
usr/src/uts/common/io/rtw/rtw.c
429
rtw_set_access1(struct rtw_regs *regs, enum rtw_access naccess)
usr/src/uts/common/io/rtw/rtw.c
432
ASSERT(regs->r_access >= RTW_ACCESS_NONE &&
usr/src/uts/common/io/rtw/rtw.c
433
regs->r_access <= RTW_ACCESS_ANAPARM);
usr/src/uts/common/io/rtw/rtw.c
435
if (naccess == regs->r_access)
usr/src/uts/common/io/rtw/rtw.c
440
switch (regs->r_access) {
usr/src/uts/common/io/rtw/rtw.c
442
rtw_anaparm_enable(regs, 0);
usr/src/uts/common/io/rtw/rtw.c
445
rtw_config0123_enable(regs, 0);
usr/src/uts/common/io/rtw/rtw.c
452
switch (regs->r_access) {
usr/src/uts/common/io/rtw/rtw.c
454
rtw_config0123_enable(regs, 1);
usr/src/uts/common/io/rtw/rtw.c
459
rtw_anaparm_enable(regs, 0);
usr/src/uts/common/io/rtw/rtw.c
464
switch (regs->r_access) {
usr/src/uts/common/io/rtw/rtw.c
466
rtw_config0123_enable(regs, 1);
usr/src/uts/common/io/rtw/rtw.c
469
rtw_anaparm_enable(regs, 1);
usr/src/uts/common/io/rtw/rtw.c
479
rtw_set_access(struct rtw_regs *regs, enum rtw_access access)
usr/src/uts/common/io/rtw/rtw.c
481
rtw_set_access1(regs, access);
usr/src/uts/common/io/rtw/rtw.c
484
rtw_access_string(regs->r_access),
usr/src/uts/common/io/rtw/rtw.c
486
regs->r_access = access;
usr/src/uts/common/io/rtw/rtw.c
493
struct rtw_regs *regs = &rsc->sc_regs;
usr/src/uts/common/io/rtw/rtw.c
496
tcr = RTW_READ(regs, RTW_TCR);
usr/src/uts/common/io/rtw/rtw.c
502
RTW_WRITE(regs, RTW_TCR, tcr);
usr/src/uts/common/io/rtw/rtw.c
503
RTW_SYNC(regs, RTW_TCR, RTW_TCR);
usr/src/uts/common/io/rtw/rtw.c
504
rtw_set_access(regs, RTW_ACCESS_ANAPARM);
usr/src/uts/common/io/rtw/rtw.c
506
rtw_set_access(regs, RTW_ACCESS_ANAPARM);
usr/src/uts/common/io/rtw/rtw.c
507
rtw_set_access(regs, RTW_ACCESS_NONE);
usr/src/uts/common/io/rtw/rtw.c
511
rtw_chip_reset1(struct rtw_regs *regs, const char *dvname)
usr/src/uts/common/io/rtw/rtw.c
516
RTW_WRITE8(regs, RTW_CR, RTW_CR_RST);
usr/src/uts/common/io/rtw/rtw.c
518
RTW_WBR(regs, RTW_CR, RTW_CR);
usr/src/uts/common/io/rtw/rtw.c
521
cr = RTW_READ8(regs, RTW_CR);
usr/src/uts/common/io/rtw/rtw.c
527
RTW_RBR(regs, RTW_CR, RTW_CR);
usr/src/uts/common/io/rtw/rtw.c
536
rtw_chip_reset(struct rtw_regs *regs, const char *dvname)
usr/src/uts/common/io/rtw/rtw.c
538
RTW_WBW(regs, RTW_CR, RTW_TCR);
usr/src/uts/common/io/rtw/rtw.c
539
return (rtw_chip_reset1(regs, dvname));
usr/src/uts/common/io/rtw/rtw.c
543
rtw_disable_interrupts(struct rtw_regs *regs)
usr/src/uts/common/io/rtw/rtw.c
545
RTW_WRITE16(regs, RTW_IMR, 0);
usr/src/uts/common/io/rtw/rtw.c
546
RTW_WRITE16(regs, RTW_ISR, 0xffff);
usr/src/uts/common/io/rtw/rtw.c
547
(void) RTW_READ16(regs, RTW_IMR);
usr/src/uts/common/io/rtw/rtw.c
553
struct rtw_regs *regs = &rsc->sc_regs;
usr/src/uts/common/io/rtw/rtw.c
557
RTW_WRITE16(regs, RTW_IMR, rsc->sc_inten);
usr/src/uts/common/io/rtw/rtw.c
558
RTW_WRITE16(regs, RTW_ISR, 0xffff);
usr/src/uts/common/io/rtw/rtw.c
562
(*rsc->sc_intr_ack)(regs);
usr/src/uts/common/io/rtw/rtw.c
566
rtw_recall_eeprom(struct rtw_regs *regs, const char *dvname)
usr/src/uts/common/io/rtw/rtw.c
571
ecr = RTW_READ8(regs, RTW_9346CR);
usr/src/uts/common/io/rtw/rtw.c
573
RTW_WRITE8(regs, RTW_9346CR, ecr);
usr/src/uts/common/io/rtw/rtw.c
575
RTW_WBR(regs, RTW_9346CR, RTW_9346CR);
usr/src/uts/common/io/rtw/rtw.c
579
ecr = RTW_READ8(regs, RTW_9346CR);
usr/src/uts/common/io/rtw/rtw.c
585
RTW_RBR(regs, RTW_9346CR, RTW_9346CR);
usr/src/uts/common/io/rtw/rtw.c
606
rtw_set_mode(struct rtw_regs *regs, int mode)
usr/src/uts/common/io/rtw/rtw.c
609
command = RTW_READ8(regs, RTW_9346CR);
usr/src/uts/common/io/rtw/rtw.c
614
RTW_WRITE8(regs, RTW_9346CR, command);
usr/src/uts/common/io/rtw/rtw.c
618
rtw_dma_start(struct rtw_regs *regs, int priority)
usr/src/uts/common/io/rtw/rtw.c
622
check = RTW_READ8(regs, RTW_TPPOLL);
usr/src/uts/common/io/rtw/rtw.c
625
RTW_WRITE8(regs, RTW_TPPOLL,
usr/src/uts/common/io/rtw/rtw.c
629
RTW_WRITE8(regs, RTW_TPPOLL,
usr/src/uts/common/io/rtw/rtw.c
633
RTW_WRITE8(regs, RTW_TPPOLL,
usr/src/uts/common/io/rtw/rtw.c
637
(void) RTW_READ8(regs, RTW_TPPOLL);
usr/src/uts/common/io/rtw/rtw.c
641
rtw_beacon_tx_disable(struct rtw_regs *regs)
usr/src/uts/common/io/rtw/rtw.c
645
rtw_set_mode(regs, RTW_EPROM_CMD_CONFIG);
usr/src/uts/common/io/rtw/rtw.c
646
RTW_WRITE8(regs, RTW_TPPOLL, mask);
usr/src/uts/common/io/rtw/rtw.c
647
rtw_set_mode(regs, RTW_EPROM_CMD_NORMAL);
usr/src/uts/common/io/rtw/rtw.c
656
struct rtw_regs *regs = &rsc->sc_regs;
usr/src/uts/common/io/rtw/rtw.c
659
(void) RTW_READ8(regs, RTW_CR);
usr/src/uts/common/io/rtw/rtw.c
790
rtw_srom_read(struct rtw_regs *regs, uint32_t flags, struct rtw_srom *sr,
usr/src/uts/common/io/rtw/rtw.c
799
ecr = RTW_READ8(regs, RTW_9346CR);
usr/src/uts/common/io/rtw/rtw.c
815
RTW_WRITE8(regs, RTW_9346CR, ecr);
usr/src/uts/common/io/rtw/rtw.c
832
sd.sd_handle = regs->r_handle;
usr/src/uts/common/io/rtw/rtw.c
833
sd.sd_base = regs->r_base;
usr/src/uts/common/io/rtw/rtw.c
861
RTW_WRITE8(regs, RTW_9346CR,
usr/src/uts/common/io/rtw/rtw.c
863
RTW_WBRW(regs, RTW_9346CR, RTW_9346CR);
usr/src/uts/common/io/rtw/rtw.c
865
if ((rc = rtw_recall_eeprom(regs, dvname)) != 0)
usr/src/uts/common/io/rtw/rtw.c
883
rtw_set_rfprog(struct rtw_regs *regs, enum rtw_rfchipid rfchipid,
usr/src/uts/common/io/rtw/rtw.c
889
cfg4 = RTW_READ8(regs, RTW_CONFIG4) & ~RTW_CONFIG4_RFTYPE_MASK;
usr/src/uts/common/io/rtw/rtw.c
911
RTW_WRITE8(regs, RTW_CONFIG4, cfg4);
usr/src/uts/common/io/rtw/rtw.c
913
RTW_WBR(regs, RTW_CONFIG4, RTW_CONFIG4);
usr/src/uts/common/io/rtw/rtw.c
917
RTW_READ8(regs, RTW_CONFIG4));
usr/src/uts/common/io/rtw/rtw.c
975
rtw_identify_country(struct rtw_regs *regs, enum rtw_locale *locale,
usr/src/uts/common/io/rtw/rtw.c
978
uint8_t cfg0 = RTW_READ8(regs, RTW_CONFIG0);
usr/src/uts/common/io/rtw/rtw.c
997
rtw_identify_sta(struct rtw_regs *regs, uint8_t *addr,
usr/src/uts/common/io/rtw/rtwphy.c
103
if ((rc = rtw_bbp_write(regs, reg, val)) != 0) \
usr/src/uts/common/io/rtw/rtwphy.c
113
if ((rc = rtw_bbp_preinit(regs, bb->bb_antatten, dflantb, freq)) != 0)
usr/src/uts/common/io/rtw/rtwphy.c
442
rtw_sa2400_create(struct rtw_regs *regs, rtw_rf_write_t rf_write, int digphy)
usr/src/uts/common/io/rtw/rtwphy.c
481
bus->b_regs = regs;
usr/src/uts/common/io/rtw/rtwphy.c
590
rtw_max2820_create(struct rtw_regs *regs, rtw_rf_write_t rf_write, int is_a)
usr/src/uts/common/io/rtw/rtwphy.c
629
bus->b_regs = regs;
usr/src/uts/common/io/rtw/rtwphy.c
639
rtw_phy_init(struct rtw_regs *regs, struct rtw_rf *rf, uint8_t opaque_txpower,
usr/src/uts/common/io/rtw/rtwphy.c
650
if ((rc = rtw_bbp_preinit(regs, rf->rf_bbpset.bb_antatten, dflantb,
usr/src/uts/common/io/rtw/rtwphy.c
665
return (rtw_bbp_init(regs, &rf->rf_bbpset, antdiv, dflantb,
usr/src/uts/common/io/rtw/rtwphy.c
78
rtw_bbp_preinit(struct rtw_regs *regs, uint_t antatten0, int dflantb,
usr/src/uts/common/io/rtw/rtwphy.c
86
return (rtw_bbp_write(regs, RTW_BBP_ANTATTEN, antatten));
usr/src/uts/common/io/rtw/rtwphy.c
90
rtw_bbp_init(struct rtw_regs *regs, struct rtw_bbpset *bb, int antdiv,
usr/src/uts/common/io/rtw/rtwphyio.c
104
rtw_rf_hostbangbits(struct rtw_regs *regs, uint32_t bits, int lo_to_hi,
usr/src/uts/common/io/rtw/rtwphyio.c
115
RTW_WRITE(regs, RTW_PHYCFG, reg);
usr/src/uts/common/io/rtw/rtwphyio.c
116
RTW_SYNC(regs, RTW_PHYCFG, RTW_PHYCFG);
usr/src/uts/common/io/rtw/rtwphyio.c
134
RTW_WRITE(regs, RTW_PHYCFG, reg);
usr/src/uts/common/io/rtw/rtwphyio.c
135
RTW_SYNC(regs, RTW_PHYCFG, RTW_PHYCFG);
usr/src/uts/common/io/rtw/rtwphyio.c
140
RTW_WRITE(regs, RTW_PHYCFG, reg);
usr/src/uts/common/io/rtw/rtwphyio.c
141
RTW_SYNC(regs, RTW_PHYCFG, RTW_PHYCFG);
usr/src/uts/common/io/rtw/rtwphyio.c
150
RTW_WRITE(regs, RTW_PHYCFG, reg);
usr/src/uts/common/io/rtw/rtwphyio.c
151
RTW_SYNC(regs, RTW_PHYCFG, RTW_PHYCFG);
usr/src/uts/common/io/rtw/rtwphyio.c
159
rtw_rf_macbangbits(struct rtw_regs *regs, uint32_t reg)
usr/src/uts/common/io/rtw/rtwphyio.c
165
RTW_WRITE(regs, RTW_PHYCFG, RTW_PHYCFG_MAC_POLL | reg);
usr/src/uts/common/io/rtw/rtwphyio.c
167
RTW_WBR(regs, RTW_PHYCFG, RTW_PHYCFG);
usr/src/uts/common/io/rtw/rtwphyio.c
170
if ((RTW_READ(regs, RTW_PHYCFG) & RTW_PHYCFG_MAC_POLL) == 0) {
usr/src/uts/common/io/rtw/rtwphyio.c
176
RTW_RBR(regs, RTW_PHYCFG, RTW_PHYCFG); /* paranoia? */
usr/src/uts/common/io/rtw/rtwphyio.c
236
rtw_rf_hostwrite(struct rtw_regs *regs, enum rtw_rfchipid rfchipid,
usr/src/uts/common/io/rtw/rtwphyio.c
277
rtw_rf_hostbangbits(regs, bits, lo_to_hi, nbits);
usr/src/uts/common/io/rtw/rtwphyio.c
298
rtw_rf_macwrite(struct rtw_regs *regs, enum rtw_rfchipid rfchipid,
usr/src/uts/common/io/rtw/rtwphyio.c
338
return (rtw_rf_macbangbits(regs, reg));
usr/src/uts/common/io/rtw/rtwphyio.c
52
rtw_bbp_read(struct rtw_regs *regs, uint_t addr)
usr/src/uts/common/io/rtw/rtwphyio.c
54
RTW_WRITE(regs, RTW_BB,
usr/src/uts/common/io/rtw/rtwphyio.c
57
RTW_WBR(regs, RTW_BB, RTW_BB);
usr/src/uts/common/io/rtw/rtwphyio.c
58
return (MASK_AND_RSHIFT(RTW_READ(regs, RTW_BB), RTW_BB_RD_MASK));
usr/src/uts/common/io/rtw/rtwphyio.c
62
rtw_bbp_write(struct rtw_regs *regs, uint_t addr, uint_t val)
usr/src/uts/common/io/rtw/rtwphyio.c
81
RTW_RBW(regs, RTW_BB, RTW_BB);
usr/src/uts/common/io/rtw/rtwphyio.c
82
RTW_WRITE(regs, RTW_BB, wrbbp);
usr/src/uts/common/io/rtw/rtwphyio.c
83
RTW_SYNC(regs, RTW_BB, RTW_BB);
usr/src/uts/common/io/rtw/rtwphyio.c
84
RTW_WRITE(regs, RTW_BB, rdbbp);
usr/src/uts/common/io/rtw/rtwphyio.c
85
RTW_SYNC(regs, RTW_BB, RTW_BB);
usr/src/uts/common/io/rtw/rtwphyio.c
87
if (MASK_AND_RSHIFT(RTW_READ(regs, RTW_BB),
usr/src/uts/common/io/rtw/rtwreg.h
1219
#define RTW_READ8(regs, ofs) \
usr/src/uts/common/io/rtw/rtwreg.h
1220
ddi_get8((regs)->r_handle, \
usr/src/uts/common/io/rtw/rtwreg.h
1221
(uint8_t *)((regs)->r_base + (ofs)))
usr/src/uts/common/io/rtw/rtwreg.h
1223
#define RTW_READ16(regs, ofs) \
usr/src/uts/common/io/rtw/rtwreg.h
1224
ddi_get16((regs)->r_handle, \
usr/src/uts/common/io/rtw/rtwreg.h
1225
(uint16_t *)((uintptr_t)(regs)->r_base + (ofs)))
usr/src/uts/common/io/rtw/rtwreg.h
1227
#define RTW_READ(regs, ofs) \
usr/src/uts/common/io/rtw/rtwreg.h
1228
ddi_get32((regs)->r_handle, \
usr/src/uts/common/io/rtw/rtwreg.h
1229
(uint32_t *)((uintptr_t)(regs)->r_base + (ofs)))
usr/src/uts/common/io/rtw/rtwreg.h
1231
#define RTW_WRITE8(regs, ofs, val) \
usr/src/uts/common/io/rtw/rtwreg.h
1232
ddi_put8((regs)->r_handle, \
usr/src/uts/common/io/rtw/rtwreg.h
1233
(uint8_t *)((regs)->r_base + (ofs)), val)
usr/src/uts/common/io/rtw/rtwreg.h
1235
#define RTW_WRITE16(regs, ofs, val) \
usr/src/uts/common/io/rtw/rtwreg.h
1236
ddi_put16((regs)->r_handle, \
usr/src/uts/common/io/rtw/rtwreg.h
1237
(uint16_t *)((uintptr_t)(regs)->r_base + (ofs)), val)
usr/src/uts/common/io/rtw/rtwreg.h
1239
#define RTW_WRITE(regs, ofs, val) \
usr/src/uts/common/io/rtw/rtwreg.h
1240
ddi_put32((regs)->r_handle, \
usr/src/uts/common/io/rtw/rtwreg.h
1241
(uint32_t *)((uintptr_t)(regs)->r_base + (ofs)), val)
usr/src/uts/common/io/rtw/rtwreg.h
1243
#define RTW_ISSET(regs, reg, mask) \
usr/src/uts/common/io/rtw/rtwreg.h
1244
(RTW_READ((regs), (reg)) & (mask))
usr/src/uts/common/io/rtw/rtwreg.h
1246
#define RTW_CLR(regs, reg, mask) \
usr/src/uts/common/io/rtw/rtwreg.h
1247
RTW_WRITE((regs), (reg), RTW_READ((regs), (reg)) & ~(mask))
usr/src/uts/common/io/rtw/rtwreg.h
1279
#define RTW_BARRIER(regs, reg0, reg1, flags)
usr/src/uts/common/io/rtw/rtwreg.h
1291
#define RTW_SYNC(regs, reg0, reg1) \
usr/src/uts/common/io/rtw/rtwreg.h
1292
RTW_BARRIER(regs, reg0, reg1, BUS_SPACE_BARRIER_SYNC)
usr/src/uts/common/io/rtw/rtwreg.h
1297
#define RTW_WBW(regs, reg0, reg1) \
usr/src/uts/common/io/rtw/rtwreg.h
1298
RTW_BARRIER(regs, reg0, reg1, BUS_SPACE_BARRIER_WRITE_BEFORE_WRITE)
usr/src/uts/common/io/rtw/rtwreg.h
1303
#define RTW_WBR(regs, reg0, reg1) \
usr/src/uts/common/io/rtw/rtwreg.h
1304
RTW_BARRIER(regs, reg0, reg1, BUS_SPACE_BARRIER_WRITE_BEFORE_READ)
usr/src/uts/common/io/rtw/rtwreg.h
1309
#define RTW_RBR(regs, reg0, reg1) \
usr/src/uts/common/io/rtw/rtwreg.h
1310
RTW_BARRIER(regs, reg0, reg1, BUS_SPACE_BARRIER_READ_BEFORE_READ)
usr/src/uts/common/io/rtw/rtwreg.h
1315
#define RTW_RBW(regs, reg0, reg1) \
usr/src/uts/common/io/rtw/rtwreg.h
1316
RTW_BARRIER(regs, reg0, reg1, BUS_SPACE_BARRIER_READ_BEFORE_WRITE)
usr/src/uts/common/io/rtw/rtwreg.h
1318
#define RTW_WBRW(regs, reg0, reg1) \
usr/src/uts/common/io/rtw/rtwreg.h
1319
RTW_BARRIER(regs, reg0, reg1, \
usr/src/uts/common/io/sata/adapters/ahci/ahci.c
590
pci_regspec_t *regs;
usr/src/uts/common/io/sata/adapters/ahci/ahci.c
702
DDI_PROP_DONTPASS, "reg", (int **)®s,
usr/src/uts/common/io/sata/adapters/ahci/ahci.c
711
if ((regs[rnumber].pci_phys_hi & PCI_REG_REG_M)
usr/src/uts/common/io/sata/adapters/ahci/ahci.c
716
ddi_prop_free(regs);
usr/src/uts/common/io/sata/adapters/nv_sata/nv_sata.c
578
pci_regspec_t *regs;
usr/src/uts/common/io/sata/adapters/nv_sata/nv_sata.c
751
"reg", (caddr_t)®s, &rlen);
usr/src/uts/common/io/sata/adapters/nv_sata/nv_sata.c
752
nvc->nvc_ctlr_num = PCI_REG_FUNC_G(regs->pci_phys_hi);
usr/src/uts/common/io/sata/adapters/nv_sata/nv_sata.c
753
kmem_free(regs, rlen);
usr/src/uts/common/io/scsi/adapters/pvscsi/pvscsi.c
831
pci_regspec_t *regs;
usr/src/uts/common/io/scsi/adapters/pvscsi/pvscsi.c
835
DDI_PROP_DONTPASS, "reg", (int **)®s,
usr/src/uts/common/io/scsi/adapters/pvscsi/pvscsi.c
845
if (PCI_REG_REG_G(regs[rn].pci_phys_hi) == offset) {
usr/src/uts/common/io/scsi/adapters/pvscsi/pvscsi.c
846
type = regs[rn].pci_phys_hi & PCI_ADDR_MASK;
usr/src/uts/common/io/scsi/adapters/pvscsi/pvscsi.c
877
ddi_prop_free(regs);
usr/src/uts/common/io/scsi/adapters/smrt/smrt_device.c
115
pci_regspec_t *regs;
usr/src/uts/common/io/scsi/adapters/smrt/smrt_device.c
124
"reg", (int **)®s, ®slen) != DDI_PROP_SUCCESS) {
usr/src/uts/common/io/scsi/adapters/smrt/smrt_device.c
130
if (smrt_locate_bar(regs, nregs, &smrt->smrt_i2o_bar) !=
usr/src/uts/common/io/scsi/adapters/smrt/smrt_device.c
148
if (smrt_locate_cfgtbl(smrt, regs, nregs, &smrt->smrt_ct_bar,
usr/src/uts/common/io/scsi/adapters/smrt/smrt_device.c
169
ddi_prop_free(regs);
usr/src/uts/common/io/scsi/adapters/smrt/smrt_device.c
26
smrt_locate_bar(pci_regspec_t *regs, unsigned nregs,
usr/src/uts/common/io/scsi/adapters/smrt/smrt_device.c
33
unsigned type = regs[i].pci_phys_hi & PCI_ADDR_MASK;
usr/src/uts/common/io/scsi/adapters/smrt/smrt_device.c
45
smrt_locate_cfgtbl(smrt_t *smrt, pci_regspec_t *regs, unsigned nregs,
usr/src/uts/common/io/scsi/adapters/smrt/smrt_device.c
75
unsigned type = regs[i].pci_phys_hi & PCI_ADDR_MASK;
usr/src/uts/common/io/scsi/adapters/smrt/smrt_device.c
76
unsigned bar = PCI_REG_REG_G(regs[i].pci_phys_hi);
usr/src/uts/common/io/sfe/sfe_util.c
5341
struct pci_phys_spec *regs;
usr/src/uts/common/io/sfe/sfe_util.c
5353
regs = NULL;
usr/src/uts/common/io/sfe/sfe_util.c
5358
"reg", (void *)®s, &len)) != DDI_PROP_SUCCESS) {
usr/src/uts/common/io/sfe/sfe_util.c
5366
ASSERT(regs != NULL && len > 0);
usr/src/uts/common/io/sfe/sfe_util.c
5373
regs[i].pci_phys_hi,
usr/src/uts/common/io/sfe/sfe_util.c
5374
regs[i].pci_phys_mid,
usr/src/uts/common/io/sfe/sfe_util.c
5375
regs[i].pci_phys_low,
usr/src/uts/common/io/sfe/sfe_util.c
5376
regs[i].pci_size_hi,
usr/src/uts/common/io/sfe/sfe_util.c
5377
regs[i].pci_size_low);
usr/src/uts/common/io/sfe/sfe_util.c
5381
if ((regs[i].pci_phys_hi & mask) == which) {
usr/src/uts/common/io/sfe/sfe_util.c
5383
ddi_prop_free(regs);
usr/src/uts/common/io/sfe/sfe_util.c
5387
ddi_prop_free(regs);
usr/src/uts/common/io/virtio/virtio_main.c
2070
pci_regspec_t *regs;
usr/src/uts/common/io/virtio/virtio_main.c
2083
DDI_PROP_DONTPASS, "reg", (int **)®s, ®s_length) !=
usr/src/uts/common/io/virtio/virtio_main.c
2091
if (PCI_REG_REG_G(regs[i].pci_phys_hi) == bar_offset) {
usr/src/uts/common/io/virtio/virtio_main.c
2097
ddi_prop_free(regs);
usr/src/uts/common/io/vr/vr.c
568
pci_regspec_t *regs;
usr/src/uts/common/io/vr/vr.c
574
0, "reg", (int **)®s, &elem) != DDI_PROP_SUCCESS) {
usr/src/uts/common/io/vr/vr.c
596
ddi_prop_free(regs);
usr/src/uts/common/io/vr/vr.c
599
bcopy(®s[n], &vrp->regset[n].reg, sizeof (pci_regspec_t));
usr/src/uts/common/io/vr/vr.c
601
ddi_prop_free(regs);
usr/src/uts/common/io/zyd/zyd_hw.c
76
uint16_t regs[2];
usr/src/uts/common/io/zyd/zyd_hw.c
78
regs[0] = LE_16(ZYD_REG32_HI(reg));
usr/src/uts/common/io/zyd/zyd_hw.c
79
regs[1] = LE_16(ZYD_REG32_LO(reg));
usr/src/uts/common/io/zyd/zyd_hw.c
81
result = zyd_usb_ioread_req(&sc->usb, regs, sizeof (regs),
usr/src/uts/common/io/zyd/zyd_hw.c
87
if (tmp[0] != regs[0] || tmp[2] != regs[1]) {
usr/src/uts/common/io/zyd/zyd_hw.c
90
LE_16(regs[0]), LE_16(regs[1]),
usr/src/uts/common/os/ksensor.c
552
int *regs, ret;
usr/src/uts/common/os/ksensor.c
582
®s, &nregs) != DDI_PROP_SUCCESS) {
usr/src/uts/common/os/ksensor.c
587
ddi_prop_free(regs);
usr/src/uts/common/os/ksensor.c
591
bus = PCI_REG_BUS_G(regs[0]);
usr/src/uts/common/os/ksensor.c
592
dev = PCI_REG_DEV_G(regs[0]);
usr/src/uts/common/os/ksensor.c
593
ddi_prop_free(regs);
usr/src/uts/common/os/panic.c
164
struct regs *panic_reg; /* regs struct from first panicsys() */
usr/src/uts/common/os/panic.c
211
panicsys(const char *format, va_list alist, struct regs *rp, int on_panic_stack)
usr/src/uts/common/pcmcia/cis/cis_handlers.c
407
cr->regs[hr] = MAKE_CONFIG_REG_ADDR(
usr/src/uts/common/pcmcia/nexus/pcmcia.c
1006
regs = mregs;
usr/src/uts/common/pcmcia/nexus/pcmcia.c
1018
tmp_reg = *regs;
usr/src/uts/common/pcmcia/nexus/pcmcia.c
1019
mp->map_obj.rp = (struct regspec *)(regs = &tmp_reg);
usr/src/uts/common/pcmcia/nexus/pcmcia.c
1020
base = regs->phys_lo;
usr/src/uts/common/pcmcia/nexus/pcmcia.c
1029
regs->phys_lo += (uint32_t)offset;
usr/src/uts/common/pcmcia/nexus/pcmcia.c
1031
if (len > regs->phys_len) {
usr/src/uts/common/pcmcia/nexus/pcmcia.c
1034
regs->phys_len = len;
usr/src/uts/common/pcmcia/nexus/pcmcia.c
1044
switch (PC_GET_REG_TYPE(regs->phys_hi)) {
usr/src/uts/common/pcmcia/nexus/pcmcia.c
1058
ret.ra_addr_lo = regs->phys_lo;
usr/src/uts/common/pcmcia/nexus/pcmcia.c
1059
ret.ra_len = regs->phys_len;
usr/src/uts/common/pcmcia/nexus/pcmcia.c
2647
pcmcia_get_mem_regs(struct pcm_regs *regs, struct pcm_device_info *info,
usr/src/uts/common/pcmcia/nexus/pcmcia.c
2687
regs[num_regs].phys_hi =
usr/src/uts/common/pcmcia/nexus/pcmcia.c
2694
regs[num_regs].phys_lo = curr_base;
usr/src/uts/common/pcmcia/nexus/pcmcia.c
2697
regs[num_regs].phys_len = len;
usr/src/uts/common/pcmcia/nexus/pcmcia.c
2716
pcmcia_get_io_regs(struct pcm_regs *regs, struct pcm_device_info *info,
usr/src/uts/common/pcmcia/nexus/pcmcia.c
2775
regs->phys_len = curr_len;
usr/src/uts/common/pcmcia/nexus/pcmcia.c
2776
regs->phys_lo = 0;
usr/src/uts/common/pcmcia/nexus/pcmcia.c
2777
regs->phys_hi =
usr/src/uts/common/pcmcia/nexus/pcmcia.c
2799
regs->phys_len = 1 << cftable.io.addr_lines;
usr/src/uts/common/pcmcia/nexus/pcmcia.c
2800
regs->phys_hi =
usr/src/uts/common/pcmcia/nexus/pcmcia.c
2808
regs->phys_lo = 0;
usr/src/uts/common/pcmcia/nexus/pcmcia.c
2810
regs++;
usr/src/uts/common/pcmcia/nexus/pcmcia.c
2827
regs->phys_len = tmp[i].phys_len;
usr/src/uts/common/pcmcia/nexus/pcmcia.c
2828
regs->phys_lo = tmp[i].phys_lo;
usr/src/uts/common/pcmcia/nexus/pcmcia.c
2829
regs->phys_hi = PC_REG_PHYS_HI(1, 0, pctype,
usr/src/uts/common/pcmcia/nexus/pcmcia.c
2832
regs++;
usr/src/uts/common/pcmcia/nexus/pcmcia.c
2850
struct pcm_regs regs[32]; /* assume worst case */
usr/src/uts/common/pcmcia/nexus/pcmcia.c
2857
regs[0].phys_hi = PC_REG_PHYS_HI(0, 0, PC_REG_TYPE_CARDBUS,
usr/src/uts/common/pcmcia/nexus/pcmcia.c
2864
regs[0].phys_hi = PC_REG_PHYS_HI(0, 0, PC_REG_TYPE_16BIT,
usr/src/uts/common/pcmcia/nexus/pcmcia.c
2870
regs[0].phys_lo = 0; /* always starts at zero */
usr/src/uts/common/pcmcia/nexus/pcmcia.c
2871
regs[0].phys_len = 0;
usr/src/uts/common/pcmcia/nexus/pcmcia.c
2879
regs[1].phys_hi = PC_REG_PHYS_HI(0, 0, PC_REG_TYPE_16BIT,
usr/src/uts/common/pcmcia/nexus/pcmcia.c
2883
regs[1].phys_lo = 0;
usr/src/uts/common/pcmcia/nexus/pcmcia.c
2884
regs[1].phys_len = PCM_MAX_R2_MEM;
usr/src/uts/common/pcmcia/nexus/pcmcia.c
2891
num_regs += pcmcia_get_mem_regs(®s[num_regs], info,
usr/src/uts/common/pcmcia/nexus/pcmcia.c
2893
num_regs += pcmcia_get_mem_regs(®s[num_regs], info,
usr/src/uts/common/pcmcia/nexus/pcmcia.c
2897
num_regs += pcmcia_get_io_regs(®s[num_regs], info,
usr/src/uts/common/pcmcia/nexus/pcmcia.c
2905
bcopy(regs, ppd->ppd_reg, len);
usr/src/uts/common/pcmcia/nexus/pcmcia.c
962
struct pcm_regs *regs, *mregs = NULL, tmp_reg;
usr/src/uts/common/pcmcia/nexus/pcmcia.c
974
regs = (struct pcm_regs *)mp->map_obj.rp;
usr/src/uts/common/pcmcia/nexus/pcmcia.c
980
if (!PC_REG_RELOC(regs->phys_hi))
usr/src/uts/common/pcmcia/nexus/pcmcia.c
985
regs = (struct pcm_regs *)
usr/src/uts/common/pcmcia/nexus/pcmcia.c
990
if (regs == NULL)
usr/src/uts/common/pcmcia/sys/cis_handlers.h
171
uint32_t regs[CISTPL_CONFIG_MAX_CONFIG_REGS]; /* reg offsets */
usr/src/uts/common/sys/core.h
59
struct regs c_regs; /* General purpose registers */
usr/src/uts/common/sys/dtrace.h
2266
struct regs;
usr/src/uts/common/sys/dtrace.h
2268
extern int (*dtrace_pid_probe_ptr)(struct regs *);
usr/src/uts/common/sys/dtrace.h
2269
extern int (*dtrace_return_probe_ptr)(struct regs *);
usr/src/uts/common/sys/dtrace_impl.h
1264
extern ulong_t dtrace_getreg(struct regs *, uint_t);
usr/src/uts/common/sys/dtrace_impl.h
1265
extern void dtrace_setreg(struct regs *, uint_t, ulong_t);
usr/src/uts/common/sys/fasttrap_impl.h
180
extern int fasttrap_pid_probe(struct regs *);
usr/src/uts/common/sys/fasttrap_impl.h
181
extern int fasttrap_return_probe(struct regs *);
usr/src/uts/common/sys/panic.h
133
struct regs;
usr/src/uts/common/sys/panic.h
150
extern struct regs *panic_reg;
usr/src/uts/common/sys/panic.h
157
extern void panic_saveregs(panic_data_t *, struct regs *);
usr/src/uts/common/sys/prsystm.h
110
extern int pr_watch_emul(struct regs *, caddr_t, enum seg_rw);
usr/src/uts/common/sys/prsystm.h
62
struct regs;
usr/src/uts/i86pc/cpu/amd_opteron/ao.h
160
struct regs;
usr/src/uts/i86pc/cpu/generic_cpu/gcpu.h
207
struct regs;
usr/src/uts/i86pc/cpu/generic_cpu/gcpu.h
223
extern uint64_t gcpu_mca_trap(cmi_hdl_t, struct regs *);
usr/src/uts/i86pc/cpu/generic_cpu/gcpu.h
238
extern void gcpu_mca_logout(cmi_hdl_t, struct regs *, uint64_t,
usr/src/uts/i86pc/cpu/generic_cpu/gcpu_mca.c
1454
gcpu_mca_process(cmi_hdl_t hdl, struct regs *rp, int nerr, gcpu_data_t *gcpu,
usr/src/uts/i86pc/cpu/generic_cpu/gcpu_mca.c
1785
gcpu_mca_logout(cmi_hdl_t hdl, struct regs *rp, uint64_t bankmask,
usr/src/uts/i86pc/cpu/generic_cpu/gcpu_mca.c
2002
gcpu_mca_trap(cmi_hdl_t hdl, struct regs *rp)
usr/src/uts/i86pc/cpu/generic_cpu/gcpu_mca.c
2081
gcpu_msrinject(cmi_hdl_t hdl, cmi_mca_regs_t *regs, uint_t nregs,
usr/src/uts/i86pc/cpu/generic_cpu/gcpu_mca.c
2087
uint_t msr = regs[i].cmr_msrnum;
usr/src/uts/i86pc/cpu/generic_cpu/gcpu_mca.c
2088
uint64_t val = regs[i].cmr_msrval;
usr/src/uts/i86pc/io/apix/apix.c
219
extern void apic_do_interrupt(struct regs *rp, trap_trace_rec_t *ttp);
usr/src/uts/i86pc/io/apix/apix.c
346
extern void (*do_interrupt_common)(struct regs *, trap_trace_rec_t *);
usr/src/uts/i86pc/io/apix/apix_intr.c
392
apix_do_softint(struct regs *regs)
usr/src/uts/i86pc/io/apix/apix_intr.c
407
(caddr_t)regs);
usr/src/uts/i86pc/io/apix/apix_intr.c
417
struct regs *rp)
usr/src/uts/i86pc/io/apix/apix_intr.c
587
apix_do_pending_hilevel(struct cpu *cpu, struct regs *rp)
usr/src/uts/i86pc/io/apix/apix_intr.c
797
apix_do_pending_hardint(struct cpu *cpu, struct regs *rp)
usr/src/uts/i86pc/io/apix/apix_intr.c
896
apix_do_interrupt(struct regs *rp, trap_trace_rec_t *ttp)
usr/src/uts/i86pc/io/gfx_private/gfxp_fb.h
60
struct vgaregmap regs;
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
1091
vga_set_seq(&console->vga.regs, 0x00, 0x01);
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
1096
vga_set_seq(&console->vga.regs, 0x02, 0x04);
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
1101
vga_set_seq(&console->vga.regs, 0x04, 0x07);
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
1103
vga_set_seq(&console->vga.regs, 0x00, 0x03);
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
1108
vga_set_grc(&console->vga.regs, 0x04, 0x02);
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
1113
vga_set_grc(&console->vga.regs, 0x05, 0x00);
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
1118
vga_set_grc(&console->vga.regs, 0x06, 0x00);
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
1137
vga_set_seq(&console->vga.regs, 0x00, 0x01);
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
1139
vga_set_seq(&console->vga.regs, 0x02, 0x03);
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
1144
vga_set_seq(&console->vga.regs, 0x04, 0x03);
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
1148
vga_set_seq(&console->vga.regs, 0x03, fsreg[s]);
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
1150
vga_set_seq(&console->vga.regs, 0x00, 0x03);
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
1155
vga_set_grc(&console->vga.regs, 0x04, 0x00);
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
1157
vga_set_grc(&console->vga.regs, 0x05, 0x10);
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
1162
vga_set_grc(&console->vga.regs, 0x06, 0x0e);
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
1164
vga_set_atr(&console->vga.regs, 0x12, 0x0f);
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
1176
vga_get_atr(&console->vga.regs, i);
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
1179
vga_get_cmap(&console->vga.regs, i,
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
1193
vga_set_atr(&console->vga.regs, i,
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
1197
vga_put_cmap(&console->vga.regs, i,
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
1328
regss->addr = softc->console->vga.regs.addr;
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
1329
regss->handle = softc->console->vga.regs.handle;
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
1330
regss->mapped = softc->console->vga.regs.mapped;
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
209
(caddr_t *)&vga->regs.addr, reg_offset, VGA_REG_SIZE,
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
210
&dev_attr, &vga->regs.handle);
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
213
vga->regs.mapped = B_TRUE;
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
224
if (ddi_get8(vga->regs.handle,
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
225
vga->regs.addr + VGA_MISC_R) & VGA_MISC_IOA_SEL)
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
274
if (softc->console->vga.regs.mapped)
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
275
ddi_regs_map_free(&softc->console->vga.regs.handle);
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
799
msl = vga_get_crtc(&console->vga.regs, VGA_CRTC_MAX_S_LN) & 0x1f;
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
800
s = vga_get_crtc(&console->vga.regs, VGA_CRTC_CSSL) & 0xc0;
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
804
vga_set_crtc(&console->vga.regs, VGA_CRTC_CSSL, s);
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
805
vga_set_crtc(&console->vga.regs, VGA_CRTC_CESL, msl);
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
818
msl = vga_get_crtc(&console->vga.regs, VGA_CRTC_MAX_S_LN) & 0x1f;
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
819
s = vga_get_crtc(&console->vga.regs, VGA_CRTC_CSSL) & 0xc0;
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
823
vga_set_crtc(&console->vga.regs, VGA_CRTC_CLAH, addr >> 8);
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
824
vga_set_crtc(&console->vga.regs, VGA_CRTC_CLAL, addr & 0xff);
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
827
vga_set_crtc(&console->vga.regs, VGA_CRTC_CSSL, s);
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
828
vga_set_crtc(&console->vga.regs, VGA_CRTC_CESL, msl);
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
838
addr = (vga_get_crtc(&console->vga.regs, VGA_CRTC_CLAH) << 8) +
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
839
vga_get_crtc(&console->vga.regs, VGA_CRTC_CLAL);
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
850
struct vgaregmap *regs;
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
853
regs = &console->vga.regs;
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
856
vga_reg->vga_misc = vga_get_reg(regs, VGA_MISC_R);
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
860
vga_reg->vga_crtc[i] = vga_get_crtc(regs, i);
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
865
vga_reg->vga_atr[i] = vga_get_atr(regs, i);
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
870
vga_reg->vga_grc[i] = vga_get_grc(regs, i);
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
875
vga_reg->vga_seq[i] = vga_get_seq(regs, i);
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
888
struct vgaregmap *regs;
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
891
regs = &console->vga.regs;
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
900
vga_set_reg(regs, VGA_MISC_W, VGA_MISC_HSP | VGA_MISC_PGSL |
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
904
vga_set_seq(regs, VGA_SEQ_RST_SYN,
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
905
(vga_get_seq(regs, VGA_SEQ_RST_SYN) &
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
908
vga_set_seq(regs, i, VGA_SEQ_TEXT[i]);
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
910
vga_set_seq(regs, VGA_SEQ_RST_SYN,
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
911
(vga_get_seq(regs, VGA_SEQ_RST_SYN) |
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
916
vga_set_crtc(regs, VGA_CRTC_VRE,
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
919
vga_set_crtc(regs, i, VGA_CRTC_TEXT[i]);
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
924
vga_set_grc(regs, i, VGA_GRC_TEXT[i]);
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
929
vga_set_atr(regs, i, VGA_ATR_TEXT[i]);
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
934
vga_put_cmap(regs, i,
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
940
vga_put_cmap(regs, i, 0, 0, 0);
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
953
atr_mode = vga_get_atr(&console->vga.regs, VGA_ATR_MODE);
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
956
atr_mode = vga_get_atr(&console->vga.regs, VGA_ATR_MODE);
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
959
vga_set_atr(&console->vga.regs, VGA_ATR_MODE, atr_mode);
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
961
vga_set_atr(&console->vga.regs, VGA_ATR_BDR_CLR,
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
962
vga_get_atr(&console->vga.regs, pc_brt_white));
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
964
vga_set_atr(&console->vga.regs, VGA_ATR_BDR_CLR,
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
965
vga_get_atr(&console->vga.regs, pc_black));
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
988
vga_set_atr(&softc->console->vga.regs, VGA_ATR_BDR_CLR,
usr/src/uts/i86pc/io/gfx_private/gfxp_vgatext.c
989
vga_get_atr(&softc->console->vga.regs, pc_black));
usr/src/uts/i86pc/io/pci/pci_tools.c
1034
int *regs, ret;
usr/src/uts/i86pc/io/pci/pci_tools.c
1044
"reg", ®s, &nreg) != DDI_PROP_SUCCESS) {
usr/src/uts/i86pc/io/pci/pci_tools.c
1049
ddi_prop_free(regs);
usr/src/uts/i86pc/io/pci/pci_tools.c
1054
uint32_t bdf = (uint32_t)regs[0];
usr/src/uts/i86pc/io/pci/pci_tools.c
1058
ddi_prop_free(regs);
usr/src/uts/i86pc/io/pci/pci_tools.c
1064
const pci_regspec_t *rsp = (pci_regspec_t *)regs;
usr/src/uts/i86pc/io/pci/pci_tools.c
1072
ddi_prop_free(regs);
usr/src/uts/i86pc/io/pci/pci_tools.c
1076
ddi_prop_free(regs);
usr/src/uts/i86pc/io/pciex/npe.c
1041
regs = pcie_get_aer_uce_mask() | npe_aer_uce_mask;
usr/src/uts/i86pc/io/pciex/npe.c
1042
pcie_set_aer_uce_mask(regs);
usr/src/uts/i86pc/io/pciex/npe.c
1043
regs = pcie_get_aer_ce_mask() | npe_aer_ce_mask;
usr/src/uts/i86pc/io/pciex/npe.c
1044
pcie_set_aer_ce_mask(regs);
usr/src/uts/i86pc/io/pciex/npe.c
1045
regs = pcie_get_aer_suce_mask() | npe_aer_suce_mask;
usr/src/uts/i86pc/io/pciex/npe.c
1046
pcie_set_aer_suce_mask(regs);
usr/src/uts/i86pc/io/pciex/npe.c
965
uint32_t regs;
usr/src/uts/i86pc/io/pciex/npe_misc.c
105
uint32_t regs;
usr/src/uts/i86pc/io/pciex/npe_misc.c
111
regs = pcie_get_aer_uce_mask() | npe_aer_uce_mask |
usr/src/uts/i86pc/io/pciex/npe_misc.c
113
pcie_set_aer_uce_mask(regs);
usr/src/uts/i86pc/io/pciex/npe_misc.c
126
uint32_t regs;
usr/src/uts/i86pc/io/pciex/npe_misc.c
143
regs = pcie_get_aer_uce_mask() | PCIE_AER_UCE_ECRC;
usr/src/uts/i86pc/io/pciex/npe_misc.c
144
pcie_set_aer_uce_mask(regs);
usr/src/uts/i86pc/os/cmi.c
601
cmi_mce_response(struct regs *rp, uint64_t disp)
usr/src/uts/i86pc/os/cmi.c
679
cmi_mca_trap(struct regs *rp)
usr/src/uts/i86pc/os/cmi.c
927
cmi_hdl_msrinject(cmi_hdl_t hdl, cmi_mca_regs_t *regs, uint_t nregs,
usr/src/uts/i86pc/os/cmi.c
937
rc = CMI_OPS(cmi)->cmi_msrinject(hdl, regs, nregs, force);
usr/src/uts/i86pc/os/cmi_hw.c
1851
cmi_hdl_msrinterpose(cmi_hdl_t ophdl, cmi_mca_regs_t *regs, uint_t nregs)
usr/src/uts/i86pc/os/cmi_hw.c
1861
for (i = 0; i < nregs; i++, regs++)
usr/src/uts/i86pc/os/cmi_hw.c
1862
HDLOPS(hdl)->cmio_msrinterpose(hdl, regs->cmr_msrnum,
usr/src/uts/i86pc/os/cmi_hw.c
1863
regs->cmr_msrval);
usr/src/uts/i86pc/os/cmi_hw.c
1870
cmi_hdl_msrforward(cmi_hdl_t ophdl, cmi_mca_regs_t *regs, uint_t nregs)
usr/src/uts/i86pc/os/cmi_hw.c
1876
for (i = 0; i < nregs; i++, regs++)
usr/src/uts/i86pc/os/cmi_hw.c
1877
msri_addent(hdl, regs->cmr_msrnum, regs->cmr_msrval);
usr/src/uts/i86pc/os/cpupm/cpu_acpi.c
100
regs[0].cr_addrspace_id = ACPI_ADR_SPACE_FIXED_HARDWARE;
usr/src/uts/i86pc/os/cpupm/cpu_acpi.c
101
regs[1].cr_addrspace_id = ACPI_ADR_SPACE_FIXED_HARDWARE;
usr/src/uts/i86pc/os/cpupm/cpu_acpi.c
165
regs[i].cr_addrspace_id = greg->AddressSpaceId;
usr/src/uts/i86pc/os/cpupm/cpu_acpi.c
166
regs[i].cr_width = greg->BitWidth;
usr/src/uts/i86pc/os/cpupm/cpu_acpi.c
167
regs[i].cr_offset = greg->BitOffset;
usr/src/uts/i86pc/os/cpupm/cpu_acpi.c
168
regs[i].cr_asize = greg->AccessSize;
usr/src/uts/i86pc/os/cpupm/cpu_acpi.c
169
regs[i].cr_address = greg->Address;
usr/src/uts/i86pc/os/cpupm/cpu_acpi.c
78
cpu_acpi_ctrl_regs_t *regs)
usr/src/uts/i86pc/os/dtrace_subr.c
160
int (*dtrace_pid_probe_ptr)(struct regs *);
usr/src/uts/i86pc/os/dtrace_subr.c
161
int (*dtrace_return_probe_ptr)(struct regs *);
usr/src/uts/i86pc/os/dtrace_subr.c
164
dtrace_user_probe(struct regs *rp, caddr_t addr, processorid_t cpuid)
usr/src/uts/i86pc/os/dtrace_subr.c
168
extern void trap(struct regs *, caddr_t, processorid_t);
usr/src/uts/i86pc/os/dtrace_subr.c
284
struct regs *rp = lwptoregs(ttolwp(t));
usr/src/uts/i86pc/os/dtrace_subr.c
309
struct regs *rp = lwptoregs(ttolwp(t));
usr/src/uts/i86pc/os/instr_size.c
127
instr_size(struct regs *rp, caddr_t *addrp, enum seg_rw rw)
usr/src/uts/i86pc/os/intr.c
1335
dosoftint(struct regs *regs)
usr/src/uts/i86pc/os/intr.c
1343
newsp = dosoftint_prolog(cpu, (caddr_t)regs,
usr/src/uts/i86pc/os/intr.c
1361
do_interrupt(struct regs *rp, trap_trace_rec_t *ttp)
usr/src/uts/i86pc/os/intr.c
1441
sys_rtt_common(struct regs *rp)
usr/src/uts/i86pc/os/intr.c
511
void do_interrupt(struct regs *rp, trap_trace_rec_t *ttp);
usr/src/uts/i86pc/os/intr.c
513
void (*do_interrupt_common)(struct regs *, trap_trace_rec_t *) = do_interrupt;
usr/src/uts/i86pc/os/intr.c
539
hilevel_intr_prolog(struct cpu *cpu, uint_t pil, uint_t oldpil, struct regs *rp)
usr/src/uts/i86pc/os/machdep.c
1327
linear_pc(struct regs *rp, proc_t *p, caddr_t *linearp)
usr/src/uts/i86pc/os/machdep.c
1375
dtrace_linear_pc(struct regs *rp, proc_t *p, caddr_t *linearp)
usr/src/uts/i86pc/os/machdep.c
552
nmfunc1(int arg, struct regs *rp)
usr/src/uts/i86pc/os/machdep.c
875
stk -= SA(sizeof (struct regs) + SA(MINFRAME));
usr/src/uts/i86pc/os/mlsetup.c
109
mlsetup(struct regs *rp)
usr/src/uts/i86pc/os/pci_bios.c
100
regs.eax.word.ax = (PCI_FUNCTION_ID << 8) | PCI_GET_IRQ_ROUTING;
usr/src/uts/i86pc/os/pci_bios.c
102
regs.ds = 0xf000;
usr/src/uts/i86pc/os/pci_bios.c
103
regs.es = FP_SEG((uint_t)(uintptr_t)hdrp);
usr/src/uts/i86pc/os/pci_bios.c
104
regs.edi.word.di = FP_OFF((uint_t)(uintptr_t)hdrp);
usr/src/uts/i86pc/os/pci_bios.c
106
BOP_DOINT(bootops, 0x1a, ®s);
usr/src/uts/i86pc/os/pci_bios.c
111
if ((regs.eflags & PS_C) != 0) {
usr/src/uts/i86pc/os/pci_bios.c
72
struct bop_regs regs;
usr/src/uts/i86pc/os/pci_bios.c
99
bzero(®s, sizeof (regs));
usr/src/uts/i86pc/os/pci_cfgspace.c
261
struct bop_regs regs;
usr/src/uts/i86pc/os/pci_cfgspace.c
278
bzero(®s, sizeof (regs));
usr/src/uts/i86pc/os/pci_cfgspace.c
279
regs.eax.word.ax = (PCI_FUNCTION_ID << 8) | PCI_BIOS_PRESENT;
usr/src/uts/i86pc/os/pci_cfgspace.c
281
BOP_DOINT(bootops, 0x1a, ®s);
usr/src/uts/i86pc/os/pci_cfgspace.c
282
carryflag = regs.eflags & PS_C;
usr/src/uts/i86pc/os/pci_cfgspace.c
283
ax = regs.eax.word.ax;
usr/src/uts/i86pc/os/pci_cfgspace.c
284
dx = regs.edx.word.dx;
usr/src/uts/i86pc/os/pci_cfgspace.c
298
pci_bios_vers = regs.ebx.word.bx;
usr/src/uts/i86pc/os/trap.c
1590
showregs(uint_t type, struct regs *rp, caddr_t addr)
usr/src/uts/i86pc/os/trap.c
1647
dumpregs(struct regs *rp)
usr/src/uts/i86pc/os/trap.c
1750
kern_gpfault(struct regs *rp)
usr/src/uts/i86pc/os/trap.c
1755
struct regs tmpregs, *trp = NULL;
usr/src/uts/i86pc/os/trap.c
1798
bcopy(rp, trp, offsetof(struct regs, r_pc));
usr/src/uts/i86pc/os/trap.c
185
static void dumpregs(struct regs *);
usr/src/uts/i86pc/os/trap.c
186
static void showregs(uint_t, struct regs *, caddr_t);
usr/src/uts/i86pc/os/trap.c
187
static int kern_gpfault(struct regs *);
usr/src/uts/i86pc/os/trap.c
191
die(uint_t type, struct regs *rp, caddr_t addr, processorid_t cpuid)
usr/src/uts/i86pc/os/trap.c
302
ldt_rewrite_syscall(struct regs *rp, proc_t *p, int syscall_insn)
usr/src/uts/i86pc/os/trap.c
402
emulate_lsahf(struct regs *rp, uchar_t instr)
usr/src/uts/i86pc/os/trap.c
462
trap(struct regs *rp, caddr_t addr, processorid_t cpuid)
usr/src/uts/i86pc/os/tscc_vmware.c
46
struct cpuid_regs regs = { 0 };
usr/src/uts/i86pc/os/tscc_vmware.c
58
regs.cp_eax = CPUID_VM_LEAF_MAX;
usr/src/uts/i86pc/os/tscc_vmware.c
59
__cpuid_insn(®s);
usr/src/uts/i86pc/os/tscc_vmware.c
60
if (regs.cp_eax < CPUID_VM_LEAF_FREQ) {
usr/src/uts/i86pc/os/tscc_vmware.c
64
regs.cp_eax = CPUID_VM_LEAF_FREQ;
usr/src/uts/i86pc/os/tscc_vmware.c
65
__cpuid_insn(®s);
usr/src/uts/i86pc/os/tscc_vmware.c
71
if (regs.cp_eax == 0) {
usr/src/uts/i86pc/os/tscc_vmware.c
76
*freqp = (uint64_t)regs.cp_eax * 1000;
usr/src/uts/i86pc/sys/apix.h
251
extern void apix_do_interrupt(struct regs *rp, trap_trace_rec_t *ttp);
usr/src/uts/i86pc/sys/cpu_module_impl.h
62
uint64_t (*cmi_mca_trap)(cmi_hdl_t, struct regs *);
usr/src/uts/i86pc/sys/cpu_module_impl.h
75
extern int cmi_mce_response(struct regs *, uint64_t);
usr/src/uts/i86pc/sys/machsystm.h
124
extern void trap(struct regs *, caddr_t, processorid_t);
usr/src/uts/i86pc/sys/machsystm.h
126
extern void do_interrupt(struct regs *, trap_trace_rec_t *);
usr/src/uts/i86pc/sys/machsystm.h
132
extern void (*do_interrupt_common)(struct regs *, trap_trace_rec_t *);
usr/src/uts/i86pc/sys/machsystm.h
178
extern int linear_pc(struct regs *rp, proc_t *p, caddr_t *linearp);
usr/src/uts/i86pc/sys/machsystm.h
179
extern int dtrace_linear_pc(struct regs *rp, proc_t *p, caddr_t *linearp);
usr/src/uts/i86pc/sys/machsystm.h
98
struct regs *trap_regs;
usr/src/uts/i86xpv/os/evtchn.c
1253
xen_callback_handler(struct regs *rp, trap_trace_rec_t *ttp)
usr/src/uts/i86xpv/os/evtchn.c
1263
extern void dosoftint(struct regs *);
usr/src/uts/i86xpv/os/xpv_panic.c
470
xpv_die(struct regs *rp)
usr/src/uts/i86xpv/os/xpv_panic.c
645
xpv_panicsys(struct regs *rp, char *fmt, ...)
usr/src/uts/i86xpv/os/xpv_panic.c
647
extern void panicsys(const char *, va_list, struct regs *, int);
usr/src/uts/i86xpv/os/xpv_panic.c
774
xpv_panicsys((struct regs *)pip->pi_regs, pip->pi_panicstr);
usr/src/uts/intel/amd64/sys/privmregs.h
52
struct regs pm_gregs;
usr/src/uts/intel/amd64/sys/privregs.h
116
#define lwptoregs(lwp) ((struct regs *)((lwp)->lwp_regs))
usr/src/uts/intel/dtrace/dtrace_isa.c
218
struct regs *rp;
usr/src/uts/intel/dtrace/dtrace_isa.c
274
struct regs *rp;
usr/src/uts/intel/dtrace/dtrace_isa.c
306
struct regs *rp;
usr/src/uts/intel/dtrace/dtrace_isa.c
444
struct regs *rp = (struct regs *)((uintptr_t)&fp[1] +
usr/src/uts/intel/dtrace/dtrace_isa.c
558
dtrace_getreg(struct regs *rp, uint_t reg)
usr/src/uts/intel/dtrace/dtrace_isa.c
632
dtrace_setreg(struct regs *rp, uint_t reg, ulong_t val)
usr/src/uts/intel/dtrace/fasttrap_isa.c
1583
fasttrap_return_probe(struct regs *rp)
usr/src/uts/intel/dtrace/fasttrap_isa.c
1634
fasttrap_getreg(struct regs *rp, uint_t reg)
usr/src/uts/intel/dtrace/fasttrap_isa.c
183
static ulong_t fasttrap_getreg(struct regs *, uint_t);
usr/src/uts/intel/dtrace/fasttrap_isa.c
186
fasttrap_anarg(struct regs *rp, int function_entry, int argno)
usr/src/uts/intel/dtrace/fasttrap_isa.c
637
fasttrap_return_common(struct regs *rp, uintptr_t pc, pid_t pid,
usr/src/uts/intel/dtrace/fasttrap_isa.c
703
fasttrap_usdt_args64(fasttrap_probe_t *probe, struct regs *rp, int argc,
usr/src/uts/intel/dtrace/fasttrap_isa.c
724
fasttrap_usdt_args32(fasttrap_probe_t *probe, struct regs *rp, int argc,
usr/src/uts/intel/dtrace/fasttrap_isa.c
742
fasttrap_do_seg(fasttrap_tracepoint_t *tp, struct regs *rp, uintptr_t *addr)
usr/src/uts/intel/dtrace/fasttrap_isa.c
855
fasttrap_pid_probe(struct regs *rp)
usr/src/uts/intel/dtrace/sdt.c
333
struct regs *rp = (struct regs *)((uintptr_t)&fp[1] +
usr/src/uts/intel/fs/proc/prmachdep.c
126
struct regs *rp = lwptoregs(lwp);
usr/src/uts/intel/fs/proc/prmachdep.c
173
struct regs *r = lwptoregs(lwp);
usr/src/uts/intel/fs/proc/prmachdep.c
521
struct regs *r = lwptoregs(lwp);
usr/src/uts/intel/fs/proc/prmachdep.c
600
struct regs *r = lwptoregs(lwp);
usr/src/uts/intel/fs/proc/prmachdep.c
657
pr_watch_emul(struct regs *rp, caddr_t addr, enum seg_rw rw)
usr/src/uts/intel/ia32/sys/privmregs.h
52
struct regs pm_gregs;
usr/src/uts/intel/ia32/sys/privregs.h
90
#define lwptoregs(lwp) ((struct regs *)((lwp)->lwp_regs))
usr/src/uts/intel/io/amdnbtemp/amdnbtemp.c
195
int inst, *regs, ret;
usr/src/uts/intel/io/amdnbtemp/amdnbtemp.c
241
®s, &nregs) != DDI_PROP_SUCCESS) {
usr/src/uts/intel/io/amdnbtemp/amdnbtemp.c
248
ddi_prop_free(regs);
usr/src/uts/intel/io/amdnbtemp/amdnbtemp.c
252
at->at_bus = PCI_REG_BUS_G(regs[0]);
usr/src/uts/intel/io/amdnbtemp/amdnbtemp.c
253
at->at_dev = PCI_REG_DEV_G(regs[0]);
usr/src/uts/intel/io/amdnbtemp/amdnbtemp.c
254
at->at_func = PCI_REG_DEV_G(regs[0]);
usr/src/uts/intel/io/amdnbtemp/amdnbtemp.c
255
ddi_prop_free(regs);
usr/src/uts/intel/io/amdzen/amdzen.c
2118
int *regs;
usr/src/uts/intel/io/amdzen/amdzen.c
2157
"reg", ®s, &nregs) != DDI_PROP_SUCCESS) {
usr/src/uts/intel/io/amdzen/amdzen.c
2162
ddi_prop_free(regs);
usr/src/uts/intel/io/amdzen/amdzen.c
2166
if (PCI_REG_BUS_G(regs[0]) == AMDZEN_DF_BUSNO &&
usr/src/uts/intel/io/amdzen/amdzen.c
2167
PCI_REG_DEV_G(regs[0]) >= AMDZEN_DF_FIRST_DEVICE) {
usr/src/uts/intel/io/amdzen/amdzen.c
2171
ddi_prop_free(regs);
usr/src/uts/intel/io/amdzen/amdzen.c
2227
int *regs, reg;
usr/src/uts/intel/io/amdzen/amdzen.c
2267
"reg", ®s, &nregs) != DDI_PROP_SUCCESS) {
usr/src/uts/intel/io/amdzen/amdzen.c
2273
ddi_prop_free(regs);
usr/src/uts/intel/io/amdzen/amdzen.c
2277
reg = *regs;
usr/src/uts/intel/io/amdzen/amdzen.c
2278
ddi_prop_free(regs);
usr/src/uts/intel/io/imc/imc.c
2298
int *regs;
usr/src/uts/intel/io/imc/imc.c
2331
"reg", ®s, &nregs) != DDI_PROP_SUCCESS) {
usr/src/uts/intel/io/imc/imc.c
2336
ddi_prop_free(regs);
usr/src/uts/intel/io/imc/imc.c
2344
imc_stub_table[i].imcs_pcidev == PCI_REG_DEV_G(regs[0]) &&
usr/src/uts/intel/io/imc/imc.c
2345
imc_stub_table[i].imcs_pcifunc == PCI_REG_FUNC_G(regs[0])) {
usr/src/uts/intel/io/imc/imc.c
2350
ddi_prop_free(regs);
usr/src/uts/intel/io/imc/imc.c
2463
int did, vid, *regs;
usr/src/uts/intel/io/imc/imc.c
2505
"reg", ®s, &nregs) != DDI_PROP_SUCCESS) {
usr/src/uts/intel/io/imc/imc.c
2510
ddi_prop_free(regs);
usr/src/uts/intel/io/imc/imc.c
2520
imc_stub_table[i].imcs_pcidev == PCI_REG_DEV_G(regs[0]) &&
usr/src/uts/intel/io/imc/imc.c
2521
imc_stub_table[i].imcs_pcifunc == PCI_REG_FUNC_G(regs[0])) {
usr/src/uts/intel/io/imc/imc.c
2528
ddi_prop_free(regs);
usr/src/uts/intel/io/imc/imc.c
2540
ddi_prop_free(regs);
usr/src/uts/intel/io/imc/imc.c
2554
stub->istub_bus = PCI_REG_BUS_G(regs[0]);
usr/src/uts/intel/io/imc/imc.c
2555
stub->istub_dev = PCI_REG_DEV_G(regs[0]);
usr/src/uts/intel/io/imc/imc.c
2556
stub->istub_func = PCI_REG_FUNC_G(regs[0]);
usr/src/uts/intel/io/imc/imc.c
2557
ddi_prop_free(regs);
usr/src/uts/intel/io/mc-amd/mcamd_subr.c
359
struct nt_offmap regs[] = {
usr/src/uts/intel/io/mc-amd/mcamd_subr.c
367
found = findoffset(hdl, node, ®s[0], code, &offset);
usr/src/uts/intel/io/pci/pci_boot.c
2506
ushort_t offset, pci_regspec_t *regs, pci_regspec_t *assigned,
usr/src/uts/intel/io/pci/pci_boot.c
2569
regs->pci_phys_hi = PCI_ADDR_IO | devloc;
usr/src/uts/intel/io/pci/pci_boot.c
2571
regs->pci_phys_hi |= PCI_RELOCAT_B;
usr/src/uts/intel/io/pci/pci_boot.c
2572
regs->pci_phys_low = base & PCI_BASE_IO_ADDR_M;
usr/src/uts/intel/io/pci/pci_boot.c
2574
regs->pci_phys_hi |= offset;
usr/src/uts/intel/io/pci/pci_boot.c
2575
regs->pci_phys_low = 0;
usr/src/uts/intel/io/pci/pci_boot.c
2577
assigned->pci_phys_hi = PCI_RELOCAT_B | regs->pci_phys_hi;
usr/src/uts/intel/io/pci/pci_boot.c
2578
regs->pci_size_low = assigned->pci_size_low = len;
usr/src/uts/intel/io/pci/pci_boot.c
2684
regs->pci_size_low = assigned->pci_size_low = len & 0xffffffff;
usr/src/uts/intel/io/pci/pci_boot.c
2685
regs->pci_size_hi = assigned->pci_size_hi = len >> 32;
usr/src/uts/intel/io/pci/pci_boot.c
2711
regs->pci_phys_hi = assigned->pci_phys_hi = phys_hi;
usr/src/uts/intel/io/pci/pci_boot.c
2894
pci_regspec_t regs[16] = {{0}};
usr/src/uts/intel/io/pci/pci_boot.c
2907
regs[0].pci_phys_hi = devloc;
usr/src/uts/intel/io/pci/pci_boot.c
2938
®s[nreg], &assigned[nasgn], &bar_sz, pciide);
usr/src/uts/intel/io/pci/pci_boot.c
2981
regs[nreg].pci_phys_hi = (PCI_ADDR_MEM32 | devloc) + offset;
usr/src/uts/intel/io/pci/pci_boot.c
2987
regs[nreg].pci_size_low = assigned[nasgn].pci_size_low = len;
usr/src/uts/intel/io/pci/pci_boot.c
3006
regs[nreg].pci_phys_hi = assigned[nasgn].pci_phys_hi =
usr/src/uts/intel/io/pci/pci_boot.c
3008
regs[nreg].pci_phys_low = assigned[nasgn].pci_phys_low = 0x3b0;
usr/src/uts/intel/io/pci/pci_boot.c
3009
regs[nreg].pci_size_low = assigned[nasgn].pci_size_low = 0xc;
usr/src/uts/intel/io/pci/pci_boot.c
3016
regs[nreg].pci_phys_hi = assigned[nasgn].pci_phys_hi =
usr/src/uts/intel/io/pci/pci_boot.c
3018
regs[nreg].pci_phys_low = assigned[nasgn].pci_phys_low = 0x3c0;
usr/src/uts/intel/io/pci/pci_boot.c
3019
regs[nreg].pci_size_low = assigned[nasgn].pci_size_low = 0x20;
usr/src/uts/intel/io/pci/pci_boot.c
3026
regs[nreg].pci_phys_hi = assigned[nasgn].pci_phys_hi =
usr/src/uts/intel/io/pci/pci_boot.c
3028
regs[nreg].pci_phys_low =
usr/src/uts/intel/io/pci/pci_boot.c
3030
regs[nreg].pci_size_low =
usr/src/uts/intel/io/pci/pci_boot.c
3046
regs[nreg].pci_phys_hi = assigned[nasgn].pci_phys_hi =
usr/src/uts/intel/io/pci/pci_boot.c
3048
regs[nreg].pci_phys_low = assigned[nasgn].pci_phys_low = 0x2e8;
usr/src/uts/intel/io/pci/pci_boot.c
3049
regs[nreg].pci_size_low = assigned[nasgn].pci_size_low = 0x1;
usr/src/uts/intel/io/pci/pci_boot.c
3056
regs[nreg].pci_phys_hi = assigned[nasgn].pci_phys_hi =
usr/src/uts/intel/io/pci/pci_boot.c
3058
regs[nreg].pci_phys_low = assigned[nasgn].pci_phys_low = 0x2ea;
usr/src/uts/intel/io/pci/pci_boot.c
3059
regs[nreg].pci_size_low = assigned[nasgn].pci_size_low = 0x6;
usr/src/uts/intel/io/pci/pci_boot.c
3070
(int *)regs, nreg * sizeof (pci_regspec_t) / sizeof (int));
usr/src/uts/intel/io/pciex/pcie_nvidia.c
203
pci_regspec_t regs[2] = {{0}};
usr/src/uts/intel/io/pciex/pcie_nvidia.c
207
regs[0].pci_phys_hi = devloc;
usr/src/uts/intel/io/pciex/pcie_nvidia.c
212
regs[0].pci_size_low = assigned[0].pci_size_low = PCI_CONF_HDR_SIZE;
usr/src/uts/intel/io/pciex/pcie_nvidia.c
213
assigned[0].pci_phys_hi = regs[0].pci_phys_hi = (PCI_RELOCAT_B |
usr/src/uts/intel/io/pciex/pcie_nvidia.c
215
assigned[0].pci_phys_low = regs[0].pci_phys_low =
usr/src/uts/intel/io/pciex/pcie_nvidia.c
221
regs[1].pci_size_low = assigned[1].pci_size_low = PCI_CONF_HDR_SIZE;
usr/src/uts/intel/io/pciex/pcie_nvidia.c
222
assigned[1].pci_phys_hi = regs[1].pci_phys_hi = (PCI_RELOCAT_B |
usr/src/uts/intel/io/pciex/pcie_nvidia.c
224
assigned[1].pci_phys_low = regs[1].pci_phys_low =
usr/src/uts/intel/io/pciex/pcie_nvidia.c
228
(int *)regs, 2 * sizeof (pci_regspec_t) / sizeof (int));
usr/src/uts/intel/io/vmm/amd/svm.c
140
struct cpuid_regs regs = {
usr/src/uts/intel/io/vmm/amd/svm.c
143
(void) cpuid_insn(NULL, ®s);
usr/src/uts/intel/io/vmm/amd/svm.c
144
svm_feature = regs.cp_edx;
usr/src/uts/intel/io/vmm/intel/vtd.c
326
caddr_t regs;
usr/src/uts/intel/io/vmm/intel/vtd.c
336
error = ddi_regs_map_setup(dip, 0, ®s, 0, PAGE_SIZE, ®s_attr,
usr/src/uts/intel/io/vmm/intel/vtd.c
344
return (regs);
usr/src/uts/intel/io/vmm/io/ppt.c
406
pci_regspec_t *regs;
usr/src/uts/intel/io/vmm/io/ppt.c
411
"assigned-addresses", (caddr_t)®s, &rlen) != DDI_PROP_SUCCESS) {
usr/src/uts/intel/io/vmm/io/ppt.c
418
pci_regspec_t *reg = ®s[i];
usr/src/uts/intel/io/vmm/io/ppt.c
456
kmem_free(regs, rlen);
usr/src/uts/intel/io/vmm/vmm_cpuid.c
1008
regs[0] &= limits->xcr0_allowed;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
1009
regs[2] = limits->xsave_max_size;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
1010
regs[3] &= (limits->xcr0_allowed >> 32);
usr/src/uts/intel/io/vmm/vmm_cpuid.c
1014
regs[0] &= CPUID_EXTSTATE_XSAVEOPT;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
1015
regs[1] = 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
1016
regs[2] = 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
1017
regs[3] = 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
1026
regs[0] = 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
1027
regs[1] = 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
1028
regs[2] = 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
1029
regs[3] = 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
1047
regs[0] = 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
1048
regs[1] = 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
1049
regs[2] = 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
1050
regs[3] = 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
1059
regs[0] = 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
1060
regs[1] = 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
1061
regs[2] = 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
1062
regs[3] = 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
1066
regs[0] = CPUID_VM_HIGH;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
1067
bcopy(bhyve_id, ®s[1], 4);
usr/src/uts/intel/io/vmm/vmm_cpuid.c
1068
bcopy(bhyve_id + 4, ®s[2], 4);
usr/src/uts/intel/io/vmm/vmm_cpuid.c
1069
bcopy(bhyve_id + 8, ®s[3], 4);
usr/src/uts/intel/io/vmm/vmm_cpuid.c
1078
cpuid_count(func, param, regs);
usr/src/uts/intel/io/vmm/vmm_cpuid.c
1082
*eax = regs[0];
usr/src/uts/intel/io/vmm/vmm_cpuid.c
1083
*ebx = regs[1];
usr/src/uts/intel/io/vmm/vmm_cpuid.c
1084
*ecx = regs[2];
usr/src/uts/intel/io/vmm/vmm_cpuid.c
1085
*edx = regs[3];
usr/src/uts/intel/io/vmm/vmm_cpuid.c
236
unsigned int regs[4];
usr/src/uts/intel/io/vmm/vmm_cpuid.c
274
cpuid_count(func, index, regs);
usr/src/uts/intel/io/vmm/vmm_cpuid.c
284
*ebx = regs[1];
usr/src/uts/intel/io/vmm/vmm_cpuid.c
326
*ebx = regs[1];
usr/src/uts/intel/io/vmm/vmm_cpuid.c
332
*ebx = regs[1];
usr/src/uts/intel/io/vmm/vmm_cpuid.c
370
uint32_t regs[4] = { *rax, 0, *rcx, 0 };
usr/src/uts/intel/io/vmm/vmm_cpuid.c
376
legacy_emulate_cpuid(vm, vcpuid, ®s[0], ®s[1], ®s[2],
usr/src/uts/intel/io/vmm/vmm_cpuid.c
377
®s[3]);
usr/src/uts/intel/io/vmm/vmm_cpuid.c
397
regs[0] = ent->vce_eax;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
398
regs[1] = ent->vce_ebx;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
399
regs[2] = ent->vce_ecx;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
400
regs[3] = ent->vce_edx;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
404
cpuid_apply_runtime_reg_state(vm, vcpuid, func, index, ®s[0],
usr/src/uts/intel/io/vmm/vmm_cpuid.c
405
®s[1], ®s[2], ®s[3]);
usr/src/uts/intel/io/vmm/vmm_cpuid.c
408
*rax = regs[0];
usr/src/uts/intel/io/vmm/vmm_cpuid.c
409
*rbx = regs[1];
usr/src/uts/intel/io/vmm/vmm_cpuid.c
410
*rcx = regs[2];
usr/src/uts/intel/io/vmm/vmm_cpuid.c
411
*rdx = regs[3];
usr/src/uts/intel/io/vmm/vmm_cpuid.c
554
unsigned int func, regs[4], logical_cpus = 0, param;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
596
cpuid_count(func, param, regs);
usr/src/uts/intel/io/vmm/vmm_cpuid.c
599
cpuid_count(func, param, regs);
usr/src/uts/intel/io/vmm/vmm_cpuid.c
606
regs[1] &= (AMDFEID_CLZERO | AMDFEID_IRPERF |
usr/src/uts/intel/io/vmm/vmm_cpuid.c
625
regs[2] = (width << AMDID_COREID_SIZE_SHIFT) |
usr/src/uts/intel/io/vmm/vmm_cpuid.c
631
cpuid_count(func, param, regs);
usr/src/uts/intel/io/vmm/vmm_cpuid.c
636
regs[2] &= ~AMDID2_SVM;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
642
regs[2] &= ~AMDID2_PCXC;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
643
regs[2] &= ~AMDID2_PNXC;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
644
regs[2] &= ~AMDID2_PTSCEL2I;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
649
regs[2] &= ~AMDID2_IBS;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
652
regs[2] &= ~AMDID2_NODE_ID;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
655
regs[2] &= ~AMDID2_OSVW;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
658
regs[2] &= ~AMDID2_MWAITX;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
668
regs[2] &= ~AMDID2_TCE;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
669
regs[3] &= ~AMDID_FFXSR;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
676
regs[3] &= ~AMDID_RDTSCP;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
680
cpuid_count(func, param, regs);
usr/src/uts/intel/io/vmm/vmm_cpuid.c
691
regs[0] = 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
692
regs[1] = 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
693
regs[2] = 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
703
regs[3] &= AMDPM_TSC_INVARIANT;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
712
regs[3] |= AMDPM_TSC_INVARIANT;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
752
regs[0] = 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
753
regs[1] = 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
756
regs[0] = (logical_cpus << 14) | (1 << 8) |
usr/src/uts/intel/io/vmm/vmm_cpuid.c
758
regs[1] = func > 0 ? _CACHE_LINE_SIZE - 1 : 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
760
regs[2] = 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
761
regs[3] = 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
774
regs[0] = vcpu_id;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
776
regs[1] = (threads << 8) |
usr/src/uts/intel/io/vmm/vmm_cpuid.c
782
regs[2] = 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
783
regs[3] = 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
787
do_cpuid(1, regs);
usr/src/uts/intel/io/vmm/vmm_cpuid.c
795
regs[1] &= ~(CPUID_LOCAL_APIC_ID);
usr/src/uts/intel/io/vmm/vmm_cpuid.c
796
regs[1] |= (vcpu_id << CPUID_0000_0001_APICID_SHIFT);
usr/src/uts/intel/io/vmm/vmm_cpuid.c
802
regs[2] &= ~(CPUID2_VMX | CPUID2_EST | CPUID2_TM2);
usr/src/uts/intel/io/vmm/vmm_cpuid.c
803
regs[2] &= ~(CPUID2_SMX);
usr/src/uts/intel/io/vmm/vmm_cpuid.c
805
regs[2] |= CPUID2_HV;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
808
regs[2] |= CPUID2_X2APIC;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
810
regs[2] &= ~CPUID2_X2APIC;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
816
if (!(regs[2] & CPUID2_OSXSAVE))
usr/src/uts/intel/io/vmm/vmm_cpuid.c
817
regs[2] &= ~CPUID2_XSAVE;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
823
regs[2] &= ~CPUID2_MON;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
828
regs[2] &= ~CPUID2_PDCM;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
833
regs[2] &= ~CPUID2_TSCDLT;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
838
regs[3] &= ~(CPUID_ACPI | CPUID_TM);
usr/src/uts/intel/io/vmm/vmm_cpuid.c
843
regs[3] &= ~CPUID_DS;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
851
regs[3] |= (CPUID_MCA | CPUID_MCE | CPUID_MTRR);
usr/src/uts/intel/io/vmm/vmm_cpuid.c
856
regs[1] &= ~CPUID_HTT_CORES;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
857
regs[1] |= (logical_cpus & 0xff) << 16;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
858
regs[3] |= CPUID_HTT;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
862
cpuid_count(func, param, regs);
usr/src/uts/intel/io/vmm/vmm_cpuid.c
864
if (regs[0] || regs[1] || regs[2] || regs[3]) {
usr/src/uts/intel/io/vmm/vmm_cpuid.c
867
regs[0] &= 0x3ff;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
868
regs[0] |= (cores - 1) << 26;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
877
level = (regs[0] >> 5) & 0x7;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
880
regs[0] |= (logical_cpus - 1) << 14;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
885
regs[0] = 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
886
regs[1] = 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
887
regs[2] = 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
888
regs[3] = 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
892
cpuid_count(func, param, regs);
usr/src/uts/intel/io/vmm/vmm_cpuid.c
895
regs[0] = 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
900
regs[1] &= CPUID_STDEXT_FSGSBASE |
usr/src/uts/intel/io/vmm/vmm_cpuid.c
914
regs[2] &= CPUID_STDEXT2_VAES |
usr/src/uts/intel/io/vmm/vmm_cpuid.c
916
regs[3] &= CPUID_STDEXT3_MD_CLEAR;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
922
regs[1] |= CPUID_STDEXT_INVPCID;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
927
regs[0] = CPUTPM1_ARAT;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
928
regs[1] = 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
929
regs[2] = 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
930
regs[3] = 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
938
regs[0] = 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
939
regs[1] = 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
940
regs[2] = 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
941
regs[3] = 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
972
regs[0] = width & 0x1f;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
973
regs[1] = logical_cpus & 0xffff;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
974
regs[2] = (level << 8) | (param & 0xff);
usr/src/uts/intel/io/vmm/vmm_cpuid.c
975
regs[3] = x2apic_id;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
977
regs[0] = 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
978
regs[1] = 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
979
regs[2] = 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
980
regs[3] = 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
987
regs[0] = 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
988
regs[1] = 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
989
regs[2] = 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
990
regs[3] = 0;
usr/src/uts/intel/io/vmm/vmm_cpuid.c
994
cpuid_count(func, param, regs);
usr/src/uts/intel/io/vmm/vmm_host.c
103
cpuid_count(0xd, 0x0, regs);
usr/src/uts/intel/io/vmm/vmm_host.c
104
vmm_xsave_limits.xsave_max_size = regs[1];
usr/src/uts/intel/io/vmm/vmm_host.c
62
unsigned int regs[4];
usr/src/uts/intel/io/vmm/vmm_sol_glue.c
385
uint_t regs[4];
usr/src/uts/intel/io/vmm/vmm_sol_glue.c
387
do_cpuid(0, regs);
usr/src/uts/intel/io/vmm/vmm_sol_glue.c
388
cpu_high = regs[0];
usr/src/uts/intel/io/vmm/vmm_sol_glue.c
389
((uint_t *)&cpu_vendor)[0] = regs[1];
usr/src/uts/intel/io/vmm/vmm_sol_glue.c
390
((uint_t *)&cpu_vendor)[1] = regs[3];
usr/src/uts/intel/io/vmm/vmm_sol_glue.c
391
((uint_t *)&cpu_vendor)[2] = regs[2];
usr/src/uts/intel/io/vmm/vmm_sol_glue.c
394
do_cpuid(1, regs);
usr/src/uts/intel/io/vmm/vmm_sol_glue.c
395
cpu_id = regs[0];
usr/src/uts/intel/io/vmm/vmm_sol_glue.c
397
do_cpuid(0x80000000, regs);
usr/src/uts/intel/io/vmm/vmm_sol_glue.c
398
cpu_exthigh = regs[0];
usr/src/uts/intel/io/vmm/vmm_util.c
70
unsigned int regs[4];
usr/src/uts/intel/io/vmm/vmm_util.c
78
do_cpuid(0x80000001, regs);
usr/src/uts/intel/io/vmm/vmm_util.c
79
if (regs[3] & (1 << 26))
usr/src/uts/intel/os/archdep.c
1042
traceregs(struct regs *rp)
usr/src/uts/intel/os/archdep.c
289
struct regs *rp = lwptoregs(lwp);
usr/src/uts/intel/os/archdep.c
339
struct regs *rp = lwptoregs(lwp);
usr/src/uts/intel/os/archdep.c
537
struct regs *rp = lwptoregs(lwp);
usr/src/uts/intel/os/archdep.c
679
pc = ((struct regs *)fp)->r_pc;
usr/src/uts/intel/os/archdep.c
878
panic_saveregs(panic_data_t *pdp, struct regs *rp)
usr/src/uts/intel/os/cpuid.c
1974
#define CPI_NUM_CORES(regs) BITX((regs)->cp_eax, 31, 26)
usr/src/uts/intel/os/cpuid.c
1975
#define CPI_NTHR_SHR_CACHE(regs) BITX((regs)->cp_eax, 25, 14)
usr/src/uts/intel/os/cpuid.c
1976
#define CPI_FULL_ASSOC_CACHE(regs) BITX((regs)->cp_eax, 9, 9)
usr/src/uts/intel/os/cpuid.c
1977
#define CPI_SELF_INIT_CACHE(regs) BITX((regs)->cp_eax, 8, 8)
usr/src/uts/intel/os/cpuid.c
1978
#define CPI_CACHE_LVL(regs) BITX((regs)->cp_eax, 7, 5)
usr/src/uts/intel/os/cpuid.c
1979
#define CPI_CACHE_TYPE(regs) BITX((regs)->cp_eax, 4, 0)
usr/src/uts/intel/os/cpuid.c
1984
#define CPI_CPU_LEVEL_TYPE(regs) BITX((regs)->cp_ecx, 15, 8)
usr/src/uts/intel/os/cpuid.c
1986
#define CPI_CACHE_WAYS(regs) BITX((regs)->cp_ebx, 31, 22)
usr/src/uts/intel/os/cpuid.c
1987
#define CPI_CACHE_PARTS(regs) BITX((regs)->cp_ebx, 21, 12)
usr/src/uts/intel/os/cpuid.c
1988
#define CPI_CACHE_COH_LN_SZ(regs) BITX((regs)->cp_ebx, 11, 0)
usr/src/uts/intel/os/cpuid.c
1990
#define CPI_CACHE_SETS(regs) BITX((regs)->cp_ecx, 31, 0)
usr/src/uts/intel/os/cpuid.c
1992
#define CPI_PREFCH_STRIDE(regs) BITX((regs)->cp_edx, 9, 0)
usr/src/uts/intel/os/cpuid.c
2213
uint32_t regs[4];
usr/src/uts/intel/os/cpuid.c
2214
char *hvstr = (char *)regs;
usr/src/uts/intel/os/cpuid.c
2236
regs[0] = cp.cp_ebx;
usr/src/uts/intel/os/cpuid.c
2237
regs[1] = cp.cp_ecx;
usr/src/uts/intel/os/cpuid.c
2238
regs[2] = cp.cp_edx;
usr/src/uts/intel/os/cpuid.c
2239
regs[3] = 0;
usr/src/uts/intel/os/cpuid.c
2281
vmware_port(VMWARE_HVCMD_GETVERSION, regs);
usr/src/uts/intel/os/cpuid.c
2282
if (regs[1] == VMWARE_HVMAGIC) {
usr/src/uts/intel/os/cpuid.c
2300
regs[0] = cp.cp_ebx;
usr/src/uts/intel/os/cpuid.c
2301
regs[1] = cp.cp_ecx;
usr/src/uts/intel/os/cpuid.c
2302
regs[2] = cp.cp_edx;
usr/src/uts/intel/os/cpuid.c
2303
regs[3] = 0;
usr/src/uts/intel/os/cpuid.c
2352
struct cpuid_regs *regs = &cpi->cpi_topo[i];
usr/src/uts/intel/os/cpuid.c
2354
bzero(regs, sizeof (struct cpuid_regs));
usr/src/uts/intel/os/cpuid.c
2355
regs->cp_eax = leaf;
usr/src/uts/intel/os/cpuid.c
2356
regs->cp_ecx = i;
usr/src/uts/intel/os/cpuid.c
2358
(void) __cpuid_insn(regs);
usr/src/uts/intel/os/cpuid.c
2359
if (CPUID_AMD_8X26_ECX_TYPE(regs->cp_ecx) ==
usr/src/uts/intel/os/cpuid.c
2415
struct cpuid_regs regs;
usr/src/uts/intel/os/cpuid.c
2418
cp = ®s;
usr/src/uts/intel/os/cpuid.c
2515
struct cpuid_regs regs;
usr/src/uts/intel/os/cpuid.c
2521
cp = ®s;
usr/src/uts/intel/os/cpuid.c
5107
struct cpuid_regs regs;
usr/src/uts/intel/os/cpuid.c
5110
cp = ®s;
usr/src/uts/intel/os/cpuid.c
5767
struct cpuid_regs regs;
usr/src/uts/intel/os/cpuid.c
5805
bzero(®s, sizeof (regs));
usr/src/uts/intel/os/cpuid.c
5806
cp = ®s;
usr/src/uts/intel/os/cpuid.c
5847
kmem_zalloc(sizeof (regs), KM_SLEEP);
usr/src/uts/intel/os/cpuid.c
6863
struct cpuid_regs regs;
usr/src/uts/intel/os/cpuid.c
6864
regs.cp_eax = 0x80000007;
usr/src/uts/intel/os/cpuid.c
6865
(void) __cpuid_insn(®s);
usr/src/uts/intel/os/cpuid.c
6866
return (!(regs.cp_edx & 0x100));
usr/src/uts/intel/os/cpuid.c
7960
struct cpuid_regs regs;
usr/src/uts/intel/os/cpuid.c
7977
regs.cp_eax = 0x80000007;
usr/src/uts/intel/os/cpuid.c
7978
(void) __cpuid_insn(®s);
usr/src/uts/intel/os/cpuid.c
7979
return (regs.cp_edx & CPUID_TSC_CSTATE_INVARIANCE);
usr/src/uts/intel/os/cpuid.c
8074
struct cpuid_regs regs;
usr/src/uts/intel/os/cpuid.c
8090
regs.cp_eax = 6;
usr/src/uts/intel/os/cpuid.c
8091
(void) cpuid_insn(NULL, ®s);
usr/src/uts/intel/os/cpuid.c
8092
return (regs.cp_eax & CPUID_INTC_EAX_ARAT);
usr/src/uts/intel/os/cpuid.c
8108
struct cpuid_regs regs;
usr/src/uts/intel/os/cpuid.c
8124
regs.cp_eax = 0x6;
usr/src/uts/intel/os/cpuid.c
8125
(void) cpuid_insn(NULL, ®s);
usr/src/uts/intel/os/cpuid.c
8126
return (regs.cp_ecx & CPUID_INTC_ECX_PERFBIAS);
usr/src/uts/intel/os/cpuid.c
8142
struct cpuid_regs regs;
usr/src/uts/intel/os/cpuid.c
8150
regs.cp_eax = 1;
usr/src/uts/intel/os/cpuid.c
8151
(void) cpuid_insn(NULL, ®s);
usr/src/uts/intel/os/cpuid.c
8152
return (regs.cp_ecx & CPUID_DEADLINE_TSC);
usr/src/uts/intel/os/fpu.c
1397
fpexterrflt(struct regs *rp)
usr/src/uts/intel/os/fpu.c
1465
fpsimderrflt(struct regs *rp)
usr/src/uts/intel/os/hma.c
966
struct cpuid_regs regs;
usr/src/uts/intel/os/hma.c
980
regs.cp_eax = 0x8000000a;
usr/src/uts/intel/os/hma.c
981
(void) cpuid_insn(NULL, ®s);
usr/src/uts/intel/os/hma.c
982
const uint32_t nasid = regs.cp_ebx;
usr/src/uts/intel/os/hma.c
983
const uint32_t feat = regs.cp_edx;
usr/src/uts/intel/os/hma_fpu.c
242
struct cpuid_regs regs = {
usr/src/uts/intel/os/hma_fpu.c
249
(void) __cpuid_insn(®s);
usr/src/uts/intel/os/hma_fpu.c
250
size = regs.cp_eax;
usr/src/uts/intel/os/hma_fpu.c
251
off = regs.cp_ebx;
usr/src/uts/intel/os/sendsig.c
140
volatile struct regs *rp;
usr/src/uts/intel/os/sendsig.c
429
volatile struct regs *rp;
usr/src/uts/intel/os/sundep.c
311
struct regs *rp = lwptoregs(lwp);
usr/src/uts/intel/os/sundep.c
395
struct regs *rp = lwptoregs(lwp);
usr/src/uts/intel/os/sundep.c
409
bcopy(lwp->lwp_regs, clwp->lwp_regs, sizeof (struct regs));
usr/src/uts/intel/os/sundep.c
466
struct regs *rp;
usr/src/uts/intel/os/sundep.c
509
update_sregs(struct regs *rp, klwp_t *lwp)
usr/src/uts/intel/os/sundep.c
909
struct regs *rp;
usr/src/uts/intel/os/syscall.c
1035
struct regs *rp = lwptoregs(lwp);
usr/src/uts/intel/os/syscall.c
1076
struct regs *rp = lwptoregs(lwp);
usr/src/uts/intel/os/syscall.c
144
struct regs *rp = lwptoregs(lwp);
usr/src/uts/intel/os/syscall.c
211
struct regs *rp = lwptoregs(lwp);
usr/src/uts/intel/os/syscall.c
430
struct regs *rp = lwptoregs(lwp);
usr/src/uts/intel/os/syscall.c
87
copyin_args(struct regs *rp, long *ap, uint_t nargs)
usr/src/uts/intel/os/syscall.c
98
copyin_args32(struct regs *rp, long *ap, uint_t nargs)
usr/src/uts/intel/os/sysi86.c
588
struct regs *rp = lwp->lwp_regs;
usr/src/uts/intel/os/sysi86.c
96
struct regs *rp = lwptoregs(ttolwp(curthread));
usr/src/uts/intel/sys/archsystm.h
139
struct regs;
usr/src/uts/intel/sys/archsystm.h
141
extern int instr_size(struct regs *, caddr_t *, enum seg_rw);
usr/src/uts/intel/sys/archsystm.h
180
extern int sys_rtt_common(struct regs *);
usr/src/uts/intel/sys/cpu_module.h
117
struct regs;
usr/src/uts/intel/sys/cpu_module.h
219
extern void cmi_mca_trap(struct regs *);
usr/src/uts/intel/sys/ecppvar.h
163
struct ecpp_regs regs; /* control/status registers */
usr/src/uts/intel/sys/fp.h
373
struct regs;
usr/src/uts/intel/sys/fp.h
374
extern int fpexterrflt(struct regs *);
usr/src/uts/intel/sys/fp.h
375
extern int fpsimderrflt(struct regs *);
usr/src/uts/intel/sys/stack.h
147
struct regs;
usr/src/uts/intel/sys/stack.h
149
void traceregs(struct regs *);
usr/src/uts/intel/sys/traptrace.h
62
struct regs ttr_regs;
usr/src/uts/intel/syscall/getcontext.c
101
struct regs *rp = lwptoregs(lwp);
usr/src/uts/intel/syscall/getcontext.c
419
struct regs *rp = lwptoregs(lwp);
usr/src/uts/intel/syscall/lwp_private.c
128
struct regs *rp = lwptoregs(lwp);
usr/src/uts/intel/syscall/lwp_private.c
43
struct regs *rp = lwptoregs(lwp);
usr/src/uts/sfmmu/vm/hat_sfmmu.c
11687
sfmmu_tsbmiss_exception(struct regs *rp, uintptr_t tagaccess, uint_t traptype)
usr/src/uts/sfmmu/vm/hat_sfmmu.c
11917
sfmmu_tsbmiss_suspended(struct regs *rp, uintptr_t tagacc, uint_t traptype)
usr/src/uts/sfmmu/vm/hat_sfmmu.h
2285
extern void sfmmu_tsbmiss_exception(struct regs *, uintptr_t, uint_t);
usr/src/uts/sparc/dtrace/dtrace_isa.c
454
struct regs *rp;
usr/src/uts/sparc/dtrace/dtrace_isa.c
516
struct regs *rp;
usr/src/uts/sparc/dtrace/dtrace_isa.c
548
struct regs *rp;
usr/src/uts/sparc/dtrace/dtrace_isa.c
747
dtrace_getreg(struct regs *rp, uint_t reg)
usr/src/uts/sparc/dtrace/dtrace_isa.c
945
dtrace_setreg(struct regs *rp, uint_t reg, ulong_t val)
usr/src/uts/sparc/dtrace/fasttrap_isa.c
1014
fasttrap_return_probe(struct regs *rp)
usr/src/uts/sparc/dtrace/fasttrap_isa.c
1384
fasttrap_getreg(struct regs *rp, uint_t reg)
usr/src/uts/sparc/dtrace/fasttrap_isa.c
1484
fasttrap_putreg(struct regs *rp, uint_t reg, ulong_t value)
usr/src/uts/sparc/dtrace/fasttrap_isa.c
198
fasttrap_anarg(struct regs *rp, int argno)
usr/src/uts/sparc/dtrace/fasttrap_isa.c
224
static ulong_t fasttrap_getreg(struct regs *, uint_t);
usr/src/uts/sparc/dtrace/fasttrap_isa.c
225
static void fasttrap_putreg(struct regs *, uint_t, ulong_t);
usr/src/uts/sparc/dtrace/fasttrap_isa.c
228
fasttrap_usdt_args(fasttrap_probe_t *probe, struct regs *rp,
usr/src/uts/sparc/dtrace/fasttrap_isa.c
277
fasttrap_return_common(struct regs *rp, uintptr_t pc, pid_t pid,
usr/src/uts/sparc/dtrace/fasttrap_isa.c
412
fasttrap_pid_probe(struct regs *rp)
usr/src/uts/sparc/fpu/fpu_simulator.c
538
struct regs *pregs, /* Pointer to PCB image of registers. */
usr/src/uts/sparc/fpu/fpu_simulator.c
626
struct regs *pregs, /* Pointer to PCB image of registers. */
usr/src/uts/sparc/fpu/iu_simulator.c
179
struct regs *pregs, /* Pointer to PCB image of registers. */
usr/src/uts/sparc/fpu/iu_simulator.c
44
struct regs *pregs, /* Pointer to PCB image of registers. */
usr/src/uts/sparc/fs/proc/prmachdep.c
1034
pr_watch_emul(struct regs *rp, caddr_t addr, enum seg_rw rw)
usr/src/uts/sparc/fs/proc/prmachdep.c
233
struct regs *r = lwptoregs(lwp);
usr/src/uts/sparc/fs/proc/prmachdep.c
378
struct regs *r = lwptoregs(lwp);
usr/src/uts/sparc/fs/proc/prmachdep.c
645
struct regs *r = lwptoregs(lwp);
usr/src/uts/sparc/fs/proc/prmachdep.c
732
struct regs *r = lwptoregs(lwp);
usr/src/uts/sparc/fs/proc/prmachdep.c
829
struct regs *r = lwptoregs(lwp);
usr/src/uts/sparc/fs/proc/prmachdep.c
879
struct regs *r = lwptoregs(lwp);
usr/src/uts/sparc/os/archdep.c
402
traceregs(struct regs *rp)
usr/src/uts/sparc/os/syscall.c
208
struct regs *rp = lwptoregs(lwp);
usr/src/uts/sparc/os/syscall.c
362
struct regs *rp = lwptoregs(lwp);
usr/src/uts/sparc/os/syscall.c
534
struct regs *rp = lwptoregs(lwp);
usr/src/uts/sparc/os/syscall.c
908
struct regs *rp = lwptoregs(lwp);
usr/src/uts/sparc/sys/fpu/fpu_simulator.h
265
struct regs *fp_traprp;
usr/src/uts/sparc/sys/fpu/fpu_simulator.h
396
struct regs *pregs, fsr_type *pfsr, uint64_t gsr, uint32_t inst);
usr/src/uts/sparc/sys/fpu/fpu_simulator.h
408
struct regs *rp, void *prw, kfpu_t *pfpu);
usr/src/uts/sparc/sys/fpu/fpu_simulator.h
413
extern void fp_traps(fp_simd_type *pfpsd, enum ftt_type ftt, struct regs *rp);
usr/src/uts/sparc/sys/fpu/fpu_simulator.h
427
extern void fp_precise(struct regs *rp);
usr/src/uts/sparc/sys/fpu/fpu_simulator.h
434
extern void fpu_trap(struct regs *rp, caddr_t addr, uint32_t type,
usr/src/uts/sparc/sys/fpu/fpu_simulator.h
456
struct regs *pregs, /* Pointer to PCB image of registers. */
usr/src/uts/sparc/sys/fpu/fpu_simulator.h
467
struct regs *rp); /* Pointer to PCB image of registers. */
usr/src/uts/sparc/sys/fpu/fpu_simulator.h
482
struct regs *rp); /* Pointer to PCB image of registers. */
usr/src/uts/sparc/sys/fpu/fpu_simulator.h
490
struct regs *rp, /* Pointer to PCB image of registers. */
usr/src/uts/sparc/sys/fpu/fpusystm.h
41
struct regs;
usr/src/uts/sparc/sys/fpu/fpusystm.h
54
extern void fp_disabled(struct regs *);
usr/src/uts/sparc/sys/fpu/fpusystm.h
58
extern void fp_runq(struct regs *);
usr/src/uts/sparc/sys/fpu/globals.h
100
extern enum ftt_type fldst(fp_simd_type *, fp_inst_type, struct regs *,
usr/src/uts/sparc/sys/fpu/globals.h
131
extern enum ftt_type read_iureg(fp_simd_type *, uint_t, struct regs *,
usr/src/uts/sparc/sys/fpu/globals.h
133
extern enum ftt_type write_iureg(fp_simd_type *, uint_t, struct regs *,
usr/src/uts/sparc/sys/fpu/globals.h
88
struct regs *, void *, kfpu_t *);
usr/src/uts/sparc/sys/fpu/globals.h
98
extern enum ftt_type movcc(fp_simd_type *, fp_inst_type, struct regs *,
usr/src/uts/sparc/sys/kdi_machimpl.h
44
struct regs;
usr/src/uts/sparc/sys/kdi_machimpl.h
76
void (*mkdi_kernpanic)(struct regs *, uint_t);
usr/src/uts/sparc/sys/simulate.h
144
extern int simulate_unimp(struct regs *, caddr_t *);
usr/src/uts/sparc/sys/simulate.h
145
extern int simulate_lddstd(struct regs *, caddr_t *);
usr/src/uts/sparc/sys/simulate.h
146
extern int simulate_rdtick(struct regs *);
usr/src/uts/sparc/sys/simulate.h
147
extern int do_unaligned(struct regs *, caddr_t *);
usr/src/uts/sparc/sys/simulate.h
148
extern int calc_memaddr(struct regs *, caddr_t *);
usr/src/uts/sparc/sys/simulate.h
149
extern int is_atomic(struct regs *);
usr/src/uts/sparc/sys/simulate.h
150
extern int instr_size(struct regs *, caddr_t *, enum seg_rw);
usr/src/uts/sparc/sys/simulate.h
151
extern int getreg(struct regs *, uint_t, uint64_t *, caddr_t *);
usr/src/uts/sparc/sys/simulate.h
152
extern int putreg(uint64_t *, struct regs *, uint_t, caddr_t *);
usr/src/uts/sparc/sys/stack.h
158
struct regs;
usr/src/uts/sparc/sys/stack.h
164
void traceregs(struct regs *);
usr/src/uts/sparc/v7/sys/machpcb.h
64
struct regs mpcb_regs; /* user's saved registers */
usr/src/uts/sparc/v9/fpu/fpu.c
208
fp_disabled(struct regs *rp)
usr/src/uts/sparc/v9/fpu/fpu.c
221
extern void trap(struct regs *rp, caddr_t addr, uint32_t type,
usr/src/uts/sparc/v9/fpu/fpu.c
318
fp_runq(struct regs *rp)
usr/src/uts/sparc/v9/fpu/fpu.c
412
fp_precise(struct regs *rp)
usr/src/uts/sparc/v9/fpu/fpu.c
526
struct regs *rp) /* ptr to regs fro trap */
usr/src/uts/sparc/v9/fpu/uword.c
195
struct regs *pregs, /* Pointer to PCB image of registers. */
usr/src/uts/sparc/v9/fpu/uword.c
257
struct regs *pregs, /* Pointer to PCB image of registers. */
usr/src/uts/sparc/v9/fpu/v9instr.c
276
struct regs *pregs;
usr/src/uts/sparc/v9/fpu/v9instr.c
405
struct regs *pregs;
usr/src/uts/sparc/v9/fpu/v9instr.c
477
struct regs *pregs, /* Pointer to PCB image of registers. */
usr/src/uts/sparc/v9/fpu/v9instr.c
51
struct regs *pregs, /* Pointer to PCB image of registers. */
usr/src/uts/sparc/v9/os/simulator.c
1145
simulate_rdtick(struct regs *rp)
usr/src/uts/sparc/v9/os/simulator.c
1190
getreg(struct regs *rp, uint_t reg, uint64_t *val, caddr_t *badaddr)
usr/src/uts/sparc/v9/os/simulator.c
1243
putreg(uint64_t *data, struct regs *rp, uint_t reg, caddr_t *badaddr)
usr/src/uts/sparc/v9/os/simulator.c
1313
calc_memaddr(struct regs *rp, caddr_t *badaddr)
usr/src/uts/sparc/v9/os/simulator.c
1419
instr_size(struct regs *rp, caddr_t *addrp, enum seg_rw rdwr)
usr/src/uts/sparc/v9/os/simulator.c
561
simulate_lddstd(struct regs *rp, caddr_t *badaddr)
usr/src/uts/sparc/v9/os/simulator.c
718
simulate_popc(struct regs *rp, caddr_t *badaddr, uint_t inst)
usr/src/uts/sparc/v9/os/simulator.c
75
do_unaligned(struct regs *rp, caddr_t *badaddr)
usr/src/uts/sparc/v9/os/simulator.c
763
simulate_mulscc(struct regs *rp, caddr_t *badaddr, uint_t inst)
usr/src/uts/sparc/v9/os/simulator.c
845
simulate_unimp(struct regs *rp, caddr_t *badaddr)
usr/src/uts/sparc/v9/os/v9dep.c
1220
struct regs *volatile rp;
usr/src/uts/sparc/v9/os/v9dep.c
1570
struct regs *rp = lwptoregs(lwp);
usr/src/uts/sparc/v9/os/v9dep.c
1583
struct regs *rp = lwptoregs(lwp);
usr/src/uts/sparc/v9/os/v9dep.c
1627
struct regs *rp = lwptoregs(ttolwp(curthread));
usr/src/uts/sparc/v9/os/v9dep.c
1849
panic_saveregs(panic_data_t *pdp, struct regs *rp)
usr/src/uts/sparc/v9/os/v9dep.c
330
struct regs *rp = lwptoregs(lwp);
usr/src/uts/sparc/v9/os/v9dep.c
394
struct regs *rp = lwptoregs(lwp);
usr/src/uts/sparc/v9/os/v9dep.c
431
struct regs *rp = lwptoregs(lwp);
usr/src/uts/sparc/v9/os/v9dep.c
796
struct regs *rp;
usr/src/uts/sparc/v9/os/v9dep.c
891
struct regs *volatile rp;
usr/src/uts/sparc/v9/os/xregs.c
153
struct regs *rp = lwptoregs(lwp);
usr/src/uts/sparc/v9/os/xregs.c
260
struct regs *rp = lwptoregs(lwp);
usr/src/uts/sparc/v9/sys/machpcb.h
67
struct regs mpcb_regs; /* user's saved registers */
usr/src/uts/sparc/v9/sys/privregs.h
79
#define lwptoregs(lwp) ((struct regs *)((lwp)->lwp_regs))
usr/src/uts/sparc/v9/sys/vis_simulator.h
162
struct regs *, void *, kfpu_t *);
usr/src/uts/sparc/v9/sys/vis_simulator.h
167
enum ftt_type vis_fldst(fp_simd_type *, fp_inst_type, struct regs *,
usr/src/uts/sparc/v9/sys/vis_simulator.h
173
enum ftt_type vis_rdgsr(fp_simd_type *, fp_inst_type, struct regs *,
usr/src/uts/sparc/v9/sys/vis_simulator.h
179
enum ftt_type vis_wrgsr(fp_simd_type *, fp_inst_type, struct regs *,
usr/src/uts/sun/io/audio/drv/audiocs/audio_4231_eb2dma.c
252
cs4231_eb2regs_t *regs = eng->ce_eb2regs;
usr/src/uts/sun/io/audio/drv/audiocs/audio_4231_eb2dma.c
269
OR_SET_WORD(handle, ®s->eb2csr, EB2_RESET);
usr/src/uts/sun/io/audio/drv/audiocs/audio_4231_eb2dma.c
272
csr = ddi_get32(handle, ®s->eb2csr);
usr/src/uts/sun/io/audio/drv/audiocs/audio_4231_eb2dma.c
275
csr = ddi_get32(handle, ®s->eb2csr);
usr/src/uts/sun/io/audio/drv/audiocs/audio_4231_eb2dma.c
284
AND_SET_WORD(handle, ®s->eb2csr, ~(EB2_RESET|EB2_EN_DMA));
usr/src/uts/sun/io/audio/drv/audiocs/audio_4231_eb2dma.c
287
OR_SET_WORD(handle, ®s->eb2csr, reset);
usr/src/uts/sun/io/audio/drv/audiocs/audio_4231_eb2dma.c
297
OR_SET_WORD(handle, ®s->eb2csr, enable);
usr/src/uts/sun/io/audio/drv/audiocs/audio_4231_eb2dma.c
323
cs4231_eb2regs_t *regs = eng->ce_eb2regs;
usr/src/uts/sun/io/audio/drv/audiocs/audio_4231_eb2dma.c
327
AND_SET_WORD(handle, ®s->eb2csr, ~(EB2_EN_DMA | EB2_INT_EN));
usr/src/uts/sun/io/audio/drv/audiocs/audio_4231_eb2dma.c
329
csr = ddi_get32(handle, ®s->eb2csr);
usr/src/uts/sun/io/audio/drv/audiocs/audio_4231_eb2dma.c
332
csr = ddi_get32(handle, ®s->eb2csr);
usr/src/uts/sun/io/audio/drv/audiocs/audio_4231_eb2dma.c
336
OR_SET_WORD(handle, ®s->eb2csr, EB2_RESET | EB2_TC);
usr/src/uts/sun/io/audio/drv/audiocs/audio_4231_eb2dma.c
339
csr = ddi_get32(handle, ®s->eb2csr);
usr/src/uts/sun/io/audio/drv/audiocs/audio_4231_eb2dma.c
342
csr = ddi_get32(handle, ®s->eb2csr);
usr/src/uts/sun/io/audio/drv/audiocs/audio_4231_eb2dma.c
346
AND_SET_WORD(handle, ®s->eb2csr, ~(EB2_RESET|EB2_EN_DMA));
usr/src/uts/sun/io/audio/drv/audiocs/audio_4231_eb2dma.c
391
cs4231_eb2regs_t *regs = eng->ce_eb2regs;
usr/src/uts/sun/io/audio/drv/audiocs/audio_4231_eb2dma.c
394
if ((ddi_get32(handle, ®s->eb2csr) & EB2_NA_LOADED)) {
usr/src/uts/sun/io/audio/drv/audiocs/audio_4231_eb2dma.c
401
ddi_put32(handle, ®s->eb2bcr, CS4231_FRAGSZ);
usr/src/uts/sun/io/audio/drv/audiocs/audio_4231_eb2dma.c
404
ddi_put32(handle, ®s->eb2acr,
usr/src/uts/sun/io/audio/drv/audiocs/audio_4231_eb2dma.c
428
cs4231_eb2regs_t *regs = eng->ce_eb2regs;
usr/src/uts/sun/io/audio/drv/audiocs/audio_4231_eb2dma.c
430
return (ddi_get32(handle, ®s->eb2acr));
usr/src/uts/sun4/io/pcicfg.c
298
ddi_acc_handle_t h, pcicfg_err_regs_t *regs);
usr/src/uts/sun4/io/pcicfg.c
300
ddi_acc_handle_t h, pcicfg_err_regs_t *regs);
usr/src/uts/sun4/io/pcicfg.c
3950
pcicfg_err_regs_t *regs)
usr/src/uts/sun4/io/pcicfg.c
3955
regs->cmd = val = pci_config_get16(h, PCI_CONF_COMM);
usr/src/uts/sun4/io/pcicfg.c
3958
regs->bcntl = val = pci_config_get16(h, PCI_BCNF_BCNTRL);
usr/src/uts/sun4/io/pcicfg.c
3967
if (regs->pcie_dev) {
usr/src/uts/sun4/io/pcicfg.c
3975
regs->pcie_cap_off = cap_ptr;
usr/src/uts/sun4/io/pcicfg.c
3976
regs->devctl = devctl = PCI_CAP_GET16(h, 0, cap_ptr,
usr/src/uts/sun4/io/pcicfg.c
3989
pcicfg_err_regs_t *regs)
usr/src/uts/sun4/io/pcicfg.c
3998
if (regs->pcie_dev) {
usr/src/uts/sun4/io/pcicfg.c
4000
pci_config_put16(h, regs->pcie_cap_off + PCIE_DEVCTL,
usr/src/uts/sun4/io/pcicfg.c
4001
regs->devctl);
usr/src/uts/sun4/io/pcicfg.c
4004
pci_config_put16(h, PCI_BCNF_BCNTRL, regs->bcntl);
usr/src/uts/sun4/io/pcicfg.c
4005
pci_config_put16(h, PCI_CONF_COMM, regs->cmd);
usr/src/uts/sun4/io/pcicfg.c
4017
pcicfg_err_regs_t regs;
usr/src/uts/sun4/io/pcicfg.c
4065
if (pcicfg_pcie_dev(new_child, PCICFG_DEVICE_TYPE_PCIE, ®s)
usr/src/uts/sun4/io/pcicfg.c
4290
pcicfg_err_regs_t parent_regs, regs;
usr/src/uts/sun4/io/pcicfg.c
4404
if (pcicfg_pcie_dev(new_child, PCICFG_DEVICE_TYPE_PCIE, ®s)
usr/src/uts/sun4/io/pcicfg.c
4414
h, regs.pcie_dev) != PCICFG_SUCCESS) {
usr/src/uts/sun4/io/pcicfg.c
4423
h, regs.pcie_dev) != PCICFG_SUCCESS) {
usr/src/uts/sun4/io/pcicfg.c
627
pcicfg_pcie_dev(dev_info_t *dip, int bus_type, pcicfg_err_regs_t *regs)
usr/src/uts/sun4/io/pcicfg.c
634
regs->pcie_dev = 0;
usr/src/uts/sun4/io/pcicfg.c
646
regs->pcie_dev = 1;
usr/src/uts/sun4/io/px/px_fm.c
56
px_err_pcie_t *regs);
usr/src/uts/sun4/io/px/px_fm.c
586
px_err_check_pcie(dev_info_t *dip, ddi_fm_error_t *derr, px_err_pcie_t *regs,
usr/src/uts/sun4/io/px/px_fm.c
59
static void px_pcie_log(dev_info_t *dip, px_err_pcie_t *regs);
usr/src/uts/sun4/io/px/px_fm.c
600
if (regs->primary_ue & PCIE_AER_UCE_UR)
usr/src/uts/sun4/io/px/px_fm.c
602
if (regs->primary_ue & PCIE_AER_UCE_CA)
usr/src/uts/sun4/io/px/px_fm.c
604
if (regs->primary_ue & (PCIE_AER_UCE_PTLP | PCIE_AER_UCE_ECRC))
usr/src/uts/sun4/io/px/px_fm.c
607
if (!regs->primary_ue)
usr/src/uts/sun4/io/px/px_fm.c
610
adv_reg->pcie_ce_status = regs->ce_reg;
usr/src/uts/sun4/io/px/px_fm.c
611
adv_reg->pcie_ue_status = regs->ue_reg | regs->primary_ue;
usr/src/uts/sun4/io/px/px_fm.c
612
PCIE_ADV_HDR(pfd_p, 0) = regs->rx_hdr1;
usr/src/uts/sun4/io/px/px_fm.c
613
PCIE_ADV_HDR(pfd_p, 1) = regs->rx_hdr2;
usr/src/uts/sun4/io/px/px_fm.c
614
PCIE_ADV_HDR(pfd_p, 2) = regs->rx_hdr3;
usr/src/uts/sun4/io/px/px_fm.c
615
PCIE_ADV_HDR(pfd_p, 3) = regs->rx_hdr4;
usr/src/uts/sun4/io/px/px_fm.c
616
for (i = regs->primary_ue; i != 1; i = i >> 1)
usr/src/uts/sun4/io/px/px_fm.c
619
if (regs->primary_ue & (PCIE_AER_UCE_UR | PCIE_AER_UCE_CA)) {
usr/src/uts/sun4/io/px/px_fm.c
623
} else if (regs->primary_ue & PCIE_AER_UCE_PTLP) {
usr/src/uts/sun4/io/px/px_fm.c
641
px_pcie_log(dip, regs);
usr/src/uts/sun4/io/px/px_fm.c
649
px_pcie_log(dev_info_t *dip, px_err_pcie_t *regs)
usr/src/uts/sun4/io/px/px_fm.c
655
regs->ce_reg, regs->ue_reg, regs->primary_ue,
usr/src/uts/sun4/io/px/px_fm.c
656
regs->tx_hdr1, regs->tx_hdr2, regs->tx_hdr3, regs->tx_hdr4,
usr/src/uts/sun4/io/px/px_fm.c
657
regs->rx_hdr1, regs->rx_hdr2, regs->rx_hdr3, regs->rx_hdr4);
usr/src/uts/sun4/io/px/px_fm.c
666
px_pcie_ptlp(dev_info_t *dip, ddi_fm_error_t *derr, px_err_pcie_t *regs)
usr/src/uts/sun4/io/px/px_fm.c
675
if (regs->primary_ue != PCIE_AER_UCE_PTLP)
usr/src/uts/sun4/io/px/px_fm.c
678
if (!regs->rx_hdr1)
usr/src/uts/sun4/io/px/px_fm.c
681
adv_reg.pcie_ue_hdr[0] = regs->rx_hdr1;
usr/src/uts/sun4/io/px/px_fm.c
682
adv_reg.pcie_ue_hdr[1] = regs->rx_hdr2;
usr/src/uts/sun4/io/px/px_fm.c
683
adv_reg.pcie_ue_hdr[2] = regs->rx_hdr3;
usr/src/uts/sun4/io/px/px_fm.c
684
adv_reg.pcie_ue_hdr[3] = regs->rx_hdr4;
usr/src/uts/sun4/io/px/px_fm.c
703
if (regs->tx_hdr1) {
usr/src/uts/sun4/io/px/px_fm.c
704
adv_reg.pcie_ue_hdr[0] = regs->tx_hdr1;
usr/src/uts/sun4/io/px/px_fm.c
705
adv_reg.pcie_ue_hdr[1] = regs->tx_hdr2;
usr/src/uts/sun4/io/px/px_fm.c
706
adv_reg.pcie_ue_hdr[2] = regs->tx_hdr3;
usr/src/uts/sun4/io/px/px_fm.c
707
adv_reg.pcie_ue_hdr[3] = regs->tx_hdr4;
usr/src/uts/sun4/io/px/px_fm.h
127
px_err_pcie_t *regs, pf_intr_type_t intr_type);
usr/src/uts/sun4/os/dtrace_subr.c
118
int (*dtrace_return_probe_ptr)(struct regs *);
usr/src/uts/sun4/os/dtrace_subr.c
121
dtrace_return_probe(struct regs *rp)
usr/src/uts/sun4/os/dtrace_subr.c
178
struct regs *rp = lwptoregs(ttolwp(t));
usr/src/uts/sun4/os/dtrace_subr.c
202
struct regs *rp = lwptoregs(ttolwp(t));
usr/src/uts/sun4/os/dtrace_subr.c
75
int (*dtrace_pid_probe_ptr)(struct regs *);
usr/src/uts/sun4/os/dtrace_subr.c
78
dtrace_pid_probe(struct regs *rp)
usr/src/uts/sun4/os/intr.c
336
no_ivintr(struct regs *rp, int inum, int pil)
usr/src/uts/sun4/os/machdep.c
673
kdi_kernpanic(struct regs *regs, uint_t tt)
usr/src/uts/sun4/os/machdep.c
675
sync_reg_buf = *regs;
usr/src/uts/sun4/os/mlsetup.c
122
mlsetup(struct regs *rp, kfpu_t *fp)
usr/src/uts/sun4/os/startup.c
604
struct regs sync_reg_buf;
usr/src/uts/sun4/os/trap.c
1233
struct regs *rp,
usr/src/uts/sun4/os/trap.c
1350
fpu_trap(struct regs *rp, caddr_t addr, uint32_t type, uint32_t code)
usr/src/uts/sun4/os/trap.c
139
trap(struct regs *rp, caddr_t addr, uint32_t type, uint32_t mmu_fsr)
usr/src/uts/sun4/os/trap.c
1603
nfload(struct regs *rp, int *instrp)
usr/src/uts/sun4/os/trap.c
1686
swap_nc(struct regs *rp, int instr)
usr/src/uts/sun4/os/trap.c
1714
ldstub_nc(struct regs *rp, int instr)
usr/src/uts/sun4/os/trap.c
1893
get_accesstype(struct regs *rp)
usr/src/uts/sun4/os/trap.c
1942
trap_async_berr_bto(int type, struct regs *rp)
usr/src/uts/sun4/os/trap.c
68
int vis1_partial_support(struct regs *rp, k_siginfo_t *siginfo, uint_t *fault);
usr/src/uts/sun4/os/trap.c
71
void showregs(unsigned, struct regs *, caddr_t, uint_t);
usr/src/uts/sun4/os/trap.c
77
void trap_async_berr_bto(int, struct regs *);
usr/src/uts/sun4/os/trap.c
80
static enum seg_rw get_accesstype(struct regs *);
usr/src/uts/sun4/os/trap.c
81
static int nfload(struct regs *, int *);
usr/src/uts/sun4/os/trap.c
82
static int swap_nc(struct regs *, int);
usr/src/uts/sun4/os/trap.c
83
static int ldstub_nc(struct regs *, int);
usr/src/uts/sun4/os/trap.c
84
void trap_cleanup(struct regs *, uint_t, k_siginfo_t *, int);
usr/src/uts/sun4/os/trap.c
88
die(unsigned type, struct regs *rp, caddr_t addr, uint_t mmu_fsr)
usr/src/uts/sun4/os/visinstr.c
1189
struct regs *pregs, /* Pointer to PCB image of registers. */
usr/src/uts/sun4/os/visinstr.c
1373
struct regs *pregs, /* Pointer to PCB image of registers. */
usr/src/uts/sun4/os/visinstr.c
1433
struct regs *pregs, /* Pointer to PCB image of registers. */
usr/src/uts/sun4/os/visinstr.c
1595
struct regs *pregs, /* Pointer to PCB image of registers. */
usr/src/uts/sun4/os/visinstr.c
1714
struct regs *pregs, /* Pointer to PCB image of registers. */
usr/src/uts/sun4/os/visinstr.c
1829
struct regs *pregs, /* Pointer to PCB image of registers. */
usr/src/uts/sun4/os/visinstr.c
1853
struct regs *pregs, /* Pointer to PCB image of registers. */
usr/src/uts/sun4/os/visinstr.c
374
struct regs *pregs, /* Pointer to PCB image of registers. */
usr/src/uts/sun4/os/visinstr.c
47
static enum ftt_type vis_array(fp_simd_type *, vis_inst_type, struct regs *,
usr/src/uts/sun4/os/visinstr.c
50
struct regs *, void *, kfpu_t *);
usr/src/uts/sun4/os/visinstr.c
51
static enum ftt_type vis_edge(fp_simd_type *, vis_inst_type, struct regs *,
usr/src/uts/sun4/os/visinstr.c
55
static enum ftt_type vis_bmask(fp_simd_type *, vis_inst_type, struct regs *,
usr/src/uts/sun4/os/visinstr.c
551
struct regs *pregs, /* Pointer to PCB image of registers. */
usr/src/uts/sun4/os/visinstr.c
60
static enum ftt_type vis_fcmp(fp_simd_type *, vis_inst_type, struct regs *,
usr/src/uts/sun4/os/visinstr.c
616
struct regs *pregs, /* Pointer to PCB image of registers. */
usr/src/uts/sun4/os/visinstr.c
65
static enum ftt_type vis_pdist(fp_simd_type *, fp_inst_type, struct regs *,
usr/src/uts/sun4/os/visinstr.c
663
struct regs *pregs, /* Pointer to PCB image of registers. */
usr/src/uts/sun4/os/visinstr.c
67
static enum ftt_type vis_prtl_fst(fp_simd_type *, vis_inst_type, struct regs *,
usr/src/uts/sun4/os/visinstr.c
70
struct regs *, void *, uint_t);
usr/src/uts/sun4/os/visinstr.c
72
struct regs *, void *, uint_t);
usr/src/uts/sun4/os/visinstr.c
797
struct regs *pregs, /* Pointer to PCB image of registers. */
usr/src/uts/sun4/os/visinstr.c
82
struct regs *pregs, /* Pointer to PCB image of registers. */
usr/src/uts/sun4/sys/fpras.h
87
struct regs;
usr/src/uts/sun4/sys/fpras.h
88
extern int fpras_chktrap(struct regs *);
usr/src/uts/sun4/sys/xc_impl.h
46
extern void xc_stop(struct regs *);
usr/src/uts/sun4u/cherrystone/os/cherrystone.c
352
uint32_t regs[4];
usr/src/uts/sun4u/cherrystone/os/cherrystone.c
381
if (prom_getprop(nodeid, "reg", (caddr_t)regs) < 0)
usr/src/uts/sun4u/cherrystone/os/cherrystone.c
383
mc_addr = ((uint64_t)regs[0]) << 32;
usr/src/uts/sun4u/cherrystone/os/cherrystone.c
384
mc_addr |= (uint64_t)regs[1];
usr/src/uts/sun4u/cpu/opl_olympus.c
1863
opl_cpu_isync_tl0_error(struct regs *rp, ulong_t p_sfar, ulong_t p_sfsr)
usr/src/uts/sun4u/cpu/opl_olympus.c
1873
opl_cpu_isync_tl1_error(struct regs *rp, ulong_t p_sfar, ulong_t p_sfsr)
usr/src/uts/sun4u/cpu/opl_olympus.c
1883
opl_cpu_dsync_tl0_error(struct regs *rp, ulong_t p_sfar, ulong_t p_sfsr)
usr/src/uts/sun4u/cpu/opl_olympus.c
1893
opl_cpu_dsync_tl1_error(struct regs *rp, ulong_t p_sfar, ulong_t p_sfsr)
usr/src/uts/sun4u/cpu/opl_olympus.c
1909
opl_cpu_sync_error(struct regs *rp, ulong_t t_sfar, ulong_t t_sfsr,
usr/src/uts/sun4u/cpu/opl_olympus.c
2106
opl_cpu_urgent_error(struct regs *rp, ulong_t p_ugesr, ulong_t tl)
usr/src/uts/sun4u/cpu/opl_olympus.c
75
static void opl_cpu_sync_error(struct regs *, ulong_t, ulong_t, uint_t, uint_t);
usr/src/uts/sun4u/cpu/spitfire.c
1243
cpu_async_error(struct regs *rp, ulong_t p_afar, ulong_t p_afsr,
usr/src/uts/sun4u/cpu/spitfire.c
810
cpu_ce_error(struct regs *rp, ulong_t p_afar, ulong_t p_afsr,
usr/src/uts/sun4u/cpu/us3_cheetahplus.c
974
cpu_tlb_parity_error(struct regs *rp, ulong_t trap_va, ulong_t tlb_info) {
usr/src/uts/sun4u/cpu/us3_common.c
1309
cpu_fast_ecc_error(struct regs *rp, ulong_t p_clo_flags)
usr/src/uts/sun4u/cpu/us3_common.c
1505
cpu_tl1_error(struct regs *rp, int panic)
usr/src/uts/sun4u/cpu/us3_common.c
1596
cpu_tl1_err_panic(struct regs *rp, ulong_t flags)
usr/src/uts/sun4u/cpu/us3_common.c
1630
cpu_disrupting_error(struct regs *rp, ulong_t p_clo_flags)
usr/src/uts/sun4u/cpu/us3_common.c
1738
cpu_deferred_error(struct regs *rp, ulong_t p_clo_flags)
usr/src/uts/sun4u/cpu/us3_common.c
2084
cpu_parity_error(struct regs *rp, uint_t flags, caddr_t tpc)
usr/src/uts/sun4u/cpu/us3_common.c
6951
fpras_chktrap(struct regs *rp)
usr/src/uts/sun4u/daktari/os/daktari.c
343
uint32_t regs[4];
usr/src/uts/sun4u/daktari/os/daktari.c
372
if (prom_getprop(nodeid, "reg", (caddr_t)regs) < 0)
usr/src/uts/sun4u/daktari/os/daktari.c
374
mc_addr = ((uint64_t)regs[0]) << 32;
usr/src/uts/sun4u/daktari/os/daktari.c
375
mc_addr |= (uint64_t)regs[1];
usr/src/uts/sun4u/excalibur/io/xcalppm.c
246
unitp->regs.bbc_estar_ctrl = (uint16_t *)(base_addr +
usr/src/uts/sun4u/excalibur/io/xcalppm.c
248
unitp->regs.bbc_assert_change = (uint32_t *)(base_addr +
usr/src/uts/sun4u/excalibur/io/xcalppm.c
250
unitp->regs.bbc_pll_settle = (uint32_t *)(base_addr +
usr/src/uts/sun4u/excalibur/io/xcalppm.c
254
(caddr_t *)&unitp->regs.rio_mode_auxio,
usr/src/uts/sun4u/excalibur/io/xcalppm.c
260
unitp->regs.gpio_bank_sel_index = (uint8_t *)(base_addr +
usr/src/uts/sun4u/excalibur/io/xcalppm.c
262
unitp->regs.gpio_bank_sel_data = (uint8_t *)(base_addr +
usr/src/uts/sun4u/excalibur/io/xcalppm.c
268
unitp->regs.gpio_port1_data = (uint8_t *)(base_addr +
usr/src/uts/sun4u/excalibur/io/xcalppm.c
270
unitp->regs.gpio_port2_data = (uint8_t *)(base_addr +
usr/src/uts/sun4u/excalibur/io/xcalppm.c
291
unitp->regs.gpio_bank_sel_index, data8);
usr/src/uts/sun4u/excalibur/io/xcalppm.c
293
unitp->regs.gpio_bank_sel_data);
usr/src/uts/sun4u/excalibur/io/xcalppm.c
297
unitp->regs.gpio_bank_sel_data, data8);
usr/src/uts/sun4u/excalibur/io/xcalppm.c
400
unitp->regs.gpio_port1_data);
usr/src/uts/sun4u/excalibur/io/xcalppm.c
406
unitp->regs.gpio_port1_data, reg);
usr/src/uts/sun4u/excalibur/io/xcalppm.c
612
unitp->regs.gpio_port2_data);
usr/src/uts/sun4u/excalibur/io/xcalppm.c
628
unitp->regs.gpio_port2_data, data8);
usr/src/uts/sun4u/excalibur/io/xcalppm.c
748
unitp->regs.rio_mode_auxio);
usr/src/uts/sun4u/excalibur/io/xcalppm.c
754
unitp->regs.rio_mode_auxio, data32);
usr/src/uts/sun4u/excalibur/io/xcalppm.c
872
(caddr_t)unitp->regs.bbc_assert_change, data32);
usr/src/uts/sun4u/excalibur/io/xcalppm.c
878
(caddr_t)unitp->regs.bbc_pll_settle, data32);
usr/src/uts/sun4u/excalibur/io/xcalppm.c
884
(caddr_t)unitp->regs.bbc_estar_ctrl, data16);
usr/src/uts/sun4u/excalibur/sys/xcalppm_var.h
68
struct xcppmreg regs; /* register accessed by ppm */
usr/src/uts/sun4u/io/i2c/nexus/pcf8584.c
922
int32_t regs[2];
usr/src/uts/sun4u/io/i2c/nexus/pcf8584.c
941
len = sizeof (regs);
usr/src/uts/sun4u/io/i2c/nexus/pcf8584.c
944
"reg", (caddr_t)regs, &len);
usr/src/uts/sun4u/io/i2c/nexus/pcf8584.c
952
ppvt->pcf8584_ppvt_addr = regs[0];
usr/src/uts/sun4u/io/i2c/nexus/pcf8584.c
953
(void) sprintf(name, "%x", regs[0]);
usr/src/uts/sun4u/io/i2c/nexus/pcf8584.c
955
ppvt->pcf8584_ppvt_bus = regs[0];
usr/src/uts/sun4u/io/i2c/nexus/pcf8584.c
956
ppvt->pcf8584_ppvt_addr = regs[1];
usr/src/uts/sun4u/io/i2c/nexus/pcf8584.c
957
(void) sprintf(name, "%x,%x", regs[0], regs[1]);
usr/src/uts/sun4u/io/i2c/nexus/smbus.c
494
int32_t regs[2];
usr/src/uts/sun4u/io/i2c/nexus/smbus.c
512
len = sizeof (regs);
usr/src/uts/sun4u/io/i2c/nexus/smbus.c
515
"reg", (caddr_t)regs, &len);
usr/src/uts/sun4u/io/i2c/nexus/smbus.c
531
ppvt->smbus_ppvt_addr = regs[1];
usr/src/uts/sun4u/io/i2c/nexus/smbus.c
532
(void) sprintf(name, "%x", regs[1]);
usr/src/uts/sun4u/io/pmubus.c
631
pmubus_mask(pmubus_obpregspec_t *regs, int32_t rnumber,
usr/src/uts/sun4u/io/pmubus.c
638
if (regs[i].reg_addr_hi & 0x80000000)
usr/src/uts/sun4u/io/px/px_err.c
1973
px_err_pcie_t regs = {0};
usr/src/uts/sun4u/io/px/px_err.c
1980
regs.ue_reg = err_bit;
usr/src/uts/sun4u/io/px/px_err.c
1981
regs.primary_ue = err_bit;
usr/src/uts/sun4u/io/px/px_err.c
1990
regs.rx_hdr1 = (uint32_t)(log >> 32);
usr/src/uts/sun4u/io/px/px_err.c
1991
regs.rx_hdr2 = (uint32_t)(log & 0xFFFFFFFF);
usr/src/uts/sun4u/io/px/px_err.c
1995
regs.rx_hdr3 = (uint32_t)(log >> 32);
usr/src/uts/sun4u/io/px/px_err.c
1996
regs.rx_hdr4 = (uint32_t)(log & 0xFFFFFFFF);
usr/src/uts/sun4u/io/px/px_err.c
1999
regs.ue_reg = (uint32_t)BITMASK(err_bit_descr->bit - 32);
usr/src/uts/sun4u/io/px/px_err.c
2002
err = px_err_check_pcie(rpdip, derr, ®s, PF_INTR_TYPE_INTERNAL);
usr/src/uts/sun4u/io/px/px_err.c
2128
px_err_pcie_t regs = {0};
usr/src/uts/sun4u/io/px/px_err.c
2132
regs.ce_reg = (uint32_t)BITMASK(err_bit_descr->bit);
usr/src/uts/sun4u/io/px/px_err.c
2134
regs.ce_reg = (uint32_t)BITMASK(err_bit_descr->bit - 32);
usr/src/uts/sun4u/io/px/px_err.c
2136
err = px_err_check_pcie(rpdip, derr, ®s, PF_INTR_TYPE_INTERNAL);
usr/src/uts/sun4u/littleneck/io/pcf8574_lneck.c
503
int *regs;
usr/src/uts/sun4u/littleneck/io/pcf8574_lneck.c
543
"reg", (int **)®s, &len);
usr/src/uts/sun4u/littleneck/io/pcf8574_lneck.c
553
if (regs[0] == 0 && regs[1] == 0x7c) {
usr/src/uts/sun4u/littleneck/io/pcf8574_lneck.c
560
ddi_prop_free(regs);
usr/src/uts/sun4u/lw2plus/io/lombus.c
1882
int *regs;
usr/src/uts/sun4u/lw2plus/io/lombus.c
1910
DDI_PROP_DONTPASS, "reg", ®s, &nregs);
usr/src/uts/sun4u/lw2plus/io/lombus.c
1918
rsp = (lombus_regspec_t *)regs;
usr/src/uts/sun4u/lw2plus/io/lombus.c
1951
ddi_prop_free(regs);
usr/src/uts/sun4u/lw8/os/lw8_platmod.c
339
uint32_t regs[4];
usr/src/uts/sun4u/lw8/os/lw8_platmod.c
365
if (prom_getprop(nodeid, "reg", (caddr_t)regs) < 0)
usr/src/uts/sun4u/lw8/os/lw8_platmod.c
367
mc_addr = ((uint64_t)regs[0]) << 32;
usr/src/uts/sun4u/lw8/os/lw8_platmod.c
368
mc_addr |= (uint64_t)regs[1];
usr/src/uts/sun4u/opl/io/drmach.c
3935
drmach_copy_rename_slave(struct regs *rp, drmachid_t id)
usr/src/uts/sun4u/os/mach_trap.c
40
void showregs(unsigned, struct regs *, caddr_t, uint_t);
usr/src/uts/sun4u/os/mach_trap.c
99
showregs(uint_t type, struct regs *rp, caddr_t addr, uint_t mmu_fsr)
usr/src/uts/sun4u/serengeti/io/sbdp.c
290
regspace_t regs[3];
usr/src/uts/sun4u/serengeti/io/sbdp.c
315
if (prom_getprop(nodeid, "reg", (caddr_t)regs) < 0) {
usr/src/uts/sun4u/serengeti/io/sbdp.c
321
if ((regs[0].regspec_addr_lo & 0x700000) ==
usr/src/uts/sun4u/serengeti/io/sbdp.c
327
if ((regs[0].regspec_addr_lo & 0x700000) ==
usr/src/uts/sun4u/serengeti/io/sbdp_mem.c
1776
mc_regs_t regs;
usr/src/uts/sun4u/serengeti/io/sbdp_mem.c
1780
if (mc_read_regs(node, ®s) == -1)
usr/src/uts/sun4u/serengeti/io/sbdp_mem.c
1783
mc_decode = regs.mc_decode;
usr/src/uts/sun4u/serengeti/io/sbdp_mem.c
593
mc_regs_t regs;
usr/src/uts/sun4u/serengeti/io/sbdp_mem.c
596
if (mc_read_regs(node, ®s)) {
usr/src/uts/sun4u/serengeti/io/sbdp_mem.c
602
mc_decode = regs.mc_decode;
usr/src/uts/sun4u/serengeti/io/sbdp_mem.c
785
mc_regs_t regs;
usr/src/uts/sun4u/serengeti/io/sbdp_mem.c
826
if (mc_read_regs(memnodes[i], ®s)) {
usr/src/uts/sun4u/serengeti/io/sbdp_mem.c
833
uint64_t mc_decode = regs.mc_decode[j];
usr/src/uts/sun4u/serengeti/os/serengeti.c
332
uint32_t regs[4];
usr/src/uts/sun4u/serengeti/os/serengeti.c
358
if (prom_getprop(nodeid, "reg", (caddr_t)regs) < 0)
usr/src/uts/sun4u/serengeti/os/serengeti.c
360
mc_addr = ((uint64_t)regs[0]) << 32;
usr/src/uts/sun4u/serengeti/os/serengeti.c
361
mc_addr |= (uint64_t)regs[1];
usr/src/uts/sun4u/sys/machsystm.h
123
extern struct regs sync_reg_buf;
usr/src/uts/sun4u/sys/machsystm.h
130
struct regs;
usr/src/uts/sun4u/sys/machsystm.h
131
extern void trap(struct regs *rp, caddr_t addr, uint32_t type,
usr/src/uts/sun4u/sys/machsystm.h
139
struct regs *trap_regs;
usr/src/uts/sun4u/sys/us3_module.h
570
extern void cpu_fast_ecc_error(struct regs *rp, ulong_t p_clo_flags);
usr/src/uts/sun4u/sys/us3_module.h
571
extern void cpu_tl1_error(struct regs *rp, int panic);
usr/src/uts/sun4u/sys/us3_module.h
572
extern void cpu_tl1_err_panic(struct regs *rp, ulong_t flags);
usr/src/uts/sun4u/sys/us3_module.h
573
extern void cpu_disrupting_error(struct regs *rp, ulong_t p_clo_flags);
usr/src/uts/sun4u/sys/us3_module.h
574
extern void cpu_deferred_error(struct regs *rp, ulong_t p_clo_flags);
usr/src/uts/sun4u/sys/us3_module.h
576
extern void cpu_parity_error(struct regs *rp, uint_t flags, caddr_t tpc);
usr/src/uts/sun4u/sys/us3_module.h
585
extern void cpu_tlb_parity_error(struct regs *rp, ulong_t trap_va,
usr/src/uts/sun4v/cpu/generic.c
228
vis1_partial_support(struct regs *rp, k_siginfo_t *siginfo, uint_t *fault)
usr/src/uts/sun4v/cpu/niagara.c
269
vis1_partial_support(struct regs *rp, k_siginfo_t *siginfo, uint_t *fault)
usr/src/uts/sun4v/os/error.c
110
process_resumable_error(struct regs *rp, uint32_t head_offset,
usr/src/uts/sun4v/os/error.c
214
process_nonresumable_error(struct regs *rp, uint64_t flags,
usr/src/uts/sun4v/os/error.c
438
errh_error_protected(struct regs *rp, struct async_flt *aflt, int *expected)
usr/src/uts/sun4v/os/error.c
714
rq_overflow(struct regs *rp, uint64_t head_offset,
usr/src/uts/sun4v/os/error.c
840
nrq_overflow(struct regs *rp)
usr/src/uts/sun4v/os/error.c
98
static int errh_error_protected(struct regs *, struct async_flt *, int *);
usr/src/uts/sun4v/os/mach_trap.c
40
void showregs(unsigned, struct regs *, caddr_t, uint_t);
usr/src/uts/sun4v/os/mach_trap.c
84
showregs(uint_t type, struct regs *rp, caddr_t addr, uint_t mmu_fsr)
usr/src/uts/sun4v/sys/machsystm.h
121
extern struct regs sync_reg_buf;
usr/src/uts/sun4v/sys/machsystm.h
128
struct regs;
usr/src/uts/sun4v/sys/machsystm.h
129
extern void trap(struct regs *rp, caddr_t addr, uint32_t type,
usr/src/uts/sun4v/sys/machsystm.h
137
struct regs *trap_regs;
