intr_info
pcitool_intr_info_t intr_info;
intr_info.flags = PCITOOL_INTR_FLAG_GET_MSI;
if (ioctl(fd, PCITOOL_SYSTEM_INTR_INFO, &intr_info) != 0) {
((msi < intr_info.num_intr) && (rval == SUCCESS));
pcitool_intr_info_t intr_info;
intr_info.flags = 0;
if (ioctl(fd, PCITOOL_SYSTEM_INTR_INFO, &intr_info) != 0) {
if (intr_info.ctlr_type == PCITOOL_CTLR_TYPE_APIX) {
((cpu_id < intr_info.num_cpu) && (rval == SUCCESS));
((ino < intr_info.num_intr) &&
(ino < intr_info.num_intr) && (rval == SUCCESS);
pcitool_intr_info_t intr_info;
intr_info.flags = 0;
if (ioctl(fd, PCITOOL_SYSTEM_INTR_INFO, &intr_info) != 0) {
switch (intr_info.ctlr_type) {
intr_info.ctlr_type);
if (intr_info.ctlr_type == PCITOOL_CTLR_TYPE_PCPLUSMP)
PSMAT_IO_APIC_VER(intr_info.ctlr_version),
PSMAT_LOCAL_APIC_VER(intr_info.ctlr_version));
((intr_info.ctlr_version >> 24) & 0xff),
((intr_info.ctlr_version >> 16) & 0xff),
((intr_info.ctlr_version >> 8) & 0xff),
(intr_info.ctlr_version & 0xff));
const struct intr_info *acts)
static const struct intr_info sysbus_intr_info[] = {
static const struct intr_info pcie_port_intr_info[] = {
static const struct intr_info pcie_intr_info[] = {
static struct intr_info t5_pcie_intr_info[] = {
static const struct intr_info tp_intr_info[] = {
static const struct intr_info sge_intr_info[] = {
static struct intr_info t4t5_sge_intr_info[] = {
static struct intr_info t6_sge_intr_info[] = {
static const struct intr_info cim_intr_info[] = {
static const struct intr_info cim_upintr_info[] = {
static const struct intr_info ulprx_intr_info[] = {
static const struct intr_info ulptx_intr_info[] = {
static const struct intr_info pmtx_intr_info[] = {
static const struct intr_info pmrx_intr_info[] = {
static const struct intr_info cplsw_intr_info[] = {
static const struct intr_info le_intr_info[] = {
static struct intr_info t6_le_intr_info[] = {
static const struct intr_info mps_rx_intr_info[] = {
static const struct intr_info mps_tx_intr_info[] = {
static const struct intr_info t6_mps_tx_intr_info[] = {
static const struct intr_info mps_trc_intr_info[] = {
static const struct intr_info mps_stat_sram_intr_info[] = {
static const struct intr_info mps_stat_tx_intr_info[] = {
static const struct intr_info mps_stat_rx_intr_info[] = {
static const struct intr_info mps_cls_intr_info[] = {
static const struct intr_info smb_intr_info[] = {
static const struct intr_info ncsi_intr_info[] = {
static const struct intr_info pl_perr_info[] = {
static const struct intr_info pl_intr_info[] = {
static struct intr_info t5_pl_intr_info[] = {
pcitool_intr_info_t intr_info;
err = ldi_ioctl(lh, PCITOOL_SYSTEM_INTR_INFO, (intptr_t)&intr_info,
for (oldcpuid = 0; oldcpuid < intr_info.num_cpu; oldcpuid++) {
for (ino = 0; ino < intr_info.num_intr; ino++) {
apic_get_intr_t intr_info;
intr_info.avgi_dip_list = NULL;
intr_info.avgi_req_flags =
info_hdl.ih_private = &intr_info;
intr_info.avgi_req_flags |= PSMGI_REQ_GET_DEVS;
if (intr_info.avgi_req_flags & PSMGI_REQ_GET_DEVS) {
if (intr_info.avgi_cpu_id == IRQ_UNBOUND ||
intr_info.avgi_cpu_id == IRQ_UNINIT)
iget->cpu_id = intr_info.avgi_cpu_id & ~PSMGI_CPU_USER_BOUND;
iget->num_devs = intr_info.avgi_num_devs;
if (intr_info.avgi_req_flags & PSMGI_REQ_GET_DEVS) {
iget->num_devs_ret = min(num_devs_ret, intr_info.avgi_num_devs);
pcitool_get_intr_dev_info(intr_info.avgi_dip_list[i],
kmem_free(intr_info.avgi_dip_list,
intr_info.avgi_num_devs * sizeof (dev_info_t *));
if (intr_info.avgi_req_flags & PSMGI_REQ_GET_DEVS) {
pcitool_intr_info_t intr_info;
if (ddi_copyin(arg, &intr_info, sizeof (pcitool_intr_info_t), mode) !=
if (intr_info.flags & PCITOOL_INTR_FLAG_GET_MSI)
intr_info.ctlr_type = PCITOOL_CTLR_TYPE_UPPC;
intr_info.ctlr_version = 0;
intr_info.num_intr = APIC_MAX_VECTOR;
intr_info.ctlr_version = (uint32_t)info_hdl.ih_ver;
intr_info.num_cpu = type_info.avgi_num_cpu;
intr_info.ctlr_type = PCITOOL_CTLR_TYPE_PCPLUSMP;
intr_info.num_intr = type_info.avgi_num_intr;
intr_info.ctlr_type = PCITOOL_CTLR_TYPE_APIX;
intr_info.num_intr = type_info.avgi_num_intr;
intr_info.ctlr_type = PCITOOL_CTLR_TYPE_UNKNOWN;
intr_info.num_intr = APIC_MAX_VECTOR;
intr_info.drvr_version = PCITOOL_VERSION;
if (ddi_copyout(&intr_info, arg, sizeof (pcitool_intr_info_t), mode) !=
uint32_t idtvec_info, intr_info;
intr_info = vmcs_read(VMCS_EXIT_INTR_INFO);
vmx, vcpu, vmexit, intr_info);
if (!(intr_info & VMCS_INTR_VALID))
KASSERT((intr_info & VMCS_INTR_VALID) != 0 &&
(intr_info & VMCS_INTR_T_MASK) == VMCS_INTR_T_HWINTR,
("VM exit interruption info invalid: %x", intr_info));
vmx_trigger_hostintr(intr_info & 0xff);
intr_info = vmcs_read(VMCS_EXIT_INTR_INFO);
KASSERT((intr_info & VMCS_INTR_VALID) != 0,
("VM exit interruption info invalid: %x", intr_info));
intr_vec = intr_info & 0xff;
intr_type = intr_info & VMCS_INTR_T_MASK;
(intr_info & EXIT_QUAL_NMIUDTI) != 0)
if (intr_info & VMCS_INTR_DEL_ERRCODE) {
uint32_t intr_info = vmcs_read(VMCS_EXIT_INTR_INFO);
ASSERT(intr_info & VMCS_INTR_VALID);
if ((intr_info & VMCS_INTR_T_MASK) == VMCS_INTR_T_NMI) {
ASSERT3U(intr_info & 0xff, ==, IDT_NMI);
pcitool_intr_info_t intr_info;
if (ddi_copyin(arg, &intr_info, sizeof (pcitool_intr_info_t), mode) !=
intr_info.ctlr_version = 0; /* XXX how to get real version? */
intr_info.ctlr_type = PCITOOL_CTLR_TYPE_RISC;
if (intr_info.flags & PCITOOL_INTR_FLAG_GET_MSI)
intr_info.num_intr = msi_state_p->msi_cnt;
intr_info.num_intr = pxtool_num_inos;
intr_info.drvr_version = PCITOOL_VERSION;
if (ddi_copyout(&intr_info, arg, sizeof (pcitool_intr_info_t), mode) !=
pcitool_intr_info_t intr_info;
if (ddi_copyin(arg, &intr_info, sizeof (pcitool_intr_info_t), mode) !=
if (intr_info.flags & PCITOOL_INTR_FLAG_GET_MSI)
intr_info.ctlr_version = 0; /* XXX how to get real version? */
intr_info.ctlr_type = PCITOOL_CTLR_TYPE_RISC;
intr_info.num_intr = PCI_MAX_INO;
intr_info.drvr_version = PCITOOL_VERSION;
if (ddi_copyout(&intr_info, arg, sizeof (pcitool_intr_info_t), mode) !=
struct sbus_wrapper_arg *intr_info;
intr_info = (struct sbus_wrapper_arg *)arg;
spurious_cntr = &intr_info->softsp->spurious_cntrs[intr_info->pil];
intr_handler = intr_info->handler_list;
tmpreg = *intr_info->softsp->sbus_ctrl_reg;
*intr_info->clear_reg = tmpreg;
tmpreg = *intr_info->softsp->sbus_ctrl_reg;
else if (intr_info->pil >= LOCK_LEVEL) {
intr_info->pil);
struct fhc_wrapper_arg *intr_info = (struct fhc_wrapper_arg *)arg;
uint_t (*funcp)(caddr_t, caddr_t) = intr_info->funcp;
caddr_t iarg1 = intr_info->arg1;
caddr_t iarg2 = intr_info->arg2;
dev_info_t *dip = intr_info->child;
*(intr_info->clear_reg) = tmpreg;
tmpreg = *(intr_info->clear_reg);
pcitool_intr_info_t intr_info;
if (ddi_copyin(arg, &intr_info, sizeof (pcitool_intr_info_t), mode) !=
intr_info.ctlr_version = 0; /* XXX how to get real version? */
intr_info.ctlr_type = PCITOOL_CTLR_TYPE_RISC;
if (intr_info.flags & PCITOOL_INTR_FLAG_GET_MSI)
intr_info.num_intr = 0;
intr_info.num_intr = NIUMX_MAX_INTRS;
intr_info.drvr_version = PCITOOL_VERSION;
if (ddi_copyout(&intr_info, arg, sizeof (pcitool_intr_info_t), mode) !=