e1000_write_phy_reg
static int e1000_write_phy_reg(struct e1000_hw *hw, uint32_t reg_addr, uint16_t phy_data);
if((ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_EXT_CTRL,
if((ret_val = e1000_write_phy_reg(hw, IGP01E1000_PHY_PORT_CTRL,
if((ret_val = e1000_write_phy_reg(hw,
if((ret_val = e1000_write_phy_reg(hw, PHY_1000T_CTRL,
if((ret_val = e1000_write_phy_reg(hw, PHY_1000T_CTRL,
if((ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL,
if((ret_val = e1000_write_phy_reg(hw,
if((ret_val = e1000_write_phy_reg(hw, PHY_CTRL, phy_data)))
if((ret_val = e1000_write_phy_reg(hw, PHY_AUTONEG_ADV,
if((ret_val = e1000_write_phy_reg(hw, PHY_1000T_CTRL, mii_1000t_ctrl_reg)))
if((ret_val = e1000_write_phy_reg(hw, PHY_CTRL, phy_data)))
e1000_write_phy_reg(hw,0x0000,0x0140);
e1000_write_phy_reg(hw, 0x1F95, 0x0001);
e1000_write_phy_reg(hw, 0x1F71, 0xBD21);
e1000_write_phy_reg(hw, 0x1F79, 0x0018);
e1000_write_phy_reg(hw, 0x1F30, 0x1600);
e1000_write_phy_reg(hw, 0x1F31, 0x0014);
e1000_write_phy_reg(hw, 0x1F32, 0x161C);
e1000_write_phy_reg(hw, 0x1F94, 0x0003);
e1000_write_phy_reg(hw, 0x1F96, 0x003F);
e1000_write_phy_reg(hw, 0x2010, 0x0008);
e1000_write_phy_reg(hw, 0x1F73, 0x0099);
e1000_write_phy_reg(hw, 0x0000, 0x3300);
e1000_write_phy_reg(hw, IGP01E1000_ANALOG_FUSE_CONTROL, fused);
e1000_write_phy_reg(hw, IGP01E1000_ANALOG_FUSE_BYPASS,
s32 e1000_write_phy_reg(struct e1000_hw *hw, u32 offset, u16 data);
(void) e1000_write_phy_reg(hw,
(void) e1000_write_phy_reg(hw,
(void) e1000_write_phy_reg(hw,
(void) e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_ctrl);
(void) e1000_write_phy_reg(hw, PHY_CONTROL, phy_ctrl);
(void) e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, 0x0808);
(void) e1000_write_phy_reg(hw, PHY_CONTROL,
(void) e1000_write_phy_reg(hw, PHY_CONTROL,
(void) e1000_write_phy_reg(hw, 29, 0x001F);
(void) e1000_write_phy_reg(hw, 30, 0x8FFC);
(void) e1000_write_phy_reg(hw, 29, 0x001A);
(void) e1000_write_phy_reg(hw, 30, 0x8FF0);
(void) e1000_write_phy_reg(hw, GG82563_PHY_KMRN_MODE_CTRL,
(void) e1000_write_phy_reg(hw, GG82563_PHY_MAC_SPEC_CTRL,
(void) e1000_write_phy_reg(hw, PHY_REG(2, 21), phy_reg);
(void) e1000_write_phy_reg(hw, PHY_REG(769, 16),
(void) e1000_write_phy_reg(hw, PHY_REG(776, 16),
(void) e1000_write_phy_reg(hw, PHY_REG(769, 16),
(void) e1000_write_phy_reg(hw, PHY_REG(769, 20),
(void) e1000_write_phy_reg(hw, PHY_CONTROL, phy_ctrl | MII_CR_LOOPBACK);
(void) e1000_write_phy_reg(hw, 0x0, 0x140);
(void) e1000_write_phy_reg(hw, 0x9, 0x1A00);
(void) e1000_write_phy_reg(hw, 0x12, 0xC10);
(void) e1000_write_phy_reg(hw, 0x12, 0x1C10);
(void) e1000_write_phy_reg(hw, 0x1F37, 0x76);
(void) e1000_write_phy_reg(hw, 0x1F33, 0x1);
(void) e1000_write_phy_reg(hw, 0x1F33, 0x0);
(void) e1000_write_phy_reg(hw, 0x1F35, 0x65);
(void) e1000_write_phy_reg(hw, 0x1837, 0x3F7C);
(void) e1000_write_phy_reg(hw, 0x1437, 0x3FDC);
(void) e1000_write_phy_reg(hw, 0x1237, 0x3F7C);
(void) e1000_write_phy_reg(hw, 0x1137, 0x3FDC);
(void) e1000_write_phy_reg(hw, GG82563_REG(6, 16),
(void) e1000_write_phy_reg(hw, PHY_CONTROL,
(void) e1000_write_phy_reg(hw, PHY_CONTROL,
(void) e1000_write_phy_reg(hw, PHY_CONTROL,
(void) e1000_write_phy_reg(hw, PHY_CONTROL,
(void) e1000_write_phy_reg(hw, offset, reg);
(void) e1000_write_phy_reg(hw, PHY_REG(770, 26), phy_data);
(void) e1000_write_phy_reg(hw, 0x10, 0x2823);
(void) e1000_write_phy_reg(hw, 0x11, 0x0003);
(void) e1000_write_phy_reg(hw, 22, phy_data);
(void) e1000_write_phy_reg(hw, 0x0, 0x0140);
(void) e1000_write_phy_reg(hw, 0x9, 0x1a00);
(void) e1000_write_phy_reg(hw, 0x12, 0x1610);
(void) e1000_write_phy_reg(hw, 0x1f37, 0x3f1c);
(void) e1000_write_phy_reg(hw, PHY_CONTROL, phy_ctrl);
(void) e1000_write_phy_reg(hw, 0x10, phy_pconf);