CHIP_REV_SHIFT
#define CHIP_REV_SIM(_p) (((0xF - (CHIP_REV(_p) >> CHIP_REV_SHIFT)) \
>>1) << CHIP_REV_SHIFT)
#define CHIP_REV_MASK (0xF<<CHIP_REV_SHIFT)
#define CHIP_REV_Ax (0x0<<CHIP_REV_SHIFT)
#define CHIP_REV_Bx (0x1<<CHIP_REV_SHIFT)
chip_rev = (val & 0xF)<<CHIP_REV_SHIFT;
#define CHIP_REV_SHIFT 12
#define CHIP_REV_MASK (0xF<<CHIP_REV_SHIFT)
#define CHIP_REV_Ax (0x0<<CHIP_REV_SHIFT)
#define CHIP_REV_Bx (0x1<<CHIP_REV_SHIFT)
#define CHIP_REV_Cx (0x2<<CHIP_REV_SHIFT)
#define CHIP_REV_SIM_IS_FPGA (0x1<<CHIP_REV_SHIFT)
#define CHIP_REV_ASIC_MAX (0x5<<CHIP_REV_SHIFT)
#define CHIP_REV_SIM(_p) ((0xF - (CHIP_REV(_p)>>CHIP_REV_SHIFT))>>1)<<CHIP_REV_SHIFT //For EMUL: Ax=0xE, Bx=0xC, Cx=0xA. For FPGA: Ax=0xF, Bx=0xD, Cx=0xB.