Symbol: PCI_CONF_CACHE_LINESZ
usr/src/cmd/pcitool/pcitool.c
266
{ PCI_CONF_CACHE_LINESZ, 1, "Ca", "Cache Line Size" },
usr/src/uts/common/io/arn/arn_main.c
2509
csz = pci_config_get8(sc->sc_cfg_handle, PCI_CONF_CACHE_LINESZ);
usr/src/uts/common/io/arn/arn_main.c
2517
pci_config_put8(sc->sc_cfg_handle, PCI_CONF_CACHE_LINESZ,
usr/src/uts/common/io/arn/arn_main.c
2854
pci_config_get8(sc->sc_cfg_handle, PCI_CONF_CACHE_LINESZ)));
usr/src/uts/common/io/ath/ath_main.c
2017
csz = pci_config_get8(asc->asc_cfg_handle, PCI_CONF_CACHE_LINESZ);
usr/src/uts/common/io/ath/ath_main.c
2025
pci_config_put8(asc->asc_cfg_handle, PCI_CONF_CACHE_LINESZ,
usr/src/uts/common/io/bge/bge_chip2.c
379
cidp->clsize = pci_config_get8(handle, PCI_CONF_CACHE_LINESZ);
usr/src/uts/common/io/bge/bge_chip2.c
4115
pci_config_put8(bgep->cfg_handle, PCI_CONF_CACHE_LINESZ,
usr/src/uts/common/io/cardbus/cardbus.c
1167
pci_config_put8(config_handle, PCI_CONF_CACHE_LINESZ,
usr/src/uts/common/io/cardbus/cardbus.c
1169
n = pci_config_get8(config_handle, PCI_CONF_CACHE_LINESZ);
usr/src/uts/common/io/cardbus/cardbus_cfg.c
3723
PCI_CONF_CACHE_LINESZ)) != 0) {
usr/src/uts/common/io/cardbus/cardbus_cfg.c
4334
pci_config_get8(config_handle, PCI_CONF_CACHE_LINESZ),
usr/src/uts/common/io/e1000g/e1000g_debug.c
407
pci_config_get8(handle, PCI_CONF_CACHE_LINESZ));
usr/src/uts/common/io/fibre-channel/fca/qlc/ql_api.c
16336
PCI_CONF_CACHE_LINESZ);
usr/src/uts/common/io/fibre-channel/fca/qlc/ql_api.c
16400
ql_pci_config_put8(ha, PCI_CONF_CACHE_LINESZ,
usr/src/uts/common/io/fibre-channel/fca/qlc/ql_init.c
2675
ql_pci_config_put8(ha->pha, PCI_CONF_CACHE_LINESZ, 1);
usr/src/uts/common/io/fibre-channel/fca/qlc/ql_init.c
342
ql_pci_config_put8(ha, PCI_CONF_CACHE_LINESZ, 0x10);
usr/src/uts/common/io/fibre-channel/fca/qlge/qlge_dbg.c
655
pci_config_get8(qlge->pci_handle, PCI_CONF_CACHE_LINESZ);
usr/src/uts/common/io/igb/igb_debug.c
87
pci_config_get8(handle, PCI_CONF_CACHE_LINESZ));
usr/src/uts/common/io/iwh/iwh.c
599
(uint16_t *)(sc->sc_cfg_base + PCI_CONF_CACHE_LINESZ));
usr/src/uts/common/io/iwk/iwk2.c
532
(uint16_t *)(sc->sc_cfg_base + PCI_CONF_CACHE_LINESZ));
usr/src/uts/common/io/iwp/iwp.c
560
(uint16_t *)(sc->sc_cfg_base + PCI_CONF_CACHE_LINESZ));
usr/src/uts/common/io/ixgbe/ixgbe_debug.c
212
pci_config_get8(handle, PCI_CONF_CACHE_LINESZ));
usr/src/uts/common/io/mwl/mwl.c
3866
(uint8_t *)(sc->sc_cfg_base + PCI_CONF_CACHE_LINESZ));
usr/src/uts/common/io/nge/nge_chip.c
1028
pci_config_put8(ngep->cfg_handle, PCI_CONF_CACHE_LINESZ,
usr/src/uts/common/io/nge/nge_chip.c
613
PCI_CONF_CACHE_LINESZ);
usr/src/uts/common/io/pciex/pcieb.c
2156
pci_config_put8(cfg_hdl, PCI_CONF_CACHE_LINESZ,
usr/src/uts/common/io/pciex/pcieb.c
2158
n = pci_config_get8(cfg_hdl, PCI_CONF_CACHE_LINESZ);
usr/src/uts/common/io/ral/rt2560.c
2394
cachelsz = ddi_get8(ioh, (uint8_t *)(regs + PCI_CONF_CACHE_LINESZ));
usr/src/uts/common/io/rge/rge_chip.c
765
cidp->clsize = pci_config_get8(handle, PCI_CONF_CACHE_LINESZ);
usr/src/uts/common/io/rtw/rtw.c
3172
(uint8_t *)(rsc->sc_cfg_base + PCI_CONF_CACHE_LINESZ));
usr/src/uts/common/io/rwd/rt2661.c
2866
(uint8_t *)(sc->sc_cfg_base + PCI_CONF_CACHE_LINESZ));
usr/src/uts/common/io/rwn/rt2860.c
2865
(uint8_t *)(sc->sc_cfg_base + PCI_CONF_CACHE_LINESZ));
usr/src/uts/common/io/scsi/adapters/pmcs/pmcs_fwlog.c
749
pci_config_get32(pwp->pci_acc_handle, PCI_CONF_CACHE_LINESZ));
usr/src/uts/common/io/wpi/wpi.c
461
(uint16_t *)(cfg_base + PCI_CONF_CACHE_LINESZ));
usr/src/uts/common/io/yge/yge.c
736
if (pci_config_get8(pcih, PCI_CONF_CACHE_LINESZ) == 0)
usr/src/uts/common/io/yge/yge.c
737
pci_config_put16(pcih, PCI_CONF_CACHE_LINESZ, 2);
usr/src/uts/common/io/yge/yge.c
741
if (pci_config_get8(pcih, PCI_CONF_CACHE_LINESZ) == 0)
usr/src/uts/common/io/yge/yge.c
742
pci_config_put16(pcih, PCI_CONF_CACHE_LINESZ, 2);
usr/src/uts/common/os/sunpci.c
412
PCI_CONF_CACHE_LINESZ);
usr/src/uts/common/os/sunpci.c
766
pci_config_put8(confhdl, PCI_CONF_CACHE_LINESZ,
usr/src/uts/intel/io/dktp/controller/ata/sil3xxx.c
92
cache_lnsz = pci_config_get8(pci_conf_handle, PCI_CONF_CACHE_LINESZ);
usr/src/uts/intel/io/hotplug/pcicfg/pcicfg.c
413
pci_config_get8(config_handle, PCI_CONF_CACHE_LINESZ));
usr/src/uts/sun4/io/ebus.c
904
pci_config_put8(conf_handle, PCI_CONF_CACHE_LINESZ,
usr/src/uts/sun4/io/pcicfg.c
3509
PCI_CONF_CACHE_LINESZ)) != 0) {
usr/src/uts/sun4/io/pcicfg.c
444
pci_config_get8(config_handle, PCI_CONF_CACHE_LINESZ));
usr/src/uts/sun4u/io/pci/db21554.c
1627
hdr_off + PCI_CONF_CACHE_LINESZ);
usr/src/uts/sun4u/io/pci/db21554.c
2351
pci_config_put8(config_handle, PCI_CONF_CACHE_LINESZ,
usr/src/uts/sun4u/io/pci/db21554.c
2353
n = pci_config_get8(config_handle, PCI_CONF_CACHE_LINESZ);
usr/src/uts/sun4u/io/pci/db21554.c
2504
pci_config_get8(config_handle, PCI_CONF_CACHE_LINESZ);
usr/src/uts/sun4u/io/pci/db21554.c
2558
pci_config_put8(config_handle, PCI_CONF_CACHE_LINESZ,
usr/src/uts/sun4u/io/pci/db21554.c
810
(uint8_t *)dbp->conf_io+poffset+PCI_CONF_CACHE_LINESZ,
usr/src/uts/sun4u/io/pci/db21554.c
815
(uint8_t *)dbp->conf_io+soffset+PCI_CONF_CACHE_LINESZ,
usr/src/uts/sun4u/io/pci/db21554.c
976
((caddr_t)dbp->conf_io+PCI_CONF_CACHE_LINESZ));
usr/src/uts/sun4u/io/pci/pci_pci.c
418
pci_config_get8(config_handle, PCI_CONF_CACHE_LINESZ);
usr/src/uts/sun4u/io/pci/pci_pci.c
927
pci_config_put8(config_handle, PCI_CONF_CACHE_LINESZ,
usr/src/uts/sun4u/io/pci/pci_pci.c
929
n = pci_config_get8(config_handle, PCI_CONF_CACHE_LINESZ);
usr/src/uts/sun4u/io/pci/pci_util.c
587
pci_config_put8(config_handle, PCI_CONF_CACHE_LINESZ,
usr/src/uts/sun4u/io/pci/pci_util.c
589
n = pci_config_get8(config_handle, PCI_CONF_CACHE_LINESZ);
usr/src/uts/sun4u/io/pci/simba.c
1033
pci_config_put8(ch, PCI_CONF_CACHE_LINESZ,
usr/src/uts/sun4u/io/pci/simba.c
426
PCI_CONF_CACHE_LINESZ);
usr/src/uts/sun4u/io/pci/simba.c
819
pci_config_put8(config_handle, PCI_CONF_CACHE_LINESZ,
usr/src/uts/sun4u/io/pci/simba.c
821
n = pci_config_get8(config_handle, PCI_CONF_CACHE_LINESZ);
usr/src/uts/sun4u/io/pci/simba.c
941
pci_config_get8(ch, PCI_CONF_CACHE_LINESZ);