Symbol: PCI_CONF_BASE2
usr/src/cmd/pcitool/pcitool.c
277
{ PCI_CONF_BASE2, 4, "BAR2", "Base Address Register 2 (@18)" },
usr/src/uts/common/io/audio/drv/audiosolo/audiosolo.c
1210
data = pci_config_get32(dev->pcih, PCI_CONF_BASE2);
usr/src/uts/common/io/cardbus/cardbus_cfg.c
4354
pci_config_get32(config_handle, PCI_CONF_BASE2),
usr/src/uts/common/io/comstar/port/qlt/qlt.c
486
w32l = PCICFG_RD32(qlt, PCI_CONF_BASE2);
usr/src/uts/common/io/e1000g/e1000g_debug.c
420
pciconfig_bar(Adapter, PCI_CONF_BASE2, "PCI_CONF_BASE2");
usr/src/uts/common/io/fibre-channel/fca/qlc/ql_api.c
16348
chs.chs_base2 = ql_pci_config_get32(ha, PCI_CONF_BASE2);
usr/src/uts/common/io/fibre-channel/fca/qlc/ql_api.c
16413
ql_pci_config_put32(ha, PCI_CONF_BASE2, chs_p->chs_base2);
usr/src/uts/common/io/fibre-channel/fca/qlge/qlge_dbg.c
670
pci_config_get32(qlge->pci_handle, PCI_CONF_BASE2);
usr/src/uts/common/io/igb/igb_debug.c
105
pci_config_get32(handle, PCI_CONF_BASE2));
usr/src/uts/common/io/ixgbe/ixgbe_debug.c
230
pci_config_get32(handle, PCI_CONF_BASE2));
usr/src/uts/common/io/scsi/adapters/pmcs/pmcs_fwlog.c
755
pci_config_get32(pwp->pci_acc_handle, PCI_CONF_BASE2));
usr/src/uts/common/os/sunpci.c
423
chsp->chs_base2 = pci_config_get32(confhdl, PCI_CONF_BASE2);
usr/src/uts/common/os/sunpci.c
777
pci_config_put32(confhdl, PCI_CONF_BASE2, chs_p->chs_base2);
usr/src/uts/intel/io/hotplug/pcicfg/pcicfg.c
164
PCI_CONF_BASE3, PCI_CONF_BASE2, PCI_CONF_BASE3,
usr/src/uts/intel/io/hotplug/pcicfg/pcicfg.c
433
pci_config_get32(config_handle, PCI_CONF_BASE2));
usr/src/uts/sun4/io/pcicfg.c
205
PCI_CONF_BASE3, PCI_CONF_BASE2, PCI_CONF_BASE3,
usr/src/uts/sun4/io/pcicfg.c
464
pci_config_get32(config_handle, PCI_CONF_BASE2));
usr/src/uts/sun4/io/px/px_tools.c
59
PCI_CONF_BASE2,
usr/src/uts/sun4u/io/pci/db21554.c
1052
(off_t)(p_offset + PCI_CONF_BASE2))) & ~DB_IO_BIT));
usr/src/uts/sun4u/io/pci/db21554.c
1064
(off_t)(s_offset + PCI_CONF_BASE2))) & ~DB_IO_BIT));
usr/src/uts/sun4u/io/pci/db21554.c
1635
ph->bar2 = pci_config_get32(config_handle, hdr_off + PCI_CONF_BASE2);
usr/src/uts/sun4u/io/pci/pci_tools.c
92
PCI_CONF_BASE2,
usr/src/uts/sun4u/sys/pci/db21554_config.h
51
#define DB_PCONF_DS_IO_MEM1 PCI_CONF_BASE2
usr/src/uts/sun4u/sys/pci/db21554_config.h
56
#define DB_PCONF_US_IO_MEM0 DB_PCONF_SEC_HDR_OFF+PCI_CONF_BASE2
usr/src/uts/sun4u/sys/pci/db21554_config.h
62
#define DB_SCONF_US_IO_MEM0 PCI_CONF_BASE2
usr/src/uts/sun4u/sys/pci/db21554_config.h
65
#define DB_SCONF_DS_IO_MEM1 DB_SCONF_PRI_HDR_OFF+PCI_CONF_BASE2