root/src/add-ons/kernel/drivers/network/ether/pcnet/dev/mii/nsphy.c
/*      $NetBSD: nsphy.c,v 1.18 1999/07/14 23:57:36 thorpej Exp $       */

/*-
 * SPDX-License-Identifier: BSD-2-Clause
 *
 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
 * All rights reserved.
 *
 * This code is derived from software contributed to The NetBSD Foundation
 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
 * NASA Ames Research Center.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/*-
 * Copyright (c) 1997 Manuel Bouyer.  All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#include <sys/cdefs.h>
/*
 * driver for National Semiconductor's DP83840A ethernet 10/100 PHY
 * Data Sheet available from www.national.com
 */

#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <sys/socket.h>
#include <sys/errno.h>
#include <sys/module.h>
#include <sys/bus.h>

#include <net/if.h>
#include <net/if_var.h>
#include <net/if_media.h>

#include <dev/mii/mii.h>
#include <dev/mii/miivar.h>
#include "miidevs.h"

#include <dev/mii/nsphyreg.h>

#include "miibus_if.h"

static int nsphy_probe(device_t);
static int nsphy_attach(device_t);

static device_method_t nsphy_methods[] = {
        /* device interface */
        DEVMETHOD(device_probe,         nsphy_probe),
        DEVMETHOD(device_attach,        nsphy_attach),
        DEVMETHOD(device_detach,        mii_phy_detach),
        DEVMETHOD(device_shutdown,      bus_generic_shutdown),
        DEVMETHOD_END
};

static driver_t nsphy_driver = {
        "nsphy",
        nsphy_methods,
        sizeof(struct mii_softc)
};

DRIVER_MODULE(nsphy, miibus, nsphy_driver, 0, 0);

static int      nsphy_service(struct mii_softc *, struct mii_data *, int);
static void     nsphy_status(struct mii_softc *);
static void     nsphy_reset(struct mii_softc *);

static const struct mii_phydesc nsphys[] = {
        MII_PHY_DESC(xxNATSEMI, DP83840),
        MII_PHY_END
};

static const struct mii_phy_funcs nsphy_funcs = {
        nsphy_service,
        nsphy_status,
        nsphy_reset
};

static int
nsphy_probe(device_t dev)
{

        return (mii_phy_dev_probe(dev, nsphys, BUS_PROBE_DEFAULT));
}

static int
nsphy_attach(device_t dev)
{

        mii_phy_dev_attach(dev, MIIF_NOMANPAUSE, &nsphy_funcs, 1);
        return (0);
}

static int
nsphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
{
        int reg;

        switch (cmd) {
        case MII_POLLSTAT:
                break;

        case MII_MEDIACHG:
                reg = PHY_READ(sc, MII_NSPHY_PCR);

                /*
                 * Set up the PCR to use LED4 to indicate full-duplex
                 * in both 10baseT and 100baseTX modes.
                 */
                reg |= PCR_LED4MODE;

                /*
                 * Make sure Carrier Integrity Monitor function is
                 * disabled (normal for Node operation, but sometimes
                 * it's not set?!)
                 */
                reg |= PCR_CIMDIS;

                /*
                 * Make sure "force link good" is set to normal mode.
                 * It's only intended for debugging.
                 */
                reg |= PCR_FLINK100;

                /*
                 * Mystery bits which are supposedly `reserved',
                 * but we seem to need to set them when the PHY
                 * is connected to some interfaces:
                 *
                 * 0x0400 is needed for fxp
                 *        (Intel EtherExpress Pro 10+/100B, 82557 chip)
                 *        (nsphy with a DP83840 chip)
                 * 0x0100 may be needed for some other card
                 */
                reg |= 0x0100 | 0x0400;

                if (mii_phy_mac_match(sc, "fxp"))
                        PHY_WRITE(sc, MII_NSPHY_PCR, reg);

                mii_phy_setmedia(sc);
                break;

        case MII_TICK:
                if (mii_phy_tick(sc) == EJUSTRETURN)
                        return (0);
                break;
        }

        /* Update the media status. */
        PHY_STATUS(sc);

        /* Callback if something changed. */
        mii_phy_update(sc, cmd);
        return (0);
}

static void
nsphy_status(struct mii_softc *sc)
{
        struct mii_data *mii = sc->mii_pdata;
        struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
        int bmsr, bmcr, par, anlpar;

        mii->mii_media_status = IFM_AVALID;
        mii->mii_media_active = IFM_ETHER;

        bmsr = PHY_READ(sc, MII_BMSR) |
            PHY_READ(sc, MII_BMSR);
        if (bmsr & BMSR_LINK)
                mii->mii_media_status |= IFM_ACTIVE;

        bmcr = PHY_READ(sc, MII_BMCR);
        if (bmcr & BMCR_ISO) {
                mii->mii_media_active |= IFM_NONE;
                mii->mii_media_status = 0;
                return;
        }

        if (bmcr & BMCR_LOOP)
                mii->mii_media_active |= IFM_LOOP;

        if (bmcr & BMCR_AUTOEN) {
                /*
                 * The PAR status bits are only valid if autonegotiation
                 * has completed (or it's disabled).
                 */
                if ((bmsr & BMSR_ACOMP) == 0) {
                        /* Erg, still trying, I guess... */
                        mii->mii_media_active |= IFM_NONE;
                        return;
                }

                /*
                 * Argh.  The PAR doesn't seem to indicate duplex mode
                 * properly!  Determine media based on link partner's
                 * advertised capabilities.
                 */
                if (PHY_READ(sc, MII_ANER) & ANER_LPAN) {
                        anlpar = PHY_READ(sc, MII_ANAR) &
                            PHY_READ(sc, MII_ANLPAR);
                        if (anlpar & ANLPAR_TX_FD)
                                mii->mii_media_active |= IFM_100_TX|IFM_FDX;
                        else if (anlpar & ANLPAR_T4)
                                mii->mii_media_active |= IFM_100_T4|IFM_HDX;
                        else if (anlpar & ANLPAR_TX)
                                mii->mii_media_active |= IFM_100_TX|IFM_HDX;
                        else if (anlpar & ANLPAR_10_FD)
                                mii->mii_media_active |= IFM_10_T|IFM_FDX;
                        else if (anlpar & ANLPAR_10)
                                mii->mii_media_active |= IFM_10_T|IFM_HDX;
                        else
                                mii->mii_media_active |= IFM_NONE;
                        if ((mii->mii_media_active & IFM_FDX) != 0)
                                mii->mii_media_active |=
                                    mii_phy_flowstatus(sc);
                        return;
                }

                /*
                 * Link partner is not capable of autonegotiation.
                 * We will never be in full-duplex mode if this is
                 * the case, so reading the PAR is OK.
                 */
                par = PHY_READ(sc, MII_NSPHY_PAR);
                if (par & PAR_10)
                        mii->mii_media_active |= IFM_10_T;
                else
                        mii->mii_media_active |= IFM_100_TX;
                mii->mii_media_active |= IFM_HDX;
        } else
                mii->mii_media_active = ife->ifm_media;
}

static void
nsphy_reset(struct mii_softc *sc)
{
        struct ifmedia_entry *ife = sc->mii_pdata->mii_media.ifm_cur;
        int reg, i;

        if (sc->mii_flags & MIIF_NOISOLATE)
                reg = BMCR_RESET;
        else
                reg = BMCR_RESET | BMCR_ISO;
        PHY_WRITE(sc, MII_BMCR, reg);

        /*
         * It is best to allow a little time for the reset to settle
         * in before we start polling the BMCR again.  Notably, the
         * DP83840A manuals state that there should be a 500us delay
         * between asserting software reset and attempting MII serial
         * operations.  Be conservative.
         */
        DELAY(1000);

        /*
         * Wait another 2s for it to complete.
         * This is only a little overkill as under normal circumstances
         * the PHY can take up to 1s to complete reset.
         * This is also a bit odd because after a reset, the BMCR will
         * clear the reset bit and simply reports 0 even though the reset
         * is not yet complete.
         */
        for (i = 0; i < 1000; i++) {
                reg = PHY_READ(sc, MII_BMCR);
                if (reg != 0 && (reg & BMCR_RESET) == 0)
                        break;
                DELAY(2000);
        }

        if ((sc->mii_flags & MIIF_NOISOLATE) == 0) {
                if ((ife == NULL && sc->mii_inst != 0) ||
                    (ife != NULL && IFM_INST(ife->ifm_media) != sc->mii_inst))
                        PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
        }
}