RGE_WRITE_4
RGE_WRITE_4(sc, RGE_RXCFG, rxfilt);
RGE_WRITE_4(sc, RGE_MAR0, swap32(hashes[1]));
RGE_WRITE_4(sc, RGE_MAR4, swap32(hashes[0]));
RGE_WRITE_4(sc, RGE_MAC0,
RGE_WRITE_4(sc, RGE_MAC4,
RGE_WRITE_4(sc, RGE_IMR, 0);
RGE_WRITE_4(sc, RGE_ISR, RGE_READ_4(sc, RGE_ISR));
RGE_WRITE_4(sc, RGE_TIMERINT0, 0);
RGE_WRITE_4(sc, RGE_TIMERINT1, 0);
RGE_WRITE_4(sc, RGE_TIMERINT2, 0);
RGE_WRITE_4(sc, RGE_TIMERINT3, 0);
RGE_WRITE_4(sc, RGE_TIMERINT0, 0);
RGE_WRITE_4(sc, RGE_TIMERINT0, 0x2600);
RGE_WRITE_4(sc, RGE_TIMERCNT, 1);
RGE_WRITE_4(sc, RGE_IMR, sc->rge_intrs);
RGE_WRITE_4(sc, RGE_CSIDR, val);
RGE_WRITE_4(sc, RGE_CSIAR, (reg & RGE_CSIAR_ADDR_MASK) |
RGE_WRITE_4(sc, RGE_CSIAR, (reg & RGE_CSIAR_ADDR_MASK) |
RGE_WRITE_4(sc, RGE_MACOCP, tmp);
RGE_WRITE_4(sc, RGE_MACOCP, val);
RGE_WRITE_4(sc, RGE_EPHYAR, tmp);
RGE_WRITE_4(sc, RGE_EPHYAR, val);
RGE_WRITE_4(sc, RGE_PHYOCP, tmp);
RGE_WRITE_4(sc, RGE_PHYOCP, val);
RGE_WRITE_4(sc, RGE_DTCCR_HI, RGE_ADDR_HI(addr));
RGE_WRITE_4(sc, RGE_DTCCR_LO, RGE_ADDR_LO(addr));
RGE_WRITE_4(sc, RGE_DTCCR_LO, RGE_ADDR_LO(addr) | RGE_DTCCR_CMD);
RGE_WRITE_4(sc, RGE_IMR, 0);
RGE_WRITE_4(sc, RGE_ISR, status);
RGE_WRITE_4(sc, RGE_TIMERCNT, 1);
RGE_WRITE_4(sc, RGE_IMR, sc->rge_intrs);
RGE_WRITE_4(sc, RGE_RXDESC_ADDR_LO,
RGE_WRITE_4(sc, RGE_RXDESC_ADDR_HI,
RGE_WRITE_4(sc, RGE_TXDESC_ADDR_LO,
RGE_WRITE_4(sc, RGE_TXDESC_ADDR_HI,
RGE_WRITE_4(sc, RGE_RXCFG, rxconf);
RGE_WRITE_4(sc, RGE_TXCFG, RGE_TXCFG_CONFIG);
RGE_WRITE_4(sc, RGE_TIMERINT0, 0);
RGE_WRITE_4(sc, RGE_TIMERINT1, 0);
RGE_WRITE_4(sc, RGE_TIMERINT2, 0);
RGE_WRITE_4(sc, RGE_TIMERINT3, 0);
RGE_WRITE_4(sc, RGE_INTMITI(i), 0);
RGE_WRITE_4(sc, reg, RGE_READ_4(sc, reg) | (val))
RGE_WRITE_4(sc, reg, RGE_READ_4(sc, reg) & ~(val))