AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV
v |= AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV;
v &= ~AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV;
AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV);
AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV);
regVal &= (~AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV);
AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV);
regVal &= (~AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV);
regVal |= SM((ant_div_control1 >> 3), AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV);