MII_BMCR
bmcr = PHY_READ(sc, MII_BMCR);
PHY_WRITE(sc, MII_BMCR, BMCR_S100|BMCR_AUTOEN|BMCR_FDX);
bmcr = PHY_READ(sc, MII_BMCR);
MII_BMCR, BMCR_ISO | BMCR_PDOWN);
MII_BMCR, BMCR_RESET | BMCR_AUTOEN | BMCR_STARTNEG);
MII_BMCR, BMCR_RESET | BMCR_AUTOEN | BMCR_STARTNEG);
MII_BMCR, BMCR_PDOWN);
MII_BMCR, BMCR_RESET | BMCR_AUTOEN | BMCR_STARTNEG);
MII_BMCR, BMCR_PDOWN);
age_miibus_writereg(sc->age_dev, sc->age_phyaddr, MII_BMCR, BMCR_RESET);
age_miibus_writereg(sc->age_dev, sc->age_phyaddr, MII_BMCR,
bmcr = PHY_READ(sc, MII_BMCR);
PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_ISO);
PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_RESET | BMCR_AUTOEN |
bmcr = PHY_READ(sc, MII_BMCR);
if ((PHY_READ(sc, MII_BMCR) & BMCR_RESET) == 0)
PHY_WRITE(sc, MII_BMCR, BMCR_RESET | BMCR_AUTOEN | BMCR_STARTNEG);
bmcr = PHY_READ(sc, MII_BMCR);
sc->bge_phy_addr, MII_BMCR, BMCR_RESET);
case MII_BMCR:
case MII_BMCR:
reg = PHY_READ(sc, MII_BMCR);
PHY_WRITE(sc, MII_BMCR, reg & ~(BMCR_ISO | BMCR_PDOWN));
bmcr = PHY_READ(sc, MII_BMCR);
bmcr = PHY_READ(sc, MII_BMCR);
bmcr = PHY_READ(sc, MII_BMCR);
jme_miibus_writereg(sc->jme_dev, sc->jme_phyaddr, MII_BMCR,
jme_miibus_writereg(sc->jme_dev, sc->jme_phyaddr, MII_BMCR, BMCR_PDOWN);
bmcr = jme_miibus_readreg(sc->jme_dev, sc->jme_phyaddr, MII_BMCR);
jme_miibus_writereg(sc->jme_dev, sc->jme_phyaddr, MII_BMCR, bmcr);
bmcr = PHY_READ(sc, MII_BMCR);
PHY_WRITE(sc, MII_BMCR, BMCR_RESET | BMCR_AUTOEN);
if ((PHY_READ(sc, MII_BMCR) & BMCR_RESET) == 0)
bmcr = PHY_READ(sc, MII_BMCR);
PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_ISO | BMCR_PDOWN);
PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_AUTOEN | BMCR_STARTNEG);
PHY_WRITE(sc, MII_BMCR, BMCR_ISO | BMCR_PDOWN);
MII_BMCR, BMCR_RESET | BMCR_AUTOEN | BMCR_STARTNEG);
bmcr = PHY_READ(sc, MII_BMCR);
PHY_WRITE(sc, MII_BMCR, reg);
reg = PHY_READ(sc, MII_BMCR);
PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
bmcr = PHY_READ(sc, MII_BMCR);
PHY_WRITE(sc, MII_BMCR, reg);
reg = PHY_READ(sc, MII_BMCR);
PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
reg = PHY_READ(sc, MII_BMCR);
PHY_WRITE(sc, MII_BMCR, reg & ~(BMCR_ISO | BMCR_PDOWN));
bmcr = PHY_READ(sc, MII_BMCR);
bmcr = PHY_READ(sc, MII_BMCR);
rge_write_phy(sc, 0, MII_BMCR, BMCR_RESET | BMCR_AUTOEN |
rge_write_phy(sc, 0, MII_BMCR, BMCR_AUTOEN);
rge_write_phy(sc, 0, MII_BMCR, BMCR_AUTOEN | BMCR_PDOWN);
rge_write_phy(sc, 0, MII_BMCR, BMCR_RESET | BMCR_AUTOEN |
if (!(rge_read_phy(sc, 0, MII_BMCR) & BMCR_RESET))
bmcr = PHY_READ(phy, MII_BMCR);
case MII_BMCR:
case MII_BMCR:
PHY_WRITE(sc, MII_BMCR, BMCR_ISO | BMCR_PDOWN);
bmcr = PHY_READ(phy, MII_BMCR);
MII_BMCR, BMCR_AUTOEN | BMCR_STARTNEG);
case MII_BMCR:
case MII_BMCR:
re_miibus_writereg(sc->rl_dev, phyaddr, MII_BMCR, BMCR_RESET);
status = re_miibus_readreg(sc->rl_dev, phyaddr, MII_BMCR);
re_miibus_writereg(sc->rl_dev, phyaddr, MII_BMCR, BMCR_LOOP);
bmcr = PHY_READ(sc, MII_BMCR);
PHY_WRITE(sc, MII_BMCR, BMCR_S100|BMCR_STARTNEG|BMCR_FDX);
bmcr = PHY_READ(sc, MII_BMCR);
PHY_WRITE(sc, MII_BMCR, reg);
reg = PHY_READ(sc, MII_BMCR);
PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
PHY_WRITE(sc, MII_BMCR, BMCR_ISO | BMCR_PDOWN);
PHY_WRITE(sc, MII_BMCR, BMCR_ISO | BMCR_PDOWN);
vge_miibus_writereg(sc->vge_dev, sc->vge_phyaddr, MII_BMCR,
vge_miibus_writereg(sc->vge_dev, sc->vge_phyaddr, MII_BMCR,
PHY_WRITE(child, MII_BMCR, PHY_READ(child, MII_BMCR) |
if ((PHY_READ(sc, MII_BMCR) & BMCR_AUTOEN) == 0 ||
PHY_WRITE(sc, MII_BMCR, bmcr);
PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_STARTNEG);
PHY_WRITE(sc, MII_BMCR, reg);
reg = PHY_READ(sc, MII_BMCR);
if (PHY_READ(sc, MII_BMCR) != reg)
PHY_WRITE(sc, MII_BMCR, reg);
bmcr = PHY_READ(phy, MII_BMCR);