#ifndef _ATA_H_
#define _ATA_H_
#include <dev/isci/types.h>
#define ATA_IDENTIFY_DEVICE 0xEC
#define ATA_CHECK_POWER_MODE 0xE5
#define ATA_STANDBY 0xE2
#define ATA_STANDBY_IMMED 0xE0
#define ATA_IDLE_IMMED 0xE1
#define ATA_IDLE 0xE3
#define ATA_FLUSH_CACHE 0xE7
#define ATA_FLUSH_CACHE_EXT 0xEA
#define ATA_READ_DMA_EXT 0x25
#define ATA_READ_DMA 0xC8
#define ATA_READ_SECTORS_EXT 0x24
#define ATA_READ_SECTORS 0x20
#define ATA_WRITE_DMA_EXT 0x35
#define ATA_WRITE_DMA 0xCA
#define ATA_WRITE_SECTORS_EXT 0x34
#define ATA_WRITE_SECTORS 0x30
#define ATA_WRITE_UNCORRECTABLE 0x45
#define ATA_READ_VERIFY_SECTORS 0x40
#define ATA_READ_VERIFY_SECTORS_EXT 0x42
#define ATA_READ_BUFFER 0xE4
#define ATA_WRITE_BUFFER 0xE8
#define ATA_EXECUTE_DEVICE_DIAG 0x90
#define ATA_SET_FEATURES 0xEF
#define ATA_SMART 0xB0
#define ATA_PACKET_IDENTIFY 0xA1
#define ATA_PACKET 0xA0
#define ATA_READ_FPDMA 0x60
#define ATA_WRITE_FPDMA 0x61
#define ATA_READ_LOG_EXT 0x2F
#define ATA_NOP 0x00
#define ATA_DEVICE_RESET 0x08
#define ATA_MEDIA_EJECT 0xED
#define ATA_SECURITY_UNLOCK 0xF2
#define ATA_SECURITY_FREEZE_LOCK 0xF5
#define ATA_DATA_SET_MANAGEMENT 0x06
#define ATA_DOWNLOAD_MICROCODE 0x92
#define ATA_WRITE_STREAM_DMA_EXT 0x3A
#define ATA_READ_LOG_DMA_EXT 0x47
#define ATA_READ_STREAM_DMA_EXT 0x2A
#define ATA_WRITE_DMA_FUA 0x3D
#define ATA_WRITE_LOG_DMA_EXT 0x57
#define ATA_READ_DMA_QUEUED 0xC7
#define ATA_READ_DMA_QUEUED_EXT 0x26
#define ATA_WRITE_DMA_QUEUED 0xCC
#define ATA_WRITE_DMA_QUEUED_EXT 0x36
#define ATA_WRITE_DMA_QUEUED_FUA_EXT 0x3E
#define ATA_READ_MULTIPLE 0xC4
#define ATA_READ_MULTIPLE_EXT 0x29
#define ATA_WRITE_MULTIPLE 0xC5
#define ATA_WRITE_MULTIPLE_EXT 0x39
#define ATA_WRITE_MULTIPLE_FUA_EXT 0xCE
#define ATA_SMART_SUB_CMD_ENABLE 0xD8
#define ATA_SMART_SUB_CMD_DISABLE 0xD9
#define ATA_SMART_SUB_CMD_RETURN_STATUS 0xDA
#define ATA_SMART_SUB_CMD_READ_LOG 0xD5
#define ATA_SET_FEATURES_SUB_CMD_ENABLE_CACHE 0x02
#define ATA_SET_FEATURES_SUB_CMD_DISABLE_CACHE 0x82
#define ATA_SET_FEATURES_SUB_CMD_DISABLE_READ_AHEAD 0x55
#define ATA_SET_FEATURES_SUB_CMD_ENABLE_READ_AHEAD 0xAA
#define ATA_SET_FEATURES_SUB_CMD_SET_TRANSFER_MODE 0x3
#define ATA_LOG_PAGE_NCQ_ERROR 0x10
#define ATA_LOG_PAGE_SMART_SELF_TEST 0x06
#define ATA_LOG_PAGE_EXTENDED_SMART_SELF_TEST 0x07
#define ATA_LOG_PAGE_NCQ_ERROR_SECTOR 0
#define ATA_LOG_PAGE_NCQ_ERROR_SECTOR_COUNT 1
#define ATA_STATUS_REG_BSY_BIT 0x80
#define ATA_STATUS_REG_DEVICE_FAULT_BIT 0x20
#define ATA_STATUS_REG_ERROR_BIT 0x01
#define ATA_ERROR_REG_NO_MEDIA_BIT 0x02
#define ATA_ERROR_REG_ABORT_BIT 0x04
#define ATA_ERROR_REG_MEDIA_CHANGE_REQUEST_BIT 0x08
#define ATA_ERROR_REG_ID_NOT_FOUND_BIT 0x10
#define ATA_ERROR_REG_MEDIA_CHANGE_BIT 0x20
#define ATA_ERROR_REG_UNCORRECTABLE_BIT 0x40
#define ATA_ERROR_REG_WRITE_PROTECTED_BIT 0x40
#define ATA_ERROR_REG_ICRC_BIT 0x80
#define ATA_CONTROL_REG_INTERRUPT_ENABLE_BIT 0x02
#define ATA_CONTROL_REG_SOFT_RESET_BIT 0x04
#define ATA_CONTROL_REG_HIGH_ORDER_BYTE_BIT 0x80
#define ATA_DEV_HEAD_REG_LBA_MODE_ENABLE 0x40
#define ATA_DEV_HEAD_REG_FUA_ENABLE 0x80
#define ATA_IDENTIFY_SERIAL_NUMBER_LEN 20
#define ATA_IDENTIFY_MODEL_NUMBER_LEN 40
#define ATA_IDENTIFY_FW_REVISION_LEN 8
#define ATA_IDENTIFY_48_LBA_LEN 8
#define ATA_IDENTIFY_MEDIA_SERIAL_NUMBER_LEN 30
#define ATA_IDENTIFY_WWN_LEN 8
#define ATA_IDENTIFY_REMOVABLE_MEDIA_ENABLE 0x0080
#define ATA_IDENTIFY_CAPABILITIES1_NORMAL_DMA_ENABLE 0x0100
#define ATA_IDENTIFY_CAPABILITIES1_STANDBY_ENABLE 0x2000
#define ATA_IDENTIFY_COMMAND_SET_SUPPORTED0_SMART_ENABLE 0x0001
#define ATA_IDENTIFY_COMMAND_SET_SUPPORTED1_48BIT_ENABLE 0x0400
#define ATA_IDENTIFY_COMMAND_SET_WWN_SUPPORT_ENABLE 0x0100
#define ATA_IDENTIFY_COMMAND_SET_ENABLED0_SMART_ENABLE 0x0001
#define ATA_IDENTIFY_SATA_CAPABILITIES_NCQ_ENABLE 0x0100
#define ATA_IDENTIFY_NCQ_QUEUE_DEPTH_ENABLE 0x001F
#define ATA_IDENTIFY_SECTOR_LARGER_THEN_512_ENABLE 0x0100
#define ATA_IDENTIFY_LOGICAL_SECTOR_PER_PHYSICAL_SECTOR_MASK 0x000F
#define ATA_IDENTIFY_LOGICAL_SECTOR_PER_PHYSICAL_SECTOR_ENABLE 0x2000
#define ATA_IDENTIFY_WRITE_UNCORRECTABLE_SUPPORT 0x0004
#define ATA_IDENTIFY_COMMAND_SET_SMART_SELF_TEST_SUPPORTED 0x0002
#define ATA_IDENTIFY_COMMAND_SET_DSM_TRIM_SUPPORTED 0x0001
#define ATA_IDENTIFY_COMMAND_ADDL_SUPPORTED_DETERMINISTIC_READ 0x4000
#define ATA_IDENTIFY_COMMAND_ADDL_SUPPORTED_READ_ZERO 0x0020
#define ATAPI_IDENTIFY_16BYTE_CMD_PCKT_ENABLE 0x01
#define ATA_PACKET_FEATURE_DMA 0x01
#define ATA_PACKET_FEATURE_OVL 0x02
#define ATA_PACKET_FEATURE_DMADIR 0x04
#define ATA_STANDBY_POWER_MODE 0x00
#define ATA_IDLE_POWER_MODE 0x80
#define ATA_ACTIVE_POWER_MODE 0xFF
#define ATA_WRITE_UNCORRECTABLE_PSEUDO 0x55
#define ATA_WRITE_UNCORRECTABLE_FLAGGED 0xAA
#define ATA_SECURITY_STATUS_SUPPORTED 0x0001
#define ATA_SECURITY_STATUS_ENABLED 0x0002
#define ATA_SECURITY_STATUS_LOCKED 0x0004
#define ATA_SECURITY_STATUS_FROZEN 0x0008
#define ATA_SECURITY_STATUS_EXPIRED 0x0010
#define ATA_SECURITY_STATUS_ERASESUPPORTED 0x0020
#define ATA_SECURITY_STATUS_RESERVED 0xFEC0
#define ATA_SECURITY_STATUS_SECURITYLEVEL 0x0100
typedef struct ATA_IDENTIFY_DEVICE_DATA
{
U16 general_config_bits;
U16 obsolete0;
U16 vendor_specific_config_bits;
U16 obsolete1;
U16 retired1[2];
U16 obsolete2;
U16 reserved_for_compact_flash1[2];
U16 retired0;
U8 serial_number[ATA_IDENTIFY_SERIAL_NUMBER_LEN];
U16 retired2[2];
U16 obsolete4;
U8 firmware_revision[ATA_IDENTIFY_FW_REVISION_LEN];
U8 model_number[ATA_IDENTIFY_MODEL_NUMBER_LEN];
U16 max_sectors_per_multiple;
U16 reserved0;
U16 capabilities1;
U16 capabilities2;
U16 obsolete5[2];
U16 validity_bits;
U16 obsolete6[5];
U16 current_max_sectors_per_multiple;
U8 total_num_sectors[4];
U16 obsolete7;
U16 multi_word_dma_mode;
U16 pio_modes_supported;
U16 min_multiword_dma_transfer_cycle;
U16 rec_min_multiword_dma_transfer_cycle;
U16 min_pio_transfer_no_flow_ctrl;
U16 min_pio_transfer_with_flow_ctrl;
U16 additional_supported;
U16 reserved1;
U16 reserved2[4];
U16 queue_depth;
U16 serial_ata_capabilities;
U16 serial_ata_reserved;
U16 serial_ata_features_supported;
U16 serial_ata_features_enabled;
U16 major_version_number;
U16 minor_version_number;
U16 command_set_supported0;
U16 command_set_supported1;
U16 command_set_supported_extention;
U16 command_set_enabled0;
U16 command_set_enabled1;
U16 command_set_default;
U16 ultra_dma_mode;
U16 security_erase_completion_time;
U16 enhanced_security_erase_time;
U16 current_power_mgmt_value;
U16 master_password_revision;
U16 hardware_reset_result;
U16 current_acoustic_management_value;
U16 stream_min_request_size;
U16 stream_transfer_time;
U16 stream_access_latency;
U16 stream_performance_granularity[2];
U8 max_48bit_lba[ATA_IDENTIFY_48_LBA_LEN];
U16 streaming_transfer_time;
U16 max_lba_range_entry_blocks;
U16 physical_logical_sector_info;
U16 acoustic_test_interseek_delay;
U8 world_wide_name[ATA_IDENTIFY_WWN_LEN];
U8 reserved_for_wwn_extention[ATA_IDENTIFY_WWN_LEN];
U16 reserved4;
U8 words_per_logical_sector[4];
U16 command_set_supported2;
U16 reserved5[7];
U16 removable_media_status;
U16 security_status;
U16 vendor_specific1[31];
U16 cfa_power_mode1;
U16 reserved_for_compact_flash2[7];
U16 device_nominal_form_factor;
U16 data_set_management;
U16 reserved_for_compact_flash3[6];
U16 current_media_serial_number[ATA_IDENTIFY_MEDIA_SERIAL_NUMBER_LEN];
U16 reserved6[3];
U16 logical_sector_alignment;
U16 reserved7[7];
U16 nominal_media_rotation_rate;
U16 reserved8[16];
U16 min_num_blocks_per_microcode;
U16 max_num_blocks_per_microcode;
U16 reserved9[19];
U16 integrity_word;
} ATA_IDENTIFY_DEVICE_DATA_T;
#define ATA_IDENTIFY_DEVICE_GET_OFFSET(field_name) \
((POINTER_UINT)&(((ATA_IDENTIFY_DEVICE_DATA_T*)0)->field_name))
#define ATA_IDENTIFY_DEVICE_WCE_ENABLE 0x20
#define ATA_IDENTIFY_DEVICE_RA_ENABLE 0x40
typedef struct ATAPI_IDENTIFY_PACKET_DEVICE
{
U16 generalConfigBits;
U16 reserved0;
U16 uniqueConfigBits;
U16 reserved1[7];
U8 serialNumber[ATA_IDENTIFY_SERIAL_NUMBER_LEN];
U16 reserved2[3];
U8 firmwareRevision[ATA_IDENTIFY_FW_REVISION_LEN];
U8 modelNumber[ATA_IDENTIFY_MODEL_NUMBER_LEN];
U16 reserved4[2];
U16 capabilities1;
U16 capabilities2;
U16 obsolete0[2];
U16 validityBits;
U16 reserved[8];
U16 DMADIRBitRequired;
U16 multiWordDmaMode;
U16 pioModesSupported;
U16 minMultiwordDmaTransferCycle;
U16 recMinMultiwordDmaTransferCycle;
U16 minPioTransferNoFlowCtrl;
U16 minPioTransferWithFlowCtrl;
U16 reserved6[2];
U16 nsFromPACKETReceiptToBusRelease;
U16 nsFromSERVICEReceiptToBSYreset;
U16 reserved7[2];
U16 queueDepth;
U16 serialAtaCapabilities;
U16 serialAtaReserved;
U16 serialAtaFeaturesSupported;
U16 serialAtaFeaturesEnabled;
U16 majorVersionNumber;
U16 minorVersionNumber;
U16 commandSetSupported0;
U16 commandSetSupported1;
U16 commandSetSupportedExtention;
U16 commandSetEnabled0;
U16 commandSetEnabled1;
U16 commandSetDefault;
U16 ultraDmaMode;
U16 reserved8[4];
U16 hardwareResetResult;
U16 currentAcousticManagementValue;
U16 reserved9[30];
U16 ATAPIByteCount0Behavior;
U16 obsolete1;
U16 removableMediaStatus;
U16 securityStatus;
U16 vendorSpecific1[31];
U16 reservedForCompactFlash[16];
U16 reserved10[79];
U16 integrityWord;
} ATAPI_IDENTIFY_PACKET_DEVICE_T;
typedef union ATA_DESCRIPTOR_ENTRY
{
struct DESCRIPTOR_ENTRY
{
U8 lba_field;
U8 status_byte;
U8 time_stamp_low;
U8 time_stamp_high;
U8 checkpoint_byte;
U8 failing_lba_low;
U8 failing_lba_mid;
U8 failing_lba_high;
U8 failing_lba_low_ext;
U8 failing_lba_mid_ext;
U8 failing_lba_high_ext;
U8 vendor_specific1;
U8 vendor_specific2;
U8 vendor_specific3;
U8 vendor_specific4;
U8 vendor_specific5;
U8 vendor_specific6;
U8 vendor_specific7;
U8 vendor_specific8;
U8 vendor_specific9;
U8 vendor_specific10;
U8 vendor_specific11;
U8 vendor_specific12;
U8 vendor_specific13;
U8 vendor_specific14;
U8 vendor_specific15;
} DESCRIPTOR_ENTRY;
U8 descriptor_entry[26];
} ATA_DESCRIPTOR_ENTRY_T;
typedef union ATA_SMART_DESCRIPTOR_ENTRY
{
struct SMART_DESCRIPTOR_ENTRY
{
U8 lba_field;
U8 status_byte;
U8 time_stamp_low;
U8 time_stamp_high;
U8 checkpoint_byte;
U8 failing_lba_low;
U8 failing_lba_mid;
U8 failing_lba_high;
U8 failing_lba_low_ext;
U8 vendor_specific1;
U8 vendor_specific2;
U8 vendor_specific3;
U8 vendor_specific4;
U8 vendor_specific5;
U8 vendor_specific6;
U8 vendor_specific7;
U8 vendor_specific8;
U8 vendor_specific9;
U8 vendor_specific10;
U8 vendor_specific11;
U8 vendor_specific12;
U8 vendor_specific13;
U8 vendor_specific14;
U8 vendor_specific15;
} SMART_DESCRIPTOR_ENTRY;
U8 smart_descriptor_entry[24];
} ATA_SMART_DESCRIPTOR_ENTRY_T;
typedef struct ATA_EXTENDED_SMART_SELF_TEST_LOG
{
U8 self_test_log_data_structure_revision_number;
U8 reserved0;
U8 self_test_descriptor_index[2];
ATA_DESCRIPTOR_ENTRY_T descriptor_entrys[19];
U8 vendor_specific[2];
U8 reserved1[11];
U8 data_structure_checksum;
} ATA_EXTENDED_SMART_SELF_TEST_LOG_T;
typedef struct ATA_SMART_SELF_TEST_LOG
{
U8 self_test_log_data_structure_revision_number[2];
ATA_SMART_DESCRIPTOR_ENTRY_T descriptor_entrys[21];
U8 vendor_specific[2];
U8 self_test_index;
U8 reserved1[2];
U8 data_structure_checksum;
} ATA_SMART_SELF_TEST_LOG_T;
typedef struct ATA_NCQ_COMMAND_ERROR_LOG
{
U8 ncq_tag : 5;
U8 reserved1 : 2;
U8 nq : 1;
U8 reserved2;
U8 status;
U8 error;
U8 lba_7_0;
U8 lba_15_8;
U8 lba_23_16;
U8 device;
U8 lba_31_24;
U8 lba_39_32;
U8 lba_47_40;
U8 reserved3;
U8 count_7_0;
U8 count_15_8;
U8 reserved4[242];
U8 vendor_specific[255];
U8 checksum;
} ATA_NCQ_COMMAND_ERROR_LOG_T;
#endif