#ifndef __T4_TLS_H__
#define __T4_TLS_H__
#ifdef _KERNEL
#define CONTENT_TYPE_CCS 20
#define CONTENT_TYPE_ALERT 21
#define CONTENT_TYPE_HANDSHAKE 22
#define CONTENT_TYPE_APP_DATA 23
#define CONTENT_TYPE_HEARTBEAT 24
#define CONTENT_TYPE_KEY_CONTEXT 32
#define CONTENT_TYPE_ERROR 127
#define TLS_HEADER_LENGTH 5
#define TP_TX_PG_SZ 65536
#define FC_TP_PLEN_MAX 17408
enum {
TLS_SFO_WR_CONTEXTLOC_DSGL,
TLS_SFO_WR_CONTEXTLOC_IMMEDIATE,
TLS_SFO_WR_CONTEXTLOC_DDR,
};
enum {
CPL_TX_TLS_SFO_TYPE_CCS,
CPL_TX_TLS_SFO_TYPE_ALERT,
CPL_TX_TLS_SFO_TYPE_HANDSHAKE,
CPL_TX_TLS_SFO_TYPE_DATA,
CPL_TX_TLS_SFO_TYPE_CUSTOM,
};
struct tls_scmd {
__be32 seqno_numivs;
__be32 ivgen_hdrlen;
};
struct tls_ofld_info {
unsigned int frag_size;
int key_location;
int rx_key_addr;
int tx_key_addr;
uint16_t rx_version;
unsigned short fcplenmax;
unsigned short adjusted_plen;
unsigned short expn_per_ulp;
unsigned short pdus_per_ulp;
bool tls13;
struct tls_scmd scmd0;
u_int iv_len;
unsigned int tx_key_info_size;
size_t rx_resid;
};
struct tls_hdr {
__u8 type;
__be16 version;
__be16 length;
} __packed;
struct tlsrx_hdr_pkt {
__u8 type;
__be16 version;
__be16 length;
__be64 tls_seq;
__be16 reserved1;
__u8 res_to_mac_error;
} __packed;
#define S_TLSRX_HDR_PKT_INTERNAL_ERROR 4
#define M_TLSRX_HDR_PKT_INTERNAL_ERROR 0x1
#define V_TLSRX_HDR_PKT_INTERNAL_ERROR(x) \
((x) << S_TLSRX_HDR_PKT_INTERNAL_ERROR)
#define G_TLSRX_HDR_PKT_INTERNAL_ERROR(x) \
(((x) >> S_TLSRX_HDR_PKT_INTERNAL_ERROR) & M_TLSRX_HDR_PKT_INTERNAL_ERROR)
#define F_TLSRX_HDR_PKT_INTERNAL_ERROR V_TLSRX_HDR_PKT_INTERNAL_ERROR(1U)
#define S_TLSRX_HDR_PKT_SPP_ERROR 3
#define M_TLSRX_HDR_PKT_SPP_ERROR 0x1
#define V_TLSRX_HDR_PKT_SPP_ERROR(x) ((x) << S_TLSRX_HDR_PKT_SPP_ERROR)
#define G_TLSRX_HDR_PKT_SPP_ERROR(x) \
(((x) >> S_TLSRX_HDR_PKT_SPP_ERROR) & M_TLSRX_HDR_PKT_SPP_ERROR)
#define F_TLSRX_HDR_PKT_SPP_ERROR V_TLSRX_HDR_PKT_SPP_ERROR(1U)
#define S_TLSRX_HDR_PKT_CCDX_ERROR 2
#define M_TLSRX_HDR_PKT_CCDX_ERROR 0x1
#define V_TLSRX_HDR_PKT_CCDX_ERROR(x) ((x) << S_TLSRX_HDR_PKT_CCDX_ERROR)
#define G_TLSRX_HDR_PKT_CCDX_ERROR(x) \
(((x) >> S_TLSRX_HDR_PKT_CCDX_ERROR) & M_TLSRX_HDR_PKT_CCDX_ERROR)
#define F_TLSRX_HDR_PKT_CCDX_ERROR V_TLSRX_HDR_PKT_CCDX_ERROR(1U)
#define S_TLSRX_HDR_PKT_PAD_ERROR 1
#define M_TLSRX_HDR_PKT_PAD_ERROR 0x1
#define V_TLSRX_HDR_PKT_PAD_ERROR(x) ((x) << S_TLSRX_HDR_PKT_PAD_ERROR)
#define G_TLSRX_HDR_PKT_PAD_ERROR(x) \
(((x) >> S_TLSRX_HDR_PKT_PAD_ERROR) & M_TLSRX_HDR_PKT_PAD_ERROR)
#define F_TLSRX_HDR_PKT_PAD_ERROR V_TLSRX_HDR_PKT_PAD_ERROR(1U)
#define S_TLSRX_HDR_PKT_MAC_ERROR 0
#define M_TLSRX_HDR_PKT_MAC_ERROR 0x1
#define V_TLSRX_HDR_PKT_MAC_ERROR(x) ((x) << S_TLSRX_HDR_PKT_MAC_ERROR)
#define G_TLSRX_HDR_PKT_MAC_ERROR(x) \
(((x) >> S_TLSRX_HDR_PKT_MAC_ERROR) & M_TLSRX_HDR_PKT_MAC_ERROR)
#define F_TLSRX_HDR_PKT_MAC_ERROR V_TLSRX_HDR_PKT_MAC_ERROR(1U)
#define M_TLSRX_HDR_PKT_ERROR 0x1F
#endif
#endif