sys/dev/etherswitch/ar40xx/ar40xx_hw_port.c

104

AR40XX_REG_WRITE(sc, AR40XX_REG_PORT_STATUS(port),

sys/dev/etherswitch/ar40xx/ar40xx_hw_port.c

137

AR40XX_REG_WRITE(sc, AR40XX_REG_PORT_STATUS(port), 0);

sys/dev/etherswitch/ar40xx/ar40xx_hw_port.c

158

reg = AR40XX_REG_READ(sc, AR40XX_REG_PORT_STATUS(port));

sys/dev/etherswitch/ar40xx/ar40xx_hw_port.c

160

AR40XX_REG_WRITE(sc, AR40XX_REG_PORT_STATUS(port), reg);

sys/dev/etherswitch/ar40xx/ar40xx_hw_port.c

183

AR40XX_REG_WRITE(sc, AR40XX_REG_PORT_STATUS(0), reg);

sys/dev/etherswitch/ar40xx/ar40xx_hw_port.c

187

AR40XX_REG_WRITE(sc, AR40XX_REG_PORT_STATUS(0), reg);

sys/dev/etherswitch/ar40xx/ar40xx_hw_port.c

81

AR40XX_REG_WRITE(sc, AR40XX_REG_PORT_STATUS(port), 0);

sys/dev/etherswitch/ar40xx/ar40xx_main.c

183

AR40XX_REG_READ(sc, AR40XX_REG_PORT_STATUS(val)));

sys/dev/etherswitch/ar40xx/ar40xx_phy.c

95

reg = AR40XX_REG_READ(sc, AR40XX_REG_PORT_STATUS(phy + 1));