sys/arm/mv/armada/wdt.c

213

write_cpu_ctrl(BRIDGE_IRQ_CAUSE, irq_cause);

sys/arm/mv/armada/wdt.c

217

write_cpu_ctrl(BRIDGE_IRQ_MASK, irq_mask);

sys/arm/mv/armada/wdt.c

221

write_cpu_ctrl(RSTOUTn_MASK, val);

sys/arm/mv/armada/wdt.c

235

write_cpu_ctrl(BRIDGE_IRQ_CAUSE, irq_cause);

sys/arm/mv/armada/wdt.c

253

write_cpu_ctrl(BRIDGE_IRQ_CAUSE, irq_cause);

sys/arm/mv/armada/wdt.c

268

write_cpu_ctrl(BRIDGE_IRQ_CAUSE_ARMADAXP, irq_cause);

sys/arm/mv/armada/wdt.c

288

write_cpu_ctrl(RSTOUTn_MASK, val);

sys/arm/mv/armada/wdt.c

292

write_cpu_ctrl(BRIDGE_IRQ_MASK, irq_mask);

sys/arm/mv/armada/wdt.c

296

write_cpu_ctrl(BRIDGE_IRQ_CAUSE, irq_cause);

sys/arm/mv/mv_common.c

207

write_cpu_ctrl_t write_cpu_ctrl;

sys/arm/mv/mv_common.c

446

if (soc_decode_win_spec->write_cpu_ctrl != NULL)

sys/arm/mv/mv_common.c

447

soc_decode_win_spec->write_cpu_ctrl(reg, val);

sys/arm/mv/mv_common.c

494

write_cpu_ctrl(CPU_PM_CTRL, mask);

sys/arm/mv/mv_pci.c

590

write_cpu_ctrl(CPU_CONTROL, read_cpu_ctrl(CPU_CONTROL) &

sys/arm/mv/mvvar.h

106

void write_cpu_ctrl(uint32_t, uint32_t);

sys/arm/mv/timer.c

228

write_cpu_ctrl(sc->config->bridge_irq_cause, irq_cause);

sys/arm/mv/timer.c

232

write_cpu_ctrl(BRIDGE_IRQ_MASK, irq_mask);

sys/arm/mv/timer.c

262

write_cpu_ctrl(timer_softc->config->bridge_irq_cause, irq_cause);

sys/arm/mv/timer.c

377

write_cpu_ctrl(timer_softc->config->bridge_irq_cause, irq_cause);

sys/arm/mv/timer.c

407

write_cpu_ctrl(timer_softc->config->bridge_irq_cause, irq_cause);