Symbol: t4_read_reg
sys/dev/cxgbe/common/t4_hw.c
10001
cnt[i] = t4_read_reg(adap, A_PM_RX_STAT_COUNT);
sys/dev/cxgbe/common/t4_hw.c
10026
stats[j] = t4_read_reg(adap, A_PM_RX_STAT_COUNT);
sys/dev/cxgbe/common/t4_hw.c
10250
stat_ctl = t4_read_reg(adap, A_MPS_STAT_CTL);
sys/dev/cxgbe/common/t4_hw.c
10415
t4_read_reg(adap, EPIO_REG(OP)); /* flush */
sys/dev/cxgbe/common/t4_hw.c
10416
if (t4_read_reg(adap, EPIO_REG(OP)) & F_BUSY)
sys/dev/cxgbe/common/t4_hw.c
10422
t4_read_reg(adap, EPIO_REG(OP)); /* flush */
sys/dev/cxgbe/common/t4_hw.c
10423
if (t4_read_reg(adap, EPIO_REG(OP)) & F_BUSY)
sys/dev/cxgbe/common/t4_hw.c
105
u32 val = t4_read_reg(adap, reg);
sys/dev/cxgbe/common/t4_hw.c
10699
sge_regs[i], t4_read_reg(adapter, sge_regs[i]));
sys/dev/cxgbe/common/t4_hw.c
10821
pcie_fw = t4_read_reg(adap, A_PCIE_FW);
sys/dev/cxgbe/common/t4_hw.c
10966
if (!(t4_read_reg(adap, A_PCIE_FW) & F_PCIE_FW_HALT))
sys/dev/cxgbe/common/t4_hw.c
110
*valp = t4_read_reg(adap, result_reg);
sys/dev/cxgbe/common/t4_hw.c
12636
pl_rev = t4_read_reg(adapter, A_PL_REV);
sys/dev/cxgbe/common/t4_hw.c
12715
t4_read_reg(adapter, a_port_cfg)
sys/dev/cxgbe/common/t4_hw.c
12842
t4_read_reg(adap, PCIE_FW_REG(A_PCIE_FW_PF, PCIE_FW_PF_DEVLOG));
sys/dev/cxgbe/common/t4_hw.c
12904
r = t4_read_reg(adapter, A_SGE_INGRESS_RX_THRESHOLD);
sys/dev/cxgbe/common/t4_hw.c
12911
r = t4_read_reg(adapter, A_SGE_ITP_CONTROL);
sys/dev/cxgbe/common/t4_hw.c
12919
r = t4_read_reg(adapter, A_SGE_TIMER_VALUE_0_AND_1);
sys/dev/cxgbe/common/t4_hw.c
12922
r = t4_read_reg(adapter, A_SGE_TIMER_VALUE_2_AND_3);
sys/dev/cxgbe/common/t4_hw.c
12925
r = t4_read_reg(adapter, A_SGE_TIMER_VALUE_4_AND_5);
sys/dev/cxgbe/common/t4_hw.c
12929
r = t4_read_reg(adapter, A_SGE_CONM_CTRL);
sys/dev/cxgbe/common/t4_hw.c
12939
r = t4_read_reg(adapter, A_SGE_EGRESS_QUEUES_PER_PAGE_PF);
sys/dev/cxgbe/common/t4_hw.c
12945
r = t4_read_reg(adapter, A_SGE_INGRESS_QUEUES_PER_PAGE_PF);
sys/dev/cxgbe/common/t4_hw.c
12950
r = t4_read_reg(adapter, A_SGE_HOST_PAGE_SIZE);
sys/dev/cxgbe/common/t4_hw.c
12955
r = t4_read_reg(adapter, A_SGE_CONTROL);
sys/dev/cxgbe/common/t4_hw.c
12969
r = t4_read_reg(adapter, A_SGE_CONTROL2);
sys/dev/cxgbe/common/t4_hw.c
12976
sp->sge_fl_buffer_size[i] = t4_read_reg(adapter,
sys/dev/cxgbe/common/t4_hw.c
13043
v = t4_read_reg(adap, LE_HASH_MASK_GEN_IPV4T5(3));
sys/dev/cxgbe/common/t4_hw.c
13045
v = t4_read_reg(adap, LE_HASH_MASK_GEN_IPV4T5(4));
sys/dev/cxgbe/common/t4_hw.c
13115
v = t4_read_reg(adap, A_TP_TIMER_RESOLUTION);
sys/dev/cxgbe/common/t4_hw.c
13125
v = t4_read_reg(adap, A_TP_OUT_CONFIG);
sys/dev/cxgbe/common/t4_hw.c
13137
rx_len = t4_read_reg(adap, A_TP_PMM_RX_PAGE_SIZE);
sys/dev/cxgbe/common/t4_hw.c
13138
tx_len = t4_read_reg(adap, A_TP_PMM_TX_PAGE_SIZE);
sys/dev/cxgbe/common/t4_hw.c
13140
r = t4_read_reg(adap, A_TP_PARA_REG2);
sys/dev/cxgbe/common/t4_hw.c
13144
r = t4_read_reg(adap, A_TP_PARA_REG7);
sys/dev/cxgbe/common/t4_hw.c
13371
v = t4_read_reg(adap, A_CIM_QUEUE_CONFIG_CTRL);
sys/dev/cxgbe/common/t4_hw.c
13397
v = t4_read_reg(adap, A_CIM_QUEUE_CONFIG_CTRL);
sys/dev/cxgbe/common/t4_hw.c
13451
*data = t4_read_reg(adap, A_CIM_IBQ_DBG_DATA);
sys/dev/cxgbe/common/t4_hw.c
135
u32 v = t4_read_reg(adapter, addr) & ~mask;
sys/dev/cxgbe/common/t4_hw.c
13511
*data = t4_read_reg(adap, A_CIM_OBQ_DBG_DATA);
sys/dev/cxgbe/common/t4_hw.c
13582
if (t4_read_reg(adap, A_CIM_HOST_ACC_CTRL) & hostbusy)
sys/dev/cxgbe/common/t4_hw.c
13590
*valp++ = t4_read_reg(adap, A_CIM_HOST_ACC_DATA);
sys/dev/cxgbe/common/t4_hw.c
13625
if (t4_read_reg(adap, A_CIM_HOST_ACC_CTRL) & hostbusy)
sys/dev/cxgbe/common/t4_hw.c
13734
cfg = t4_read_reg(adap, A_TP_DBG_LA_CONFIG) & 0xffff;
sys/dev/cxgbe/common/t4_hw.c
13739
val = t4_read_reg(adap, A_TP_DBG_LA_CONFIG);
sys/dev/cxgbe/common/t4_hw.c
138
(void) t4_read_reg(adapter, addr); /* flush */
sys/dev/cxgbe/common/t4_hw.c
13824
idma_same_state_cnt[0] = t4_read_reg(adapter, A_SGE_DEBUG_DATA_HIGH);
sys/dev/cxgbe/common/t4_hw.c
13825
idma_same_state_cnt[1] = t4_read_reg(adapter, A_SGE_DEBUG_DATA_LOW);
sys/dev/cxgbe/common/t4_hw.c
13877
debug0 = t4_read_reg(adapter, A_SGE_DEBUG_DATA_LOW);
sys/dev/cxgbe/common/t4_hw.c
13881
debug11 = t4_read_reg(adapter, A_SGE_DEBUG_DATA_LOW);
sys/dev/cxgbe/common/t4_hw.c
13948
v = t4_read_reg(adap, A_TP_PACE_TABLE);
sys/dev/cxgbe/common/t4_hw.c
14699
*data++ = t4_read_reg(adap, i);
sys/dev/cxgbe/common/t4_hw.c
14701
*data++ = t4_read_reg(adap, i);
sys/dev/cxgbe/common/t4_hw.c
159
*vals++ = t4_read_reg(adap, data_reg);
sys/dev/cxgbe/common/t4_hw.c
210
val = t4_read_reg(adap, A_PCIE_CFG_SPACE_DATA);
sys/dev/cxgbe/common/t4_hw.c
245
pcie_fw = t4_read_reg(adap, A_PCIE_FW);
sys/dev/cxgbe/common/t4_hw.c
328
if (t4_read_reg(sc, port_ctl_reg) & F_PORTTXEN &&
sys/dev/cxgbe/common/t4_hw.c
3388
*bufp++ = t4_read_reg(adap, reg);
sys/dev/cxgbe/common/t4_hw.c
3858
if (t4_read_reg(adapter, A_SF_OP) & F_BUSY)
sys/dev/cxgbe/common/t4_hw.c
3866
*valp = t4_read_reg(adapter, A_SF_DATA);
sys/dev/cxgbe/common/t4_hw.c
3887
if (t4_read_reg(adapter, A_SF_OP) & F_BUSY)
sys/dev/cxgbe/common/t4_hw.c
414
pcie_fw = t4_read_reg(adap, A_PCIE_FW);
sys/dev/cxgbe/common/t4_hw.c
419
ctl = t4_read_reg(adap, ctl_reg);
sys/dev/cxgbe/common/t4_hw.c
430
pcie_fw = t4_read_reg(adap, A_PCIE_FW);
sys/dev/cxgbe/common/t4_hw.c
4431
cfg = t4_read_reg(adap, A_CIM_DEBUGCFG);
sys/dev/cxgbe/common/t4_hw.c
4435
val = t4_read_reg(adap, A_CIM_DEBUGSTS);
sys/dev/cxgbe/common/t4_hw.c
4447
*pif_req++ = t4_read_reg(adap, A_CIM_PO_LA_DEBUGDATA);
sys/dev/cxgbe/common/t4_hw.c
4448
*pif_rsp++ = t4_read_reg(adap, A_CIM_PI_LA_DEBUGDATA);
sys/dev/cxgbe/common/t4_hw.c
4463
cfg = t4_read_reg(adap, A_CIM_DEBUGCFG);
sys/dev/cxgbe/common/t4_hw.c
4472
*ma_req++ = t4_read_reg(adap, A_CIM_PO_LA_MADEBUGDATA);
sys/dev/cxgbe/common/t4_hw.c
4473
*ma_rsp++ = t4_read_reg(adap, A_CIM_PI_LA_MADEBUGDATA);
sys/dev/cxgbe/common/t4_hw.c
4487
j = t4_read_reg(adap, A_ULP_RX_LA_WRPTR);
sys/dev/cxgbe/common/t4_hw.c
4490
*p = t4_read_reg(adap, A_ULP_RX_LA_RDDATA);
sys/dev/cxgbe/common/t4_hw.c
471
t4_read_reg(adap, data_reg);
sys/dev/cxgbe/common/t4_hw.c
4803
cause = ucause = t4_read_reg(sc, ii->cause_reg);
sys/dev/cxgbe/common/t4_hw.c
4808
ucause &= t4_read_reg(sc, ii->enable_reg);
sys/dev/cxgbe/common/t4_hw.c
4811
(void)t4_read_reg(sc, ii->cause_reg);
sys/dev/cxgbe/common/t4_hw.c
4814
(void)t4_read_reg(sc, ii->cause_reg);
sys/dev/cxgbe/common/t4_hw.c
486
pcie_fw = t4_read_reg(adap, A_PCIE_FW);
sys/dev/cxgbe/common/t4_hw.c
4869
cause = t4_read_reg(sc, ii->cause_reg);
sys/dev/cxgbe/common/t4_hw.c
4870
enabled = t4_read_reg(sc, ii->enable_reg);
sys/dev/cxgbe/common/t4_hw.c
4897
(void)t4_read_reg(sc, ii->cause_reg);
sys/dev/cxgbe/common/t4_hw.c
4900
(void)t4_read_reg(sc, ii->cause_reg);
sys/dev/cxgbe/common/t4_hw.c
505
v = t4_read_reg(adap, ctl_reg);
sys/dev/cxgbe/common/t4_hw.c
575
t4_read_reg(adap, edc_ecc_err_addr_reg));
sys/dev/cxgbe/common/t4_hw.c
5759
v = t4_read_reg(adap, A_SGE_ERROR_STATS);
sys/dev/cxgbe/common/t4_hw.c
5952
fw_err = t4_read_reg(adap, A_PCIE_FW);
sys/dev/cxgbe/common/t4_hw.c
5953
val = t4_read_reg(adap, A_CIM_HOST_INT_CAUSE);
sys/dev/cxgbe/common/t4_hw.c
627
if (t4_read_reg(adap, mc_bist_cmd_reg) & F_START_BIST)
sys/dev/cxgbe/common/t4_hw.c
641
*data++ = ntohl(t4_read_reg(adap, MC_DATA(i)));
sys/dev/cxgbe/common/t4_hw.c
66
u32 val = t4_read_reg(adapter, reg);
sys/dev/cxgbe/common/t4_hw.c
684
if (t4_read_reg(adap, edc_bist_cmd_reg) & F_START_BIST)
sys/dev/cxgbe/common/t4_hw.c
698
*data++ = ntohl(t4_read_reg(adap, EDC_DATA(i)));
sys/dev/cxgbe/common/t4_hw.c
7335
t4_read_reg(adap, A_MPS_INT_CAUSE); /* flush */
sys/dev/cxgbe/common/t4_hw.c
7414
v = t4_read_reg(adap, count_reg);
sys/dev/cxgbe/common/t4_hw.c
7439
v = t4_read_reg(adap, A_MA_INT_WRAP_STATUS);
sys/dev/cxgbe/common/t4_hw.c
7819
t4_read_reg(adap, A_PL_TIMEOUT_STATUS0),
sys/dev/cxgbe/common/t4_hw.c
7820
t4_read_reg(adap, A_PL_TIMEOUT_STATUS1));
sys/dev/cxgbe/common/t4_hw.c
8266
cause = t4_read_reg(sc, ii->cause_reg);
sys/dev/cxgbe/common/t4_hw.c
8268
cause &= t4_read_reg(sc, ii->enable_reg);
sys/dev/cxgbe/common/t4_hw.c
9084
u32 vrt = t4_read_reg(adap, A_TP_RSS_CONFIG_VRT);
sys/dev/cxgbe/common/t4_hw.c
9167
vrt = t4_read_reg(adapter, A_TP_RSS_CONFIG_VRT);
sys/dev/cxgbe/common/t4_hw.c
9212
vrt = t4_read_reg(adapter, A_TP_RSS_CONFIG_VRT);
sys/dev/cxgbe/common/t4_hw.c
9503
v = t4_read_reg(adap, A_TP_MTU_TABLE);
sys/dev/cxgbe/common/t4_hw.c
9526
incr[mtu][w] = (u16)t4_read_reg(adap,
sys/dev/cxgbe/common/t4_hw.c
9544
val |= t4_read_reg(adap, A_TP_PIO_DATA) & ~mask;
sys/dev/cxgbe/common/t4_hw.c
9705
v = t4_read_reg(adap, A_TP_TM_PIO_DATA);
sys/dev/cxgbe/common/t4_hw.c
9733
v = t4_read_reg(adap, A_TP_TM_PIO_DATA);
sys/dev/cxgbe/common/t4_hw.c
9739
t4_read_reg(adap, A_TP_TM_PIO_DATA);
sys/dev/cxgbe/common/t4_hw.c
9773
v = t4_read_reg(adap, A_TP_TX_TRATE);
sys/dev/cxgbe/common/t4_hw.c
9781
v = t4_read_reg(adap, A_TP_TX_ORATE);
sys/dev/cxgbe/common/t4_hw.c
9833
cfg = t4_read_reg(adap, A_MPS_TRC_CFG);
sys/dev/cxgbe/common/t4_hw.c
9895
ctla = t4_read_reg(adap, T7_MPS_TRC_FILTER_MATCH_CTL_A(idx));
sys/dev/cxgbe/common/t4_hw.c
9896
ctlb = t4_read_reg(adap, T7_MPS_TRC_FILTER_MATCH_CTL_B(idx));
sys/dev/cxgbe/common/t4_hw.c
9898
ctla = t4_read_reg(adap, MPS_TRC_FILTER_MATCH_CTL_A(idx));
sys/dev/cxgbe/common/t4_hw.c
9899
ctlb = t4_read_reg(adap, MPS_TRC_FILTER_MATCH_CTL_B(idx));
sys/dev/cxgbe/common/t4_hw.c
9921
tp->mask[i] = ~t4_read_reg(adap, mask_reg);
sys/dev/cxgbe/common/t4_hw.c
9922
tp->data[i] = t4_read_reg(adap, data_reg) & tp->mask[i];
sys/dev/cxgbe/common/t4_hw.c
9972
cnt[i] = t4_read_reg(adap, A_PM_TX_STAT_COUNT);
sys/dev/cxgbe/common/t4vf_hw.c
141
whoami = t4_read_reg(adapter, VF_PL_REG(A_PL_VF_WHOAMI));
sys/dev/cxgbe/common/t4vf_hw.c
52
val = t4_read_reg(adapter, whoami);
sys/dev/cxgbe/common/t4vf_hw.c
56
val = t4_read_reg(adapter, whoami);
sys/dev/cxgbe/cudbg/cudbg_lib.c
1001
md->base = t4_read_reg(padap, A_ULP_TX_ERR_TABLE_BASE);
sys/dev/cxgbe/cudbg/cudbg_lib.c
1028
lo = t4_read_reg(padap, A_CIM_SDRAM_BASE_ADDR);
sys/dev/cxgbe/cudbg/cudbg_lib.c
1029
hi = t4_read_reg(padap, A_CIM_SDRAM_ADDR_SIZE) + lo - 1;
sys/dev/cxgbe/cudbg/cudbg_lib.c
1033
lo = t4_read_reg(padap, A_CIM_EXTMEM2_BASE_ADDR);
sys/dev/cxgbe/cudbg/cudbg_lib.c
1034
hi = t4_read_reg(padap, A_CIM_EXTMEM2_ADDR_SIZE) + lo - 1;
sys/dev/cxgbe/cudbg/cudbg_lib.c
1038
lo = t4_read_reg(padap, A_TP_PMM_RX_MAX_PAGE);
sys/dev/cxgbe/cudbg/cudbg_lib.c
1041
t4_read_reg(padap, A_TP_PMM_RX_PAGE_SIZE) >> 10;
sys/dev/cxgbe/cudbg/cudbg_lib.c
1044
lo = t4_read_reg(padap, A_TP_PMM_TX_MAX_PAGE);
sys/dev/cxgbe/cudbg/cudbg_lib.c
1045
hi = t4_read_reg(padap, A_TP_PMM_TX_PAGE_SIZE);
sys/dev/cxgbe/cudbg/cudbg_lib.c
1055
lo = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_lib.c
1058
lo = t4_read_reg(padap, A_MPS_RX_PG_RSV0 + i * 4);
sys/dev/cxgbe/cudbg/cudbg_lib.c
1072
lo = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_lib.c
1075
lo = t4_read_reg(padap, A_MPS_RX_PG_RSV4 + i * 4);
sys/dev/cxgbe/cudbg/cudbg_lib.c
1225
clk_info_buff->res = t4_read_reg(padap, A_TP_TIMER_RESOLUTION);
sys/dev/cxgbe/cudbg/cudbg_lib.c
1232
t4_read_reg(padap, A_TP_DACK_TIMER);
sys/dev/cxgbe/cudbg/cudbg_lib.c
1235
tp_tick_us * t4_read_reg(padap, A_TP_RXT_MIN);
sys/dev/cxgbe/cudbg/cudbg_lib.c
1237
tp_tick_us * t4_read_reg(padap, A_TP_RXT_MAX);
sys/dev/cxgbe/cudbg/cudbg_lib.c
1240
tp_tick_us * t4_read_reg(padap, A_TP_PERS_MIN);
sys/dev/cxgbe/cudbg/cudbg_lib.c
1242
tp_tick_us * t4_read_reg(padap, A_TP_PERS_MAX);
sys/dev/cxgbe/cudbg/cudbg_lib.c
1245
tp_tick_us * t4_read_reg(padap, A_TP_KEEP_IDLE);
sys/dev/cxgbe/cudbg/cudbg_lib.c
1247
tp_tick_us * t4_read_reg(padap, A_TP_KEEP_INTVL);
sys/dev/cxgbe/cudbg/cudbg_lib.c
1250
tp_tick_us * G_INITSRTT(t4_read_reg(padap, A_TP_INIT_SRTT));
sys/dev/cxgbe/cudbg/cudbg_lib.c
1252
tp_tick_us * t4_read_reg(padap, A_TP_FINWAIT2_TIMER);
sys/dev/cxgbe/cudbg/cudbg_lib.c
1364
tp_la_buff->mode = G_DBGLAMODE(t4_read_reg(padap, A_TP_DBG_LA_CONFIG));
sys/dev/cxgbe/cudbg/cudbg_lib.c
1505
hw_sched_buff->map = t4_read_reg(padap, A_TP_TX_MOD_QUEUE_REQ_MAP);
sys/dev/cxgbe/cudbg/cudbg_lib.c
1506
hw_sched_buff->mode = G_TIMERMODE(t4_read_reg(padap, A_TP_MOD_CONFIG));
sys/dev/cxgbe/cudbg/cudbg_lib.c
1631
rss_conf->tp_rssconf = t4_read_reg(padap, A_TP_RSS_CONFIG);
sys/dev/cxgbe/cudbg/cudbg_lib.c
1632
rss_conf->tp_rssconf_tnl = t4_read_reg(padap, A_TP_RSS_CONFIG_TNL);
sys/dev/cxgbe/cudbg/cudbg_lib.c
1633
rss_conf->tp_rssconf_ofd = t4_read_reg(padap, A_TP_RSS_CONFIG_OFD);
sys/dev/cxgbe/cudbg/cudbg_lib.c
1634
rss_conf->tp_rssconf_syn = t4_read_reg(padap, A_TP_RSS_CONFIG_SYN);
sys/dev/cxgbe/cudbg/cudbg_lib.c
1635
rss_conf->tp_rssconf_vrt = t4_read_reg(padap, A_TP_RSS_CONFIG_VRT);
sys/dev/cxgbe/cudbg/cudbg_lib.c
1636
rss_conf->tp_rssconf_cng = t4_read_reg(padap, A_TP_RSS_CONFIG_CNG);
sys/dev/cxgbe/cudbg/cudbg_lib.c
1797
value = t4_read_reg(padap, A_SGE_FLM_CFG);
sys/dev/cxgbe/cudbg/cudbg_lib.c
2679
value = t4_read_reg(padap, A_MA_EXT_MEMORY_BAR);
sys/dev/cxgbe/cudbg/cudbg_lib.c
2683
value = t4_read_reg(padap, A_MA_TARGET_MEM_ENABLE);
sys/dev/cxgbe/cudbg/cudbg_lib.c
2688
value = t4_read_reg(padap, A_MA_EXT_MEMORY0_BAR);
sys/dev/cxgbe/cudbg/cudbg_lib.c
2692
value = t4_read_reg(padap, A_MA_EXT_MEMORY1_BAR);
sys/dev/cxgbe/cudbg/cudbg_lib.c
2696
value = t4_read_reg(padap, A_MA_TARGET_MEM_ENABLE);
sys/dev/cxgbe/cudbg/cudbg_lib.c
2703
value = t4_read_reg(padap, A_MA_EDRAM0_BAR);
sys/dev/cxgbe/cudbg/cudbg_lib.c
2707
value = t4_read_reg(padap, A_MA_EDRAM1_BAR);
sys/dev/cxgbe/cudbg/cudbg_lib.c
2711
value = t4_read_reg(padap, A_MA_TARGET_MEM_ENABLE);
sys/dev/cxgbe/cudbg/cudbg_lib.c
2954
val = t4_read_reg(padap, A_CIM_HOST_ACC_CTRL);
sys/dev/cxgbe/cudbg/cudbg_lib.c
2978
*val = t4_read_reg(padap, A_CIM_HOST_ACC_DATA);
sys/dev/cxgbe/cudbg/cudbg_lib.c
3327
tid->hash_base = t4_read_reg(padap, A_LE_DB_TID_HASHBASE);
sys/dev/cxgbe/cudbg/cudbg_lib.c
3330
tid->hash_base = t4_read_reg(padap, A_T6_LE_DB_HASH_TID_BASE);
sys/dev/cxgbe/cudbg/cudbg_lib.c
3331
tid1->tid_start = t4_read_reg(padap, A_LE_DB_ACTIVE_TABLE_START_INDEX);
sys/dev/cxgbe/cudbg/cudbg_lib.c
3334
tid->le_db_conf = t4_read_reg(padap, A_LE_DB_CONFIG);
sys/dev/cxgbe/cudbg/cudbg_lib.c
3401
tid->sb = t4_read_reg(padap, A_LE_DB_SERVER_INDEX) / 4;
sys/dev/cxgbe/cudbg/cudbg_lib.c
3404
tid->sb = t4_read_reg(padap, A_LE_DB_SRVR_START_INDEX);
sys/dev/cxgbe/cudbg/cudbg_lib.c
3420
tid->IP_users = t4_read_reg(padap, A_LE_DB_ACT_CNT_IPV4);
sys/dev/cxgbe/cudbg/cudbg_lib.c
3421
tid->IPv6_users = t4_read_reg(padap, A_LE_DB_ACT_CNT_IPV6);
sys/dev/cxgbe/cudbg/cudbg_lib.c
3482
mps_rplc->rplc255_224 = htonl(t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_lib.c
3484
mps_rplc->rplc223_192 = htonl(t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_lib.c
3486
mps_rplc->rplc191_160 = htonl(t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_lib.c
3488
mps_rplc->rplc159_128 = htonl(t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_lib.c
3491
mps_rplc->rplc255_224 = htonl(t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_lib.c
3493
mps_rplc->rplc223_192 = htonl(t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_lib.c
3495
mps_rplc->rplc191_160 = htonl(t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_lib.c
3497
mps_rplc->rplc159_128 = htonl(t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_lib.c
3500
mps_rplc->rplc127_96 = htonl(t4_read_reg(padap, A_MPS_VF_RPLCT_MAP3));
sys/dev/cxgbe/cudbg/cudbg_lib.c
3501
mps_rplc->rplc95_64 = htonl(t4_read_reg(padap, A_MPS_VF_RPLCT_MAP2));
sys/dev/cxgbe/cudbg/cudbg_lib.c
3502
mps_rplc->rplc63_32 = htonl(t4_read_reg(padap, A_MPS_VF_RPLCT_MAP1));
sys/dev/cxgbe/cudbg/cudbg_lib.c
3503
mps_rplc->rplc31_0 = htonl(t4_read_reg(padap, A_MPS_VF_RPLCT_MAP0));
sys/dev/cxgbe/cudbg/cudbg_lib.c
3546
val = t4_read_reg(padap, A_MPS_CLS_TCAM_RDATA1_REQ_ID1);
sys/dev/cxgbe/cudbg/cudbg_lib.c
3548
tcamy |= t4_read_reg(padap, A_MPS_CLS_TCAM_RDATA0_REQ_ID1);
sys/dev/cxgbe/cudbg/cudbg_lib.c
3549
data2 = t4_read_reg(padap, A_MPS_CLS_TCAM_RDATA2_REQ_ID1);
sys/dev/cxgbe/cudbg/cudbg_lib.c
3574
val = t4_read_reg(padap, A_MPS_CLS_TCAM_RDATA1_REQ_ID1);
sys/dev/cxgbe/cudbg/cudbg_lib.c
3576
tcamx |= t4_read_reg(padap, A_MPS_CLS_TCAM_RDATA0_REQ_ID1);
sys/dev/cxgbe/cudbg/cudbg_lib.c
3577
data2 = t4_read_reg(padap, A_MPS_CLS_TCAM_RDATA2_REQ_ID1);
sys/dev/cxgbe/cudbg/cudbg_lib.c
3593
tcam->cls_lo = t4_read_reg(padap, MPS_CLS_SRAM_L(i));
sys/dev/cxgbe/cudbg/cudbg_lib.c
3594
tcam->cls_hi = t4_read_reg(padap, MPS_CLS_SRAM_H(i));
sys/dev/cxgbe/cudbg/cudbg_lib.c
3735
val = t4_read_reg(padap, A_LE_DB_DBGI_CONFIG);
sys/dev/cxgbe/cudbg/cudbg_lib.c
3748
val = t4_read_reg(padap, A_LE_DB_DBGI_RSP_STATUS);
sys/dev/cxgbe/cudbg/cudbg_lib.c
3758
tid_data->data[i] = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_lib.c
3780
value = t4_read_reg(padap, A_LE_DB_TID_HASHBASE); /* Get hash base
sys/dev/cxgbe/cudbg/cudbg_lib.c
3785
value = t4_read_reg(padap, A_LE_DB_ROUTING_TABLE_INDEX);
sys/dev/cxgbe/cudbg/cudbg_lib.c
3789
value = t4_read_reg(padap, A_LE_DB_CLIP_TABLE_INDEX);
sys/dev/cxgbe/cudbg/cudbg_lib.c
3793
value = t4_read_reg(padap, A_LE_DB_FILTER_TABLE_INDEX);
sys/dev/cxgbe/cudbg/cudbg_lib.c
3797
value = t4_read_reg(padap, A_LE_DB_SERVER_INDEX);
sys/dev/cxgbe/cudbg/cudbg_lib.c
3801
value = t4_read_reg(padap, A_LE_DB_CONFIG);
sys/dev/cxgbe/cudbg/cudbg_lib.c
3803
value = t4_read_reg(padap, A_LE_DB_HASH_CONFIG);
sys/dev/cxgbe/cudbg/cudbg_lib.c
4346
*sp = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH_INDEX_10);
sys/dev/cxgbe/cudbg/cudbg_lib.c
622
swstate->fw_state = t4_read_reg(padap, A_PCIE_FW);
sys/dev/cxgbe/cudbg/cudbg_lib.c
692
ulptx_la_buff->rdptr[i] = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_lib.c
695
ulptx_la_buff->wrptr[i] = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_lib.c
698
ulptx_la_buff->rddata[i] = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_lib.c
703
t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_lib.c
810
val1 = t4_read_reg(padap, A_SGE_STAT_TOTAL);
sys/dev/cxgbe/cudbg/cudbg_lib.c
811
val2 = t4_read_reg(padap, A_SGE_STAT_MATCH);
sys/dev/cxgbe/cudbg/cudbg_lib.c
860
lo = t4_read_reg(padap, A_MA_TARGET_MEM_ENABLE);
sys/dev/cxgbe/cudbg/cudbg_lib.c
863
hi = t4_read_reg(padap, A_MA_EDRAM0_BAR);
sys/dev/cxgbe/cudbg/cudbg_lib.c
872
hi = t4_read_reg(padap, A_MA_EDRAM1_BAR);
sys/dev/cxgbe/cudbg/cudbg_lib.c
882
hi = t4_read_reg(padap, A_MA_EXT_MEMORY0_BAR);
sys/dev/cxgbe/cudbg/cudbg_lib.c
892
hi = t4_read_reg(padap, A_MA_EXT_MEMORY1_BAR);
sys/dev/cxgbe/cudbg/cudbg_lib.c
902
hi = t4_read_reg(padap, A_MA_EXT_MEMORY_BAR);
sys/dev/cxgbe/cudbg/cudbg_lib.c
920
(md++)->base = t4_read_reg(padap, A_SGE_DBQ_CTXT_BADDR);
sys/dev/cxgbe/cudbg/cudbg_lib.c
921
(md++)->base = t4_read_reg(padap, A_SGE_IMSG_CTXT_BADDR);
sys/dev/cxgbe/cudbg/cudbg_lib.c
922
(md++)->base = t4_read_reg(padap, A_SGE_FLM_CACHE_BADDR);
sys/dev/cxgbe/cudbg/cudbg_lib.c
923
(md++)->base = t4_read_reg(padap, A_TP_CMM_TCB_BASE);
sys/dev/cxgbe/cudbg/cudbg_lib.c
924
(md++)->base = t4_read_reg(padap, A_TP_CMM_MM_BASE);
sys/dev/cxgbe/cudbg/cudbg_lib.c
925
(md++)->base = t4_read_reg(padap, A_TP_CMM_TIMER_BASE);
sys/dev/cxgbe/cudbg/cudbg_lib.c
926
(md++)->base = t4_read_reg(padap, A_TP_CMM_MM_RX_FLST_BASE);
sys/dev/cxgbe/cudbg/cudbg_lib.c
927
(md++)->base = t4_read_reg(padap, A_TP_CMM_MM_TX_FLST_BASE);
sys/dev/cxgbe/cudbg/cudbg_lib.c
928
(md++)->base = t4_read_reg(padap, A_TP_CMM_MM_PS_FLST_BASE);
sys/dev/cxgbe/cudbg/cudbg_lib.c
931
md->base = t4_read_reg(padap, A_TP_PMM_TX_BASE);
sys/dev/cxgbe/cudbg/cudbg_lib.c
933
t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_lib.c
935
G_PMTXMAXPAGE(t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_lib.c
940
md->base = t4_read_reg(padap, A_TP_PMM_RX_BASE);
sys/dev/cxgbe/cudbg/cudbg_lib.c
942
t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_lib.c
944
G_PMRXMAXPAGE(t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_lib.c
948
if (t4_read_reg(padap, A_LE_DB_CONFIG) & F_HASHEN) {
sys/dev/cxgbe/cudbg/cudbg_lib.c
950
hi = t4_read_reg(padap, A_LE_DB_TID_HASHBASE) / 4;
sys/dev/cxgbe/cudbg/cudbg_lib.c
951
md->base = t4_read_reg(padap, A_LE_DB_HASH_TID_BASE);
sys/dev/cxgbe/cudbg/cudbg_lib.c
953
hi = t4_read_reg(padap, A_LE_DB_HASH_TID_BASE);
sys/dev/cxgbe/cudbg/cudbg_lib.c
954
md->base = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_lib.c
965
md->base = t4_read_reg(padap, A_ULP_ ## reg ## _LLIMIT);\
sys/dev/cxgbe/cudbg/cudbg_lib.c
966
(md++)->limit = t4_read_reg(padap, A_ULP_ ## reg ## _ULIMIT);\
sys/dev/cxgbe/cudbg/cudbg_lib.c
981
u32 sge_ctrl = t4_read_reg(padap, A_SGE_CONTROL2);
sys/dev/cxgbe/cudbg/cudbg_lib.c
982
u32 fifo_size = t4_read_reg(padap, A_SGE_DBVFIFO_SIZE);
sys/dev/cxgbe/cudbg/cudbg_lib.c
990
md->base = G_BASEADDR(t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_lib.c
998
md->base = t4_read_reg(padap, A_ULP_RX_CTX_BASE);
sys/dev/cxgbe/cudbg/cudbg_wtp.c
1006
value = t4_read_reg(padap, A_PCIE_T5_DMA_STAT3 + (i * 0x10));
sys/dev/cxgbe/cudbg/cudbg_wtp.c
1013
value = t4_read_reg(padap, A_ULP_TX_SE_CNT_CH0 + (i * 4));
sys/dev/cxgbe/cudbg/cudbg_wtp.c
1039
value = t4_read_reg(padap, (A_MPS_TX_SE_CNT_TP01 + (i << 2)));
sys/dev/cxgbe/cudbg/cudbg_wtp.c
1049
value = t4_read_reg(padap, (A_MPS_TX_SE_CNT_MAC01 + (i << 2)));
sys/dev/cxgbe/cudbg/cudbg_wtp.c
1060
value = t4_read_reg(padap, 0x3081c + ((i * 4) << 12));
sys/dev/cxgbe/cudbg/cudbg_wtp.c
1068
value = t4_read_reg(padap, 0x30f20 + ((i * 4) << 12));
sys/dev/cxgbe/cudbg/cudbg_wtp.c
1076
value = t4_read_reg(padap, 0x30f60 + ((i * 4) << 12));
sys/dev/cxgbe/cudbg/cudbg_wtp.c
1083
value = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH_INDEX_7);
sys/dev/cxgbe/cudbg/cudbg_wtp.c
1090
value = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH_INDEX_1);
sys/dev/cxgbe/cudbg/cudbg_wtp.c
1096
value = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH_INDEX_9);
sys/dev/cxgbe/cudbg/cudbg_wtp.c
1114
value = t4_read_reg(padap, (A_ULP_RX_SE_CNT_CH0 + (i*4)));
sys/dev/cxgbe/cudbg/cudbg_wtp.c
1123
value = t4_read_reg(padap, A_LE_DB_REQ_RSP_CNT);
sys/dev/cxgbe/cudbg/cudbg_wtp.c
1138
value = t4_read_reg(padap, (A_MPS_RX_SE_CNT_OUT01 + (i << 2)));
sys/dev/cxgbe/cudbg/cudbg_wtp.c
1158
value = t4_read_reg(padap, (A_MPS_RX_SE_CNT_IN0 + (i << 2)));
sys/dev/cxgbe/cudbg/cudbg_wtp.c
1164
value = t4_read_reg(padap, (A_MPS_RX_CLS_DROP_CNT0 + (i << 2)));
sys/dev/cxgbe/cudbg/cudbg_wtp.c
1170
value = t4_read_reg(padap, 0x30e20 + ((i * 4) << 12));
sys/dev/cxgbe/cudbg/cudbg_wtp.c
1177
value = t4_read_reg(padap, 0x30e60 + ((i * 4) << 12));
sys/dev/cxgbe/cudbg/cudbg_wtp.c
1190
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
1194
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
1197
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
1201
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
1205
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
1209
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
1212
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
1216
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
1220
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
1231
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
1235
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
1239
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
1243
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
1247
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
1251
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
1255
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
1259
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
1263
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
1267
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
1271
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
1275
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
264
value = t4_read_reg(padap, A_SGE_DEBUG_DATA_LOW);
sys/dev/cxgbe/cudbg/cudbg_wtp.c
267
value = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH);
sys/dev/cxgbe/cudbg/cudbg_wtp.c
332
value = t4_read_reg(padap, A_PCIE_CMDR_REQ_CNT);
sys/dev/cxgbe/cudbg/cudbg_wtp.c
342
value = t4_read_reg(padap, A_PCIE_T5_DMA_STAT3 + (i * 0x10));
sys/dev/cxgbe/cudbg/cudbg_wtp.c
348
value = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH_INDEX_6);
sys/dev/cxgbe/cudbg/cudbg_wtp.c
359
value = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH_INDEX_3);
sys/dev/cxgbe/cudbg/cudbg_wtp.c
371
value = t4_read_reg(padap, A_ULP_TX_SE_CNT_CH0 + (i * 4));
sys/dev/cxgbe/cudbg/cudbg_wtp.c
378
value = t4_read_reg(padap, 0x3081c + ((i * 4) << 12));
sys/dev/cxgbe/cudbg/cudbg_wtp.c
387
value = t4_read_reg(padap, 0x30a80 + ((i * 4) << 12));
sys/dev/cxgbe/cudbg/cudbg_wtp.c
393
value = t4_read_reg(padap, A_PCIE_CMDR_RSP_CNT);
sys/dev/cxgbe/cudbg/cudbg_wtp.c
438
value = t4_read_reg(padap, A_PCIE_DMAR_REQ_CNT);
sys/dev/cxgbe/cudbg/cudbg_wtp.c
451
value = t4_read_reg(padap, A_PCIE_DMAR_RSP_SOP_CNT);
sys/dev/cxgbe/cudbg/cudbg_wtp.c
458
value = t4_read_reg(padap, A_PCIE_DMAR_RSP_EOP_CNT);
sys/dev/cxgbe/cudbg/cudbg_wtp.c
489
value = t4_read_reg(padap, (A_ULP_TX_SE_CNT_CH0 + (i*4)));
sys/dev/cxgbe/cudbg/cudbg_wtp.c
528
value = t4_read_reg(padap, 0x5988 + (i * 0x10));
sys/dev/cxgbe/cudbg/cudbg_wtp.c
535
value = t4_read_reg(padap, 0x598c + (i * 0x10));
sys/dev/cxgbe/cudbg/cudbg_wtp.c
542
value = t4_read_reg(padap, (A_ULP_RX_SE_CNT_CH0 + (i*4)));
sys/dev/cxgbe/cudbg/cudbg_wtp.c
553
value = t4_read_reg(padap, (A_MPS_TX_SE_CNT_TP01 + (i << 2)));
sys/dev/cxgbe/cudbg/cudbg_wtp.c
574
value = t4_read_reg(padap, (A_MPS_TX_SE_CNT_MAC01 + (i << 2)));
sys/dev/cxgbe/cudbg/cudbg_wtp.c
583
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
596
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
609
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
624
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
638
value = t4_read_reg(padap, (A_MPS_RX_SE_CNT_IN0 + (i << 2)));
sys/dev/cxgbe/cudbg/cudbg_wtp.c
644
value = t4_read_reg(padap, (A_MPS_RX_CLS_DROP_CNT0 + (i << 2)));
sys/dev/cxgbe/cudbg/cudbg_wtp.c
653
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
657
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
660
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
664
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
668
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
672
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
675
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
679
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
683
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
694
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
698
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
702
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
706
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
710
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
714
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
718
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
722
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
726
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
730
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
734
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
738
value = t4_read_reg(padap,
sys/dev/cxgbe/cudbg/cudbg_wtp.c
746
value = t4_read_reg(padap, (A_MPS_RX_SE_CNT_OUT01 + (i << 2)));
sys/dev/cxgbe/cudbg/cudbg_wtp.c
826
value = t4_read_reg(padap, A_PCIE_T5_DMA_STAT2 + (i * 0x10));
sys/dev/cxgbe/cudbg/cudbg_wtp.c
835
value = t4_read_reg(padap, 0x30a88 + ((i * 4) << 12));
sys/dev/cxgbe/cudbg/cudbg_wtp.c
841
value = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH_INDEX_7);
sys/dev/cxgbe/cudbg/cudbg_wtp.c
852
value = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH_INDEX_1);
sys/dev/cxgbe/cudbg/cudbg_wtp.c
869
value = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH_INDEX_9);
sys/dev/cxgbe/cudbg/cudbg_wtp.c
878
value = t4_read_reg(padap, A_LE_DB_REQ_RSP_CNT);
sys/dev/cxgbe/cudbg/cudbg_wtp.c
892
value = t4_read_reg(padap, A_PCIE_DMAW_SOP_CNT);
sys/dev/cxgbe/cudbg/cudbg_wtp.c
899
value = t4_read_reg(padap, A_PCIE_DMAW_EOP_CNT);
sys/dev/cxgbe/cudbg/cudbg_wtp.c
906
value = t4_read_reg(padap, A_PCIE_DMAI_CNT);
sys/dev/cxgbe/cudbg/cudbg_wtp.c
964
value = t4_read_reg(padap, A_PCIE_T5_CMD_STAT2);
sys/dev/cxgbe/cudbg/cudbg_wtp.c
968
value = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH_INDEX_7);
sys/dev/cxgbe/cudbg/cudbg_wtp.c
974
value = t4_read_reg(padap, A_PCIE_T5_CMD_STAT3);
sys/dev/cxgbe/cudbg/cudbg_wtp.c
992
value = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH_INDEX_9);
sys/dev/cxgbe/cudbg/cudbg_wtp.c
997
value = t4_read_reg(padap, A_PCIE_T5_DMA_STAT2 + (i * 0x10));
sys/dev/cxgbe/cxgbei/cxgbei.c
101
rx_len = t4_read_reg(sc, A_TP_PMM_RX_PAGE_SIZE);
sys/dev/cxgbe/cxgbei/cxgbei.c
102
tx_len = t4_read_reg(sc, A_TP_PMM_TX_PAGE_SIZE);
sys/dev/cxgbe/cxgbei/cxgbei.c
104
r = t4_read_reg(sc, A_TP_PARA_REG2);
sys/dev/cxgbe/cxgbei/cxgbei.c
108
r = t4_read_reg(sc, A_TP_PARA_REG7);
sys/dev/cxgbe/cxgbei/cxgbei.c
159
r = t4_read_reg(sc, A_ULP_RX_ISCSI_PSZ);
sys/dev/cxgbe/cxgbei/icl_cxgbei.c
985
em = t4_read_reg(sc, A_MA_TARGET_MEM_ENABLE);
sys/dev/cxgbe/nvmf/nvmf_che.c
3124
rx_len = t4_read_reg(sc, A_TP_PMM_RX_PAGE_SIZE);
sys/dev/cxgbe/nvmf/nvmf_che.c
3125
tx_len = t4_read_reg(sc, A_TP_PMM_TX_PAGE_SIZE);
sys/dev/cxgbe/nvmf/nvmf_che.c
3127
r = t4_read_reg(sc, A_TP_PARA_REG2);
sys/dev/cxgbe/nvmf/nvmf_che.c
3131
r = t4_read_reg(sc, A_TP_PARA_REG7);
sys/dev/cxgbe/nvmf/nvmf_che.c
3156
val = t4_read_reg(sc, A_SGE_CONTROL2);
sys/dev/cxgbe/t4_filter.c
737
tcb_addr = t4_read_reg(sc, A_TP_CMM_TCB_BASE) + tid * TCB_SIZE;
sys/dev/cxgbe/t4_main.c
10344
map = t4_read_reg(sc, A_TP_TX_MOD_QUEUE_REQ_MAP);
sys/dev/cxgbe/t4_main.c
10345
mode = G_TIMERMODE(t4_read_reg(sc, A_TP_MOD_CONFIG));
sys/dev/cxgbe/t4_main.c
10540
lo = t4_read_reg(sc, A_MA_TARGET_MEM_ENABLE);
sys/dev/cxgbe/t4_main.c
10542
hi = t4_read_reg(sc, A_MA_EDRAM0_BAR);
sys/dev/cxgbe/t4_main.c
10556
hi = t4_read_reg(sc, A_MA_EDRAM1_BAR);
sys/dev/cxgbe/t4_main.c
10573
hi = t4_read_reg(sc, A_MA_EXT_MEMORY_BAR);
sys/dev/cxgbe/t4_main.c
10580
hi = t4_read_reg(sc, A_MA_EXT_MEMORY0_BAR);
sys/dev/cxgbe/t4_main.c
10587
hi = t4_read_reg(sc, A_MA_EXT_MEMORY0_BAR);
sys/dev/cxgbe/t4_main.c
10600
hi = t4_read_reg(sc, A_MA_EXT_MEMORY1_BAR);
sys/dev/cxgbe/t4_main.c
10618
hi = t4_read_reg(sc, A_MA_HOST_MEMORY_BAR);
sys/dev/cxgbe/t4_main.c
10623
hi = t4_read_reg(sc, A_MA_EXT_MEMORY1_BAR);
sys/dev/cxgbe/t4_main.c
10637
(md++)->base = t4_read_reg(sc, A_SGE_DBQ_CTXT_BADDR);
sys/dev/cxgbe/t4_main.c
10638
(md++)->base = t4_read_reg(sc, A_SGE_IMSG_CTXT_BADDR);
sys/dev/cxgbe/t4_main.c
10639
(md++)->base = t4_read_reg(sc, A_SGE_FLM_CACHE_BADDR);
sys/dev/cxgbe/t4_main.c
10640
(md++)->base = t4_read_reg(sc, A_TP_CMM_TCB_BASE);
sys/dev/cxgbe/t4_main.c
10641
(md++)->base = t4_read_reg(sc, A_TP_CMM_MM_BASE);
sys/dev/cxgbe/t4_main.c
10642
(md++)->base = t4_read_reg(sc, A_TP_CMM_TIMER_BASE);
sys/dev/cxgbe/t4_main.c
10643
(md++)->base = t4_read_reg(sc, A_TP_CMM_MM_RX_FLST_BASE);
sys/dev/cxgbe/t4_main.c
10644
(md++)->base = t4_read_reg(sc, A_TP_CMM_MM_TX_FLST_BASE);
sys/dev/cxgbe/t4_main.c
10645
(md++)->base = t4_read_reg(sc, A_TP_CMM_MM_PS_FLST_BASE);
sys/dev/cxgbe/t4_main.c
10648
md->base = t4_read_reg(sc, A_TP_PMM_TX_BASE);
sys/dev/cxgbe/t4_main.c
10650
t4_read_reg(sc, A_TP_PMM_TX_PAGE_SIZE) *
sys/dev/cxgbe/t4_main.c
10651
G_PMTXMAXPAGE(t4_read_reg(sc, A_TP_PMM_TX_MAX_PAGE));
sys/dev/cxgbe/t4_main.c
10654
md->base = t4_read_reg(sc, A_TP_PMM_RX_BASE);
sys/dev/cxgbe/t4_main.c
10656
t4_read_reg(sc, A_TP_PMM_RX_PAGE_SIZE) *
sys/dev/cxgbe/t4_main.c
10657
G_PMRXMAXPAGE(t4_read_reg(sc, A_TP_PMM_RX_MAX_PAGE));
sys/dev/cxgbe/t4_main.c
10660
if (t4_read_reg(sc, A_LE_DB_CONFIG) & F_HASHEN) {
sys/dev/cxgbe/t4_main.c
10662
md->base = t4_read_reg(sc, A_LE_DB_HASH_TID_BASE);
sys/dev/cxgbe/t4_main.c
10664
md->base = t4_read_reg(sc, A_LE_DB_HASH_TBL_BASE_ADDR);
sys/dev/cxgbe/t4_main.c
10674
md->base = (uint64_t)t4_read_reg(sc, A_ULP_ ## reg ## _LLIMIT) << shift; \
sys/dev/cxgbe/t4_main.c
10675
md->limit = (uint64_t)t4_read_reg(sc, A_ULP_ ## reg ## _ULIMIT) << shift; \
sys/dev/cxgbe/t4_main.c
10724
uint32_t sge_ctrl = t4_read_reg(sc, A_SGE_CONTROL2);
sys/dev/cxgbe/t4_main.c
10725
uint32_t fifo_size = t4_read_reg(sc, A_SGE_DBVFIFO_SIZE);
sys/dev/cxgbe/t4_main.c
10734
md->base = t4_read_reg(sc, A_SGE_DBVFIFO_BADDR);
sys/dev/cxgbe/t4_main.c
10741
md->base = t4_read_reg(sc, A_ULP_RX_CTX_BASE);
sys/dev/cxgbe/t4_main.c
10744
md->base = t4_read_reg(sc, A_ULP_TX_ERR_TABLE_BASE);
sys/dev/cxgbe/t4_main.c
10789
lo = t4_read_reg(sc, A_CIM_SDRAM_BASE_ADDR);
sys/dev/cxgbe/t4_main.c
10790
hi = t4_read_reg(sc, A_CIM_SDRAM_ADDR_SIZE) + lo - 1;
sys/dev/cxgbe/t4_main.c
10796
lo = t4_read_reg(sc, A_CIM_EXTMEM2_BASE_ADDR);
sys/dev/cxgbe/t4_main.c
10797
hi = t4_read_reg(sc, A_CIM_EXTMEM2_ADDR_SIZE) + lo - 1;
sys/dev/cxgbe/t4_main.c
10801
lo = t4_read_reg(sc, A_TP_PMM_RX_MAX_PAGE);
sys/dev/cxgbe/t4_main.c
10807
free += G_FREERXPAGECOUNT(t4_read_reg(sc, A_TP_FLM_FREE_RX_CNT));
sys/dev/cxgbe/t4_main.c
10810
t4_read_reg(sc, A_TP_PMM_RX_PAGE_SIZE) >> 10, nchan);
sys/dev/cxgbe/t4_main.c
10812
lo = t4_read_reg(sc, A_TP_PMM_TX_MAX_PAGE);
sys/dev/cxgbe/t4_main.c
10813
hi = t4_read_reg(sc, A_TP_PMM_TX_PAGE_SIZE);
sys/dev/cxgbe/t4_main.c
10819
free += G_FREETXPAGECOUNT(t4_read_reg(sc, A_TP_FLM_FREE_TX_CNT));
sys/dev/cxgbe/t4_main.c
10825
t4_read_reg(sc, A_TP_CMM_MM_MAX_PSTRUCT),
sys/dev/cxgbe/t4_main.c
10826
G_FREEPSTRUCTCOUNT(t4_read_reg(sc, A_TP_FLM_FREE_PS_CNT)));
sys/dev/cxgbe/t4_main.c
10830
lo = t4_read_reg(sc, A_MPS_RX_MAC_BG_PG_CNT0 + i * 4);
sys/dev/cxgbe/t4_main.c
10832
lo = t4_read_reg(sc, A_MPS_RX_PG_RSV0 + i * 4);
sys/dev/cxgbe/t4_main.c
10846
lo = t4_read_reg(sc, A_MPS_RX_LPBK_BG_PG_CNT0 + i * 4);
sys/dev/cxgbe/t4_main.c
10848
lo = t4_read_reg(sc, A_MPS_RX_PG_RSV4 + i * 4);
sys/dev/cxgbe/t4_main.c
10916
cls_lo = t4_read_reg(sc, MPS_CLS_SRAM_L(i));
sys/dev/cxgbe/t4_main.c
10917
cls_hi = t4_read_reg(sc, MPS_CLS_SRAM_H(i));
sys/dev/cxgbe/t4_main.c
11014
val = t4_read_reg(sc, A_MPS_CLS_TCAM_RDATA1_REQ_ID1);
sys/dev/cxgbe/t4_main.c
11016
tcamy |= t4_read_reg(sc, A_MPS_CLS_TCAM_RDATA0_REQ_ID1);
sys/dev/cxgbe/t4_main.c
11017
data2 = t4_read_reg(sc, A_MPS_CLS_TCAM_RDATA2_REQ_ID1);
sys/dev/cxgbe/t4_main.c
11044
val = t4_read_reg(sc, A_MPS_CLS_TCAM_RDATA1_REQ_ID1);
sys/dev/cxgbe/t4_main.c
11046
tcamx |= t4_read_reg(sc, A_MPS_CLS_TCAM_RDATA0_REQ_ID1);
sys/dev/cxgbe/t4_main.c
11047
data2 = t4_read_reg(sc, A_MPS_CLS_TCAM_RDATA2_REQ_ID1);
sys/dev/cxgbe/t4_main.c
11068
cls_lo = t4_read_reg(sc, MPS_CLS_SRAM_L(i));
sys/dev/cxgbe/t4_main.c
11069
cls_hi = t4_read_reg(sc, MPS_CLS_SRAM_H(i));
sys/dev/cxgbe/t4_main.c
11208
val = t4_read_reg(sc, A_MPS_CLS_TCAM0_RDATA1_REQ_ID1);
sys/dev/cxgbe/t4_main.c
11210
tcamy |= t4_read_reg(sc, A_MPS_CLS_TCAM0_RDATA0_REQ_ID1);
sys/dev/cxgbe/t4_main.c
11211
data2 = t4_read_reg(sc, A_MPS_CLS_TCAM0_RDATA2_REQ_ID1);
sys/dev/cxgbe/t4_main.c
11238
val = t4_read_reg(sc, A_MPS_CLS_TCAM0_RDATA1_REQ_ID1);
sys/dev/cxgbe/t4_main.c
11240
tcamx |= t4_read_reg(sc, A_MPS_CLS_TCAM0_RDATA0_REQ_ID1);
sys/dev/cxgbe/t4_main.c
11241
data2 = t4_read_reg(sc, A_MPS_CLS_TCAM0_RDATA2_REQ_ID1);
sys/dev/cxgbe/t4_main.c
11263
cls_lo = t4_read_reg(sc, MPS_CLS_SRAM_L(i));
sys/dev/cxgbe/t4_main.c
11264
cls_hi = t4_read_reg(sc, MPS_CLS_SRAM_H(i));
sys/dev/cxgbe/t4_main.c
11268
cls_lo = t4_read_reg(sc, A_MPS_CLS_SRAM_L);
sys/dev/cxgbe/t4_main.c
11269
cls_hi = t4_read_reg(sc, A_MPS_CLS_SRAM_H);
sys/dev/cxgbe/t4_main.c
11619
else if (t4_read_reg(sc, A_LE_DB_CONFIG) & F_HASHEN) {
sys/dev/cxgbe/t4_main.c
11622
x = t4_read_reg(sc, A_LE_DB_SERVER_INDEX) / 4;
sys/dev/cxgbe/t4_main.c
11623
y = t4_read_reg(sc, A_LE_DB_TID_HASHBASE) / 4;
sys/dev/cxgbe/t4_main.c
11625
x = t4_read_reg(sc, A_LE_DB_SRVR_START_INDEX);
sys/dev/cxgbe/t4_main.c
11626
y = t4_read_reg(sc, A_T6_LE_DB_HASH_TID_BASE);
sys/dev/cxgbe/t4_main.c
11665
x = t4_read_reg(sc, A_LE_DB_ACT_CNT_IPV4);
sys/dev/cxgbe/t4_main.c
11666
y = t4_read_reg(sc, A_LE_DB_ACT_CNT_IPV6);
sys/dev/cxgbe/t4_main.c
12044
switch (G_DBGLAMODE(t4_read_reg(sc, A_TP_DBG_LA_CONFIG))) {
sys/dev/cxgbe/t4_main.c
12169
cfg = t4_read_reg(sc, A_SGE_STAT_CFG);
sys/dev/cxgbe/t4_main.c
12170
s1 = t4_read_reg(sc, A_SGE_STAT_TOTAL);
sys/dev/cxgbe/t4_main.c
12171
s2 = t4_read_reg(sc, A_SGE_STAT_MATCH);
sys/dev/cxgbe/t4_main.c
12350
res = t4_read_reg(sc, A_TP_TIMER_RESOLUTION);
sys/dev/cxgbe/t4_main.c
12390
dack_re = G_DELAYEDACKRESOLUTION(t4_read_reg(sc,
sys/dev/cxgbe/t4_main.c
12392
dack_tmr = t4_read_reg(sc, A_TP_DACK_TIMER);
sys/dev/cxgbe/t4_main.c
12422
tre = G_TIMERRESOLUTION(t4_read_reg(sc, A_TP_TIMER_RESOLUTION));
sys/dev/cxgbe/t4_main.c
12425
v = tp_tick_us * G_INITSRTT(t4_read_reg(sc, reg));
sys/dev/cxgbe/t4_main.c
12427
v = tp_tick_us * t4_read_reg(sc, reg);
sys/dev/cxgbe/t4_main.c
12454
v = (t4_read_reg(sc, A_TP_SHIFT_CNT) >> idx) & 0xf;
sys/dev/cxgbe/t4_main.c
12479
v = (t4_read_reg(sc, r) >> shift) & M_TIMERBACKOFFINDEX0;
sys/dev/cxgbe/t4_main.c
12681
offset = G_OFFSET(t4_read_reg(sc, PF_REG(br->pfidx_addr,
sys/dev/cxgbe/t4_main.c
13309
edata->val = t4_read_reg(sc, edata->addr);
sys/dev/cxgbe/t4_main.c
13899
save = t4_read_reg(sc, reg);
sys/dev/cxgbe/t4_main.c
13913
t4_read_reg(sc, reg);
sys/dev/cxgbe/t4_main.c
13918
buf[j] = htonl(t4_read_reg(sc, base + off));
sys/dev/cxgbe/t4_main.c
13930
t4_read_reg(sc, reg);
sys/dev/cxgbe/t4_main.c
13939
tcb_addr = t4_read_reg(sc, A_TP_CMM_TCB_BASE);
sys/dev/cxgbe/t4_main.c
1411
j = t4_read_reg(sc, A_PL_WHOAMI);
sys/dev/cxgbe/t4_main.c
2090
val = t4_read_reg(sc, A_PL_WHOAMI);
sys/dev/cxgbe/t4_main.c
4154
t4_read_reg(sc, reg);
sys/dev/cxgbe/t4_main.c
4188
t4_read_reg(sc, reg); /* flush */
sys/dev/cxgbe/t4_main.c
4222
v = t4_read_reg(sc, mw->mw_base + addr -
sys/dev/cxgbe/t4_main.c
4396
em = t4_read_reg(sc, A_MA_TARGET_MEM_ENABLE);
sys/dev/cxgbe/t4_main.c
4402
addr_len = t4_read_reg(sc, A_MA_EDRAM0_BAR);
sys/dev/cxgbe/t4_main.c
4414
addr_len = t4_read_reg(sc, A_MA_EDRAM1_BAR);
sys/dev/cxgbe/t4_main.c
4426
addr_len = t4_read_reg(sc, A_MA_EXT_MEMORY_BAR);
sys/dev/cxgbe/t4_main.c
4438
addr_len = t4_read_reg(sc, A_MA_EXT_MEMORY1_BAR);
sys/dev/cxgbe/t4_main.c
4540
em = t4_read_reg(sc, A_MA_TARGET_MEM_ENABLE);
sys/dev/cxgbe/t4_main.c
4545
addr_len = t4_read_reg(sc, A_MA_EDRAM0_BAR);
sys/dev/cxgbe/t4_main.c
4551
addr_len = t4_read_reg(sc, A_MA_EDRAM1_BAR);
sys/dev/cxgbe/t4_main.c
4557
addr_len = t4_read_reg(sc, A_MA_EXT_MEMORY_BAR);
sys/dev/cxgbe/t4_main.c
4563
addr_len = t4_read_reg(sc, A_MA_EXT_MEMORY1_BAR);
sys/dev/cxgbe/t4_main.c
5191
"PCIE_FW 0x%08x\n", rc, state, t4_read_reg(sc, A_PCIE_FW));
sys/dev/cxgbe/t4_main.c
5218
"PCIE_FW 0x%08x\n", rc, state, t4_read_reg(sc, A_PCIE_FW));
sys/dev/cxgbe/t4_main.c
5227
"PCIE_FW 0x%08x\n", rc, state, t4_read_reg(sc, A_PCIE_FW));
sys/dev/cxgbe/t4_main.c
5687
sc->tids.tid_base = t4_read_reg(sc,
sys/dev/cxgbe/t4_main.c
6104
val = 1 << (G_MASKSIZE(t4_read_reg(sc, A_TP_RSS_CONFIG_TNL)) - 1);
sys/dev/cxgbe/t4_main.c
7593
stats[0] = t4_read_reg(sc, VF_MPS_REG(reg));
sys/dev/cxgbe/t4_main.c
7594
stats[1] = t4_read_reg(sc, VF_MPS_REG(reg + 4));
sys/dev/cxgbe/t4_main.c
7599
stats[0] = t4_read_reg(sc, A_PL_INDIR_DATA);
sys/dev/cxgbe/t4_main.c
7600
stats[1] = t4_read_reg(sc, A_PL_INDIR_DATA);
sys/dev/cxgbe/t4_main.c
9693
t4_read_reg(sc, A_EDC_H_BIST_USER_WDATA0),
sys/dev/cxgbe/t4_main.c
9694
t4_read_reg(sc, A_EDC_H_BIST_USER_WDATA1),
sys/dev/cxgbe/t4_main.c
9695
t4_read_reg(sc, A_EDC_H_BIST_USER_WDATA2),
sys/dev/cxgbe/t4_main.c
9696
t4_read_reg(sc, A_EDC_H_BIST_DATA_PATTERN),
sys/dev/cxgbe/t4_main.c
9697
t4_read_reg(sc, A_EDC_H_BIST_STATUS_RDATA));
sys/dev/cxgbe/t4_main.c
9700
t4_read_reg(sc, A_EDC_H_BIST_USER_WDATA0),
sys/dev/cxgbe/t4_main.c
9701
t4_read_reg(sc, A_EDC_H_BIST_USER_WDATA1),
sys/dev/cxgbe/t4_main.c
9702
t4_read_reg(sc, A_EDC_H_BIST_USER_WDATA0 + 0x800),
sys/dev/cxgbe/t4_main.c
9703
t4_read_reg(sc, A_EDC_H_BIST_USER_WDATA1 + 0x800),
sys/dev/cxgbe/t4_main.c
9704
t4_read_reg(sc, A_EDC_H_BIST_CMD_LEN));
sys/dev/cxgbe/t4_sge.c
1005
r = t4_read_reg(sc, A_TP_PARA_REG5);
sys/dev/cxgbe/t4_sge.c
1352
v = t4_read_reg(sc, MYPF_REG(A_PL_PF_INT_CAUSE));
sys/dev/cxgbe/t4_sge.c
987
r = t4_read_reg(sc, A_ULP_RX_TDDP_PSZ);
sys/dev/cxgbe/t4_sge.c
995
r = t4_read_reg(sc, A_ULP_RX_CTL);
sys/dev/cxgbe/t4_vf.c
851
edata->val = t4_read_reg(sc, edata->addr);
sys/dev/cxgbe/tom/t4_tom.c
1547
td->dupack_threshold = G_DUPACKTHRESH(t4_read_reg(sc, A_TP_PARA_REG0));
sys/dev/cxgbe/tom/t4_tom.c
1934
t4_read_reg(sc, A_ULP_RX_TDDP_PSZ), "TDDP page pods");
sys/dev/cxgbe/tom/t4_tom.c
799
addr = t4_read_reg(sc, A_TP_CMM_TCB_BASE) + tid * TCB_SIZE;