qsize
if (!ossl_ffc_params_set_validate_params(params, seed, qsize, pcounter))
int qsize, unsigned char *seed, size_t seedlen,
if (mdsize > qsize)
pmd = md + mdsize - qsize;
if (mdsize < qsize)
memset(md + mdsize, 0, qsize - mdsize);
pmd[qsize - 1] |= 0x01;
if (!BN_bin2bn(pmd, qsize, q))
size_t qsize, int generate_seed, int *retm,
if (generate_seed && RAND_bytes_ex(libctx, seed, qsize, 0) <= 0)
memcpy(buf, seed, qsize);
memcpy(buf2, seed, qsize);
for (i = (int)qsize - 1; i >= 0; i--) {
if (!EVP_Digest(seed, qsize, md, NULL, evpmd, NULL))
if (!EVP_Digest(buf, qsize, buf2, NULL, evpmd, NULL))
for (i = 0; i < (int)qsize; i++)
md[qsize - 1] |= 0x01;
if (!BN_bin2bn(md, (int)qsize, q))
int n = 0, m = 0, qsize;
qsize = N >> 3;
if (!generate_q_fips186_4(ctx, q, md, qsize, seed, seedlen,
size_t qsize;
qsize = N >> 3;
if (qsize != SHA_DIGEST_LENGTH
&& qsize != SHA224_DIGEST_LENGTH
&& qsize != SHA256_DIGEST_LENGTH) {
if (seed_len < qsize) {
if (seed_len > qsize)
seed_len = qsize;
if (!generate_q_fips186_2(ctx, q, md, buf, seed, qsize,
rv = generate_p(ctx, md, counter, n, buf, qsize, q, p, L, cb,
u_int qsize;
qsize = le16toh(cmd->sqsize) + 1;
if (qsize < NVME_MIN_ADMIN_ENTRIES ||
qsize > NVME_MAX_ADMIN_ENTRIES ||
qsize > na->na_params.max_admin_qsize) {
na_error(na, "Invalid queue size %u", qsize);
if (qsize < NVME_MIN_IO_ENTRIES ||
qsize > NVME_MAX_IO_ENTRIES ||
qsize > na->na_params.max_io_qsize) {
na_error(na, "Invalid queue size %u", qsize);
qp->nq_qsize = qsize;
fs->qsize = strtoul(av[0], &end, 0);
fs->qsize *= 1024;
if (fs->qsize > limit)
if (fs->qsize > limit)
l = fs->qsize;
uint16_t qsize; /* size (# of entries) of the queue */
uint16_t qsize; /* # of hw descriptors (status page included) */
u32 qsize;
qsize = 6 * CIM_OBQ_SIZE * 4 * sizeof(u32);
rc = get_scratch_buff(dbg_buff, qsize, &scratch_buff);
scratch_buff.offset), qsize);
u32 qsize;
qsize = CIM_IBQ_SIZE * 4 * sizeof(u32);
rc = get_scratch_buff(dbg_buff, qsize, &scratch_buff);
scratch_buff.offset), qsize);
int qsize, rc;
qsize = vi->qsize_rxq;
rc = sysctl_handle_int(oidp, &qsize, 0, req);
if (qsize < 128 || (qsize & 7))
vi->qsize_rxq = qsize;
int qsize, rc;
qsize = vi->qsize_txq;
rc = sysctl_handle_int(oidp, &qsize, 0, req);
if (qsize < 128 || qsize > 65536)
vi->qsize_txq = qsize;
limit = budget ? budget : iq->qsize / 16;
if (service_iq_fl(q, q->qsize / 16) == 0) {
if (service_iq_fl(q, q->qsize / 8) == 0)
limit = budget ? budget : iq->qsize / 16;
int qsize, int intr_idx, int cong, int qtype)
iq->qsize = roundup2(qsize, 16); /* See FW_IQ_CMD/iqsize */
iq->sidx = iq->qsize - sc->params.sge.spg_len / IQ_ESIZE;
init_fl(struct adapter *sc, struct sge_fl *fl, int qsize, int maxp, char *name)
fl->qsize = qsize;
fl->sidx = qsize - sc->params.sge.spg_len / EQ_ESIZE;
init_eq(struct adapter *sc, struct sge_eq *eq, int eqtype, int qsize,
eq->sidx = qsize - sc->params.sge.spg_len / EQ_ESIZE;
len = iq->qsize * IQ_ESIZE;
len = fl->qsize * EQ_ESIZE;
bzero(iq->desc, iq->qsize * IQ_ESIZE);
c.iqsize = htobe16(iq->qsize);
c.fl0size = htobe16(fl->qsize);
iq->qsize * IQ_ESIZE, "descriptor ring size in bytes");
qsize_to_fthresh(int qsize)
fthresh = qsize == 0 ? 0 : order_base_2(qsize);
int qsize = eq->sidx + sc->params.sge.spg_len / EQ_ESIZE;
V_FW_EQ_CTRL_CMD_CIDXFTHRESH(qsize_to_fthresh(qsize)) |
V_FW_EQ_CTRL_CMD_EQSIZE(qsize));
int qsize = eq->sidx + sc->params.sge.spg_len / EQ_ESIZE;
V_FW_EQ_ETH_CMD_EQSIZE(qsize));
int qsize = eq->sidx + sc->params.sge.spg_len / EQ_ESIZE;
V_FW_EQ_OFLD_CMD_CIDXFTHRESH(qsize_to_fthresh(qsize)) |
V_FW_EQ_OFLD_CMD_EQSIZE(qsize));
int rc, qsize;
qsize = eq->sidx + sc->params.sge.spg_len / EQ_ESIZE;
len = qsize * EQ_ESIZE;
int qsize, fqsize, pqsize;
qsize = fqsize + pqsize;
BUS_DMA_TEMPLATE_FILL(&t, BD_ALIGNMENT(16), BD_MAXSIZE(qsize),
BD_MAXSEGSIZE(qsize), BD_NSEGMENTS(1),
bzero(queues, qsize);
bus_dmamap_load(sc->queues_dmat, sc->queues_map, queues, qsize,
int qsize, fqsize, pqsize;
qsize = fqsize + pqsize;
BUS_DMA_TEMPLATE_FILL(&t, BD_ALIGNMENT(16), BD_MAXSIZE(qsize),
BD_MAXSEGSIZE(qsize), BD_NSEGMENTS(1),
bzero(queues, qsize);
bus_dmamap_load(sc->queues_dmat, sc->queues_map, queues, qsize,
uint32_t qsize;
qsize = ctrlr->adminq.num_entries - 1;
aqa |= NVMEF(NVME_AQA_REG_ACQS, qsize);
aqa |= NVMEF(NVME_AQA_REG_ASQS, qsize);
qp->qsize = nvlist_get_number(params, "qsize");
qp->sqhd = (qp->sqhd + 1) % qp->qsize;
u_int qsize;
uint32_t qsize;
qsize = nvlist_get_number(rparams, "io_qsize");
if (nvlist_get_number(io[i], "qsize") != qsize)
uint64_t value, qsize;
qsize = nvlist_get_number(nvl, "qsize");
if (qsize < NVME_MIN_ADMIN_ENTRIES ||
qsize > NVME_MAX_ADMIN_ENTRIES)
if (qsize < NVME_MIN_IO_ENTRIES || qsize > NVME_MAX_IO_ENTRIES)
if (value > qsize - 1)
if (value > qsize - 1)
cq_cfg.qsize = CMP_QSIZE;
sq_cfg.qsize = SND_QSIZE;
rbdr_cfg.qsize = RBDR_SIZE;
uint64_t qsize:3;
uint64_t qsize:3;
uint64_t qsize:3;
uint64_t qsize:3;
uint64_t qsize:4;
uint64_t qsize:4;
const vmem_size_t qsize = size >> vm->vm_quantum_shift;
const int idx = SIZE2ORDER(qsize);
MPASS(size != 0 && qsize != 0);
const vmem_size_t qsize = size >> vm->vm_quantum_shift;
int idx = SIZE2ORDER(qsize);
MPASS(size != 0 && qsize != 0);
if (strat == M_FIRSTFIT && ORDER2SIZE(idx) != qsize) {
qsize(q) += m_pktlen(m);
qsize(q) -= m_pktlen(m0);
qsize(cif->cl_q) = 0;
qsize(q) <= c->stats.maxpacket) {
qsize(cl->cl_q) = 0;
qsize(cl->cl_q) = 0;
uint32_t qsize, cidx, gen;
qsize = txq->ift_size;
if (__predict_false(++cidx == qsize)) {
int qsize; /* queue size in slots or bytes */
if ( q->ni.len_bytes > f->qsize)
if ( q->ni.length >= f->qsize)
if (qlen >= f->qsize)
pst->one_third_q_size = q->fs->fs.qsize/3;
if (q->ni.len_bytes > f->qsize)
} else if (q->ni.length >= f->qsize) {
ipdn_bound_var(&nfs->qsize, 16384,
ipdn_bound_var(&nfs->qsize, 50,