sys/dev/qlnx/qlnxe/ecore_cxt.c

2516

ecore_wr(p_hwfn, p_ptt, PRS_REG_ROCE_DEST_QP_MAX_PF,

sys/dev/qlnx/qlnxe/ecore_cxt.c

2529

ecore_wr(p_hwfn, p_ptt, p_hwfn->rdma_prs_search_reg, 1);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

2247

ecore_wr(p_hwfn, p_ptt, DBG_REG_DBG_BLOCK_ON, enable ? 1 : 0);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

2261

ecore_wr(p_hwfn, p_ptt, dbg_reset_reg_addr, new_reset_reg_val);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

2262

ecore_wr(p_hwfn, p_ptt, dbg_reset_reg_addr, old_reset_reg_val);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

2269

ecore_wr(p_hwfn, p_ptt, DBG_REG_FRAMING_MODE, (u8)mode);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

2279

ecore_wr(p_hwfn, p_ptt, DBG_REG_CLIENT_ENABLE, client_mask);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

2301

ecore_wr(p_hwfn, p_ptt, storm->sem_frame_mode_addr, DBG_BUS_SEMI_FRAME_MODE_0SLOW_4FAST);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

2302

ecore_wr(p_hwfn, p_ptt, base_addr + SEM_FAST_REG_DEBUG_MODE, storm_mode->id_in_hw);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

2303

ecore_wr(p_hwfn, p_ptt, base_addr + SEM_FAST_REG_DEBUG_ACTIVE, 1);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

2309

ecore_wr(p_hwfn, p_ptt, base_addr + SEM_FAST_REG_DBG_MODE23_SRC_DISABLE, SEM_FAST_MODE23_SRC_ENABLE_VAL);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

2310

ecore_wr(p_hwfn, p_ptt, base_addr + SEM_FAST_REG_DBG_MODE4_SRC_DISABLE, SEM_FAST_MODE4_SRC_ENABLE_VAL);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

2311

ecore_wr(p_hwfn, p_ptt, base_addr + SEM_FAST_REG_DBG_MODE6_SRC_DISABLE, SEM_FAST_MODE6_SRC_ENABLE_VAL);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

2315

ecore_wr(p_hwfn, p_ptt, storm->sem_frame_mode_addr, DBG_BUS_SEMI_FRAME_MODE_4SLOW_0FAST);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

2316

ecore_wr(p_hwfn, p_ptt, storm->sem_slow_enable_addr, 1);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

2317

ecore_wr(p_hwfn, p_ptt, storm->sem_slow_mode_addr, storm_mode->id_in_hw);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

2318

ecore_wr(p_hwfn, p_ptt, storm->sem_slow_mode1_conf_addr, SEM_SLOW_MODE1_DATA_ENABLE);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

2323

ecore_wr(p_hwfn, p_ptt, base_addr + SEM_FAST_REG_FILTER_CID, storm_bus->cid);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

2332

ecore_wr(p_hwfn, p_ptt, base_addr + SEM_FAST_REG_EVENT_ID_RANGE_STRT, eid_filter->range.min);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

2333

ecore_wr(p_hwfn, p_ptt, base_addr + SEM_FAST_REG_EVENT_ID_RANGE_END, eid_filter->range.max);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

2337

ecore_wr(p_hwfn, p_ptt, base_addr + SEM_FAST_REG_FILTER_EVENT_ID, eid_filter->mask.val);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

2338

ecore_wr(p_hwfn, p_ptt, base_addr + SEM_FAST_REG_EVENT_ID_MASK, ~eid_filter->mask.mask);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

2345

ecore_wr(p_hwfn, p_ptt, base_addr + SEM_FAST_REG_RECORD_FILTER_ENABLE, sem_filter_params);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

2365

ecore_wr(p_hwfn, p_ptt, storm->sem_fast_mem_addr + SEM_FAST_REG_DBG_MODE23_SRC_DISABLE, SEM_FAST_MODE23_SRC_DISABLE_VAL);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

2366

ecore_wr(p_hwfn, p_ptt, storm->sem_fast_mem_addr + SEM_FAST_REG_DBG_MODE4_SRC_DISABLE, SEM_FAST_MODE4_SRC_DISABLE_VAL);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

2367

ecore_wr(p_hwfn, p_ptt, storm->sem_fast_mem_addr + SEM_FAST_REG_DBG_MODE6_SRC_DISABLE, SEM_FAST_MODE6_SRC_DISABLE_VAL);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

2411

ecore_wr(p_hwfn, p_ptt, base_addr + SEM_FAST_REG_DEBUG_ACTIVE, 0);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

2412

ecore_wr(p_hwfn, p_ptt, base_addr + SEM_FAST_REG_RECORD_FILTER_ENABLE, DBG_BUS_FILTER_TYPE_OFF);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

2413

ecore_wr(p_hwfn, p_ptt, storm->sem_frame_mode_addr, DBG_BUS_FRAME_MODE_4HW_0ST);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

2414

ecore_wr(p_hwfn, p_ptt, storm->sem_slow_enable_addr, 0);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

2425

ecore_wr(p_hwfn, p_ptt, block->dbg_enable_addr, 0);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

2429

ecore_wr(p_hwfn, p_ptt, DBG_REG_TIMESTAMP_VALID_EN, 0);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

2432

ecore_wr(p_hwfn, p_ptt, DBG_REG_FILTER_ENABLE, DBG_BUS_FILTER_TYPE_OFF);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

2433

ecore_wr(p_hwfn, p_ptt, DBG_REG_TRIGGER_ENABLE, 0);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

2463

ecore_wr(p_hwfn, p_ptt, (is_filter ? DBG_REG_FILTER_CNSTR_OPRTN_0 : DBG_REG_TRIGGER_STATE_SET_CNSTR_OPRTN_0) + reg_offset, hw_op_val);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

2464

ecore_wr(p_hwfn, p_ptt, (is_filter ? DBG_REG_FILTER_CNSTR_DATA_0 : DBG_REG_TRIGGER_STATE_SET_CNSTR_DATA_0) + reg_offset, data_val);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

2465

ecore_wr(p_hwfn, p_ptt, (is_filter ? DBG_REG_FILTER_CNSTR_DATA_MASK_0 : DBG_REG_TRIGGER_STATE_SET_CNSTR_DATA_MASK_0) + reg_offset, data_mask);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

2466

ecore_wr(p_hwfn, p_ptt, (is_filter ? DBG_REG_FILTER_CNSTR_FRAME_0 : DBG_REG_TRIGGER_STATE_SET_CNSTR_FRAME_0) + reg_offset, frame_bit);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

2467

ecore_wr(p_hwfn, p_ptt, (is_filter ? DBG_REG_FILTER_CNSTR_FRAME_MASK_0 : DBG_REG_TRIGGER_STATE_SET_CNSTR_FRAME_MASK_0) + reg_offset, frame_mask);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

2468

ecore_wr(p_hwfn, p_ptt, (is_filter ? DBG_REG_FILTER_CNSTR_OFFSET_0 : DBG_REG_TRIGGER_STATE_SET_CNSTR_OFFSET_0) + reg_offset, dword_offset);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

2469

ecore_wr(p_hwfn, p_ptt, (is_filter ? DBG_REG_FILTER_CNSTR_RANGE_0 : DBG_REG_TRIGGER_STATE_SET_CNSTR_RANGE_0) + reg_offset, range);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

2470

ecore_wr(p_hwfn, p_ptt, (is_filter ? DBG_REG_FILTER_CNSTR_CYCLIC_0 : DBG_REG_TRIGGER_STATE_SET_CNSTR_CYCLIC_0) + reg_offset, cyclic_bit);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

2471

ecore_wr(p_hwfn, p_ptt, (is_filter ? DBG_REG_FILTER_CNSTR_MUST_0 : DBG_REG_TRIGGER_STATE_SET_CNSTR_MUST_0) + reg_offset, must_bit);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

2843

ecore_wr(p_hwfn, p_ptt, reg_addr, stall ? 1 : 0);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

2873

ecore_wr(p_hwfn, p_ptt, s_reset_regs_defs[i].addr + RESET_REG_UNRESET_OFFSET, reg_val[i]);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

3607

ecore_wr(p_hwfn, p_ptt, storm->cm_ctx_wr_addr, (i << 9) | lid);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

375

#define ARR_REG_WR(dev, ptt, addr, arr, arr_size) for (i = 0; i < (arr_size); i++) ecore_wr(dev, ptt, addr, (arr)[i])

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

3808

ecore_wr(p_hwfn, p_ptt, RSS_REG_RSS_RAM_ADDR, rss_addr);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

3849

ecore_wr(p_hwfn, p_ptt, big_ram->addr_reg_addr, i);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

3929

ecore_wr(p_hwfn, p_ptt, addr_hi_addr, tbus_hi_offset);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

3931

ecore_wr(p_hwfn, p_ptt, addr_lo_addr, tbus_lo_offset);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

3954

ecore_wr(p_hwfn, p_ptt, block->dbg_select_addr, line_id);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

3955

ecore_wr(p_hwfn, p_ptt, block->dbg_enable_addr, enable_mask);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

3956

ecore_wr(p_hwfn, p_ptt, block->dbg_shift_addr, right_shift);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

3957

ecore_wr(p_hwfn, p_ptt, block->dbg_force_valid_addr, force_valid_mask);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

3958

ecore_wr(p_hwfn, p_ptt, block->dbg_force_frame_addr, force_frame_mask);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

3980

ecore_wr(p_hwfn, p_ptt, block->dbg_enable_addr, 0);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

3985

ecore_wr(p_hwfn, p_ptt, DBG_REG_DEBUG_TARGET, DBG_BUS_TARGET_ID_INT_BUF);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

3986

ecore_wr(p_hwfn, p_ptt, DBG_REG_FULL_MODE, 1);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

4029

ecore_wr(p_hwfn, p_ptt, block->dbg_enable_addr, 0);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

4967

ecore_wr(p_hwfn, p_ptt, DBG_REG_FULL_MODE, one_shot_en ? 0 : 1);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5015

ecore_wr(p_hwfn, p_ptt, DBG_REG_PCI_EXT_BUFFER_STRT_ADDR_LSB, dev_data->bus.pci_buf.phys_addr.lo);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5016

ecore_wr(p_hwfn, p_ptt, DBG_REG_PCI_EXT_BUFFER_STRT_ADDR_MSB, dev_data->bus.pci_buf.phys_addr.hi);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5017

ecore_wr(p_hwfn, p_ptt, DBG_REG_TARGET_PACKET_SIZE, PCI_PKT_SIZE_IN_CHUNKS);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5018

ecore_wr(p_hwfn, p_ptt, DBG_REG_PCI_EXT_BUFFER_SIZE, dev_data->bus.pci_buf.size / PCI_PKT_SIZE_IN_BYTES);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5019

ecore_wr(p_hwfn, p_ptt, DBG_REG_PCI_FUNC_NUM, OPAQUE_FID(p_hwfn->rel_pf_id));

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5020

ecore_wr(p_hwfn, p_ptt, DBG_REG_PCI_LOGIC_ADDR, PCI_PHYS_ADDR_TYPE);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5021

ecore_wr(p_hwfn, p_ptt, DBG_REG_PCI_REQ_CREDIT, PCI_REQ_CREDIT);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5022

ecore_wr(p_hwfn, p_ptt, DBG_REG_DEBUG_TARGET, DBG_BUS_TARGET_ID_PCI);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5023

ecore_wr(p_hwfn, p_ptt, DBG_REG_OUTPUT_ENABLE, TARGET_EN_MASK_PCI);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5051

ecore_wr(p_hwfn, p_ptt, DBG_REG_OUTPUT_ENABLE, TARGET_EN_MASK_NIG);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5052

ecore_wr(p_hwfn, p_ptt, DBG_REG_DEBUG_TARGET, DBG_BUS_TARGET_ID_NIG);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5055

ecore_wr(p_hwfn, p_ptt, DBG_REG_OTHER_ENGINE_MODE_BB_K2, DBG_BUS_OTHER_ENGINE_MODE_CROSS_ENGINE_TX);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5057

ecore_wr(p_hwfn, p_ptt, NIG_REG_DEBUG_PORT, port_id);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5060

ecore_wr(p_hwfn, p_ptt, DBG_REG_OTHER_ENGINE_MODE_BB_K2, DBG_BUS_OTHER_ENGINE_MODE_CROSS_ENGINE_RX);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5064

ecore_wr(p_hwfn, p_ptt, DBG_REG_ETHERNET_HDR_WIDTH, 0);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5065

ecore_wr(p_hwfn, p_ptt, DBG_REG_ETHERNET_HDR_7, dest_addr_lo32);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5066

ecore_wr(p_hwfn, p_ptt, DBG_REG_ETHERNET_HDR_6, (u32)SRC_MAC_ADDR_LO16 | ((u32)dest_addr_hi16 << 16));

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5067

ecore_wr(p_hwfn, p_ptt, DBG_REG_ETHERNET_HDR_5, SRC_MAC_ADDR_HI32);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5068

ecore_wr(p_hwfn, p_ptt, DBG_REG_ETHERNET_HDR_4, (u32)ETH_TYPE << 16);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5069

ecore_wr(p_hwfn, p_ptt, DBG_REG_TARGET_PACKET_SIZE, NIG_PKT_SIZE_IN_CHUNKS);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5071

ecore_wr(p_hwfn, p_ptt, DBG_REG_NIG_DATA_LIMIT_SIZE, (data_limit_size_kb * 1024) / CHUNK_SIZE_IN_BYTES);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5215

ecore_wr(p_hwfn, p_ptt, DBG_REG_TIMESTAMP_VALID_EN, valid_mask);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5216

ecore_wr(p_hwfn, p_ptt, DBG_REG_TIMESTAMP_FRAME_EN, frame_mask);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5217

ecore_wr(p_hwfn, p_ptt, DBG_REG_TIMESTAMP_TICK, tick_len);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5321

ecore_wr(p_hwfn, p_ptt, DBG_REG_FILTER_ID_NUM, 0);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5322

ecore_wr(p_hwfn, p_ptt, DBG_REG_FILTER_MSG_LENGTH_ENABLE, const_msg_len > 0 ? 1 : 0);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5324

ecore_wr(p_hwfn, p_ptt, DBG_REG_FILTER_MSG_LENGTH, const_msg_len - 1);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5358

ecore_wr(p_hwfn, p_ptt, DBG_REG_RCRD_ON_WINDOW_PRE_NUM_CHUNKS, pre_chunks);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5366

ecore_wr(p_hwfn, p_ptt, DBG_REG_RCRD_ON_WINDOW_POST_NUM_CYCLES, post_cycles ? post_cycles : 0xffffffff);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5372

ecore_wr(p_hwfn, p_ptt, DBG_REG_RCRD_ON_WINDOW_PRE_TRGR_EVNT_MODE, pre_trigger_type);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5373

ecore_wr(p_hwfn, p_ptt, DBG_REG_RCRD_ON_WINDOW_POST_TRGR_EVNT_MODE, post_trigger_type);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5374

ecore_wr(p_hwfn, p_ptt, DBG_REG_TRIGGER_ENABLE, 1);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5415

ecore_wr(p_hwfn, p_ptt, DBG_REG_TRIGGER_STATE_MSG_LENGTH_ENABLE_0 + reg_offset, const_msg_len > 0 ? 1 : 0);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5417

ecore_wr(p_hwfn, p_ptt, DBG_REG_TRIGGER_STATE_MSG_LENGTH_0 + reg_offset, const_msg_len - 1);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5421

ecore_wr(p_hwfn, p_ptt, DBG_REG_TRIGGER_STATE_SET_COUNT_0 + reg_offset, count_to_next);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5426

ecore_wr(p_hwfn, p_ptt, DBG_REG_TRIGGER_STATE_SET_NXT_STATE_0 + reg_offset, MAX_TRIGGER_STATES);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5429

ecore_wr(p_hwfn, p_ptt, DBG_REG_TRIGGER_STATE_SET_NXT_STATE_0 + reg_offset, bus->next_trigger_state);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5642

ecore_wr(p_hwfn, p_ptt, DBG_REG_STORM_ID_NUM, storm_id_mask);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5645

ecore_wr(p_hwfn, p_ptt, DBG_REG_NO_GRANT_ON_FULL, (dev_data->bus.target == DBG_BUS_TARGET_ID_INT_BUF && bus->one_shot_en) ? 0 : 1);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5653

ecore_wr(p_hwfn, p_ptt, DBG_REG_CALENDAR_SLOT0 + DWORDS_TO_BYTES(i), next_storm_id);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5743

ecore_wr(p_hwfn, p_ptt, DBG_REG_TRIGGER_STATE_ID_0 + state_id * BYTES_IN_DWORD, hw_ids[val_id]);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5754

ecore_wr(p_hwfn, p_ptt, DBG_REG_HW_ID_NUM, bus->hw_id_mask);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5760

ecore_wr(p_hwfn, p_ptt, PCIE_REG_DBG_REPEAT_THRESHOLD_COUNT_K2_E5, 1);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5761

ecore_wr(p_hwfn, p_ptt, PCIE_REG_DBG_FW_TRIGGER_ENABLE_K2_E5, 1);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5818

ecore_wr(p_hwfn, p_ptt, DBG_REG_FILTER_ENABLE, filter_type);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5821

ecore_wr(p_hwfn, p_ptt, DBG_REG_TIMESTAMP, 0);

sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c

5875

ecore_wr(p_hwfn, p_ptt, DBG_REG_CPU_TIMEOUT, 1);

sys/dev/qlnx/qlnxe/ecore_dcbx.c

1054

ecore_wr(p_hwfn, p_ptt, NIG_REG_TX_EDPM_CTRL, val);

sys/dev/qlnx/qlnxe/ecore_dcbx.c

241

ecore_wr(p_hwfn, p_ptt, DORQ_REG_TAG1_OVRD_MODE, 1);

sys/dev/qlnx/qlnxe/ecore_dcbx.c

242

ecore_wr(p_hwfn, p_ptt, DORQ_REG_PF_PCP_BB_K2, prio << 1);

sys/dev/qlnx/qlnxe/ecore_dev.c

2731

ecore_wr(p_hwfn, p_ptt, XSDM_REG_OPERATION_GEN, command);

sys/dev/qlnx/qlnxe/ecore_dev.c

2829

ecore_wr(p_hwfn, p_ptt, MISCS_REG_RESET_PL_HV + 4, pl_hv);

sys/dev/qlnx/qlnxe/ecore_dev.c

2833

ecore_wr(p_hwfn, p_ptt, MISCS_REG_RESET_PL_HV_2_K2_E5,

sys/dev/qlnx/qlnxe/ecore_dev.c

2839

ecore_wr(p_hwfn, p_ptt, CNIG_REG_NW_PORT_MODE_BB, 4);

sys/dev/qlnx/qlnxe/ecore_dev.c

2844

ecore_wr(p_hwfn, p_ptt, MISC_REG_PORT_MODE,

sys/dev/qlnx/qlnxe/ecore_dev.c

2847

ecore_wr(p_hwfn, p_ptt, MISC_REG_BLOCK_256B_EN,

sys/dev/qlnx/qlnxe/ecore_dev.c

2854

ecore_wr(p_hwfn, p_ptt, PSWRQ2_REG_RBC_DONE, 1);

sys/dev/qlnx/qlnxe/ecore_dev.c

3008

ecore_wr(p_hwfn, p_ptt, PSWRQ2_REG_L2P_VALIDATE_VFID, 0);

sys/dev/qlnx/qlnxe/ecore_dev.c

3009

ecore_wr(p_hwfn, p_ptt, PGLUE_B_REG_USE_CLIENTID_IN_TAG, 1);

sys/dev/qlnx/qlnxe/ecore_dev.c

3018

ecore_wr(p_hwfn, p_ptt, PRS_REG_SEARCH_ROCE, 0x0);

sys/dev/qlnx/qlnxe/ecore_dev.c

3019

ecore_wr(p_hwfn, p_ptt, PRS_REG_SEARCH_TCP, 0x0);

sys/dev/qlnx/qlnxe/ecore_dev.c

3035

ecore_wr(p_hwfn, p_ptt, CCFC_REG_STRONG_ENABLE_VF, 0x1);

sys/dev/qlnx/qlnxe/ecore_dev.c

3036

ecore_wr(p_hwfn, p_ptt, CCFC_REG_WEAK_ENABLE_VF, 0x0);

sys/dev/qlnx/qlnxe/ecore_dev.c

3037

ecore_wr(p_hwfn, p_ptt, TCFC_REG_STRONG_ENABLE_VF, 0x1);

sys/dev/qlnx/qlnxe/ecore_dev.c

3038

ecore_wr(p_hwfn, p_ptt, TCFC_REG_WEAK_ENABLE_VF, 0x0);

sys/dev/qlnx/qlnxe/ecore_dev.c

3067

ecore_wr(p_hwfn, p_ptt, CNIG_REG_PMEG_IF_CMD_BB,

sys/dev/qlnx/qlnxe/ecore_dev.c

3071

ecore_wr(p_hwfn, p_ptt, CNIG_REG_PMEG_IF_ADDR_BB,

sys/dev/qlnx/qlnxe/ecore_dev.c

3073

ecore_wr(p_hwfn, p_ptt, CNIG_REG_PMEG_IF_WRDATA_BB, data & 0xffffffff);

sys/dev/qlnx/qlnxe/ecore_dev.c

3074

ecore_wr(p_hwfn, p_ptt, CNIG_REG_PMEG_IF_WRDATA_BB,

sys/dev/qlnx/qlnxe/ecore_dev.c

3131

ecore_wr(p_hwfn, p_ptt, CNIG_REG_NIG_PORT0_CONF_K2_E5 + (port << 2),

sys/dev/qlnx/qlnxe/ecore_dev.c

3137

ecore_wr(p_hwfn, p_ptt, mac_base + ETH_MAC_REG_XIF_MODE_K2_E5,

sys/dev/qlnx/qlnxe/ecore_dev.c

3140

ecore_wr(p_hwfn, p_ptt, mac_base + ETH_MAC_REG_FRM_LENGTH_K2_E5,

sys/dev/qlnx/qlnxe/ecore_dev.c

3143

ecore_wr(p_hwfn, p_ptt, mac_base + ETH_MAC_REG_TX_IPG_LENGTH_K2_E5,

sys/dev/qlnx/qlnxe/ecore_dev.c

3146

ecore_wr(p_hwfn, p_ptt, mac_base + ETH_MAC_REG_RX_FIFO_SECTIONS_K2_E5,

sys/dev/qlnx/qlnxe/ecore_dev.c

3149

ecore_wr(p_hwfn, p_ptt, mac_base + ETH_MAC_REG_TX_FIFO_SECTIONS_K2_E5,

sys/dev/qlnx/qlnxe/ecore_dev.c

3155

ecore_wr(p_hwfn, p_ptt, mac_base + ETH_MAC_REG_COMMAND_CONFIG_K2_E5,

sys/dev/qlnx/qlnxe/ecore_dev.c

3178

ecore_wr(p_hwfn, p_ptt, MISC_REG_RESET_PL_PDA_VAUX + 2*sizeof(u32),

sys/dev/qlnx/qlnxe/ecore_dev.c

3181

ecore_wr(p_hwfn, p_ptt, MISC_REG_RESET_PL_PDA_VAUX + sizeof(u32),

sys/dev/qlnx/qlnxe/ecore_dev.c

3184

ecore_wr(p_hwfn, p_ptt, MISC_REG_XMAC_CORE_PORT_MODE_BB, 1);

sys/dev/qlnx/qlnxe/ecore_dev.c

3187

ecore_wr(p_hwfn, p_ptt, MISC_REG_XMAC_PHY_PORT_MODE_BB, 3);

sys/dev/qlnx/qlnxe/ecore_dev.c

3190

ecore_wr(p_hwfn, p_ptt, MISC_REG_RESET_PL_PDA_VAUX + 2 * sizeof(u32),

sys/dev/qlnx/qlnxe/ecore_dev.c

3193

ecore_wr(p_hwfn, p_ptt, MISC_REG_RESET_PL_PDA_VAUX + sizeof(u32),

sys/dev/qlnx/qlnxe/ecore_dev.c

3198

ecore_wr(p_hwfn, p_ptt, XMAC_REG_MODE_BB + port_offset, 0x20);

sys/dev/qlnx/qlnxe/ecore_dev.c

3201

ecore_wr(p_hwfn, p_ptt, XMAC_REG_RX_MAX_SIZE_BB + port_offset, 0x2710);

sys/dev/qlnx/qlnxe/ecore_dev.c

3204

ecore_wr(p_hwfn, p_ptt, XMAC_REG_TX_CTRL_LO_BB + port_offset, 0xC800);

sys/dev/qlnx/qlnxe/ecore_dev.c

3207

ecore_wr(p_hwfn, p_ptt, XMAC_REG_CTRL_BB + port_offset,

sys/dev/qlnx/qlnxe/ecore_dev.c

3212

ecore_wr(p_hwfn, p_ptt, XMAC_REG_RX_CTRL_BB + port_offset, xmac_rxctrl);

sys/dev/qlnx/qlnxe/ecore_dev.c

3261

ecore_wr(p_hwfn, p_ptt, DORQ_REG_PF_DPI_BIT_SHIFT, dpi_bit_shift);

sys/dev/qlnx/qlnxe/ecore_dev.c

3414

ecore_wr(p_hwfn, p_ptt, DORQ_REG_PF_ICID_BIT_SHIFT_NORM, pf_dems_shift);

sys/dev/qlnx/qlnxe/ecore_dev.c

3415

ecore_wr(p_hwfn, p_ptt, DORQ_REG_PF_MIN_ADDR_REG1, min_addr_reg1);

sys/dev/qlnx/qlnxe/ecore_dev.c

3435

ecore_wr(p_hwfn, p_ptt, PGLUE_B_REG_MASTER_WRITE_PAD_ENABLE, 0);

sys/dev/qlnx/qlnxe/ecore_dev.c

3455

ecore_wr(p_hwfn, p_ptt, MISCS_REG_RESET_PL_HV, val);

sys/dev/qlnx/qlnxe/ecore_dev.c

3456

ecore_wr(p_hwfn, p_ptt, MISC_REG_CLK_100G_MODE, 1);

sys/dev/qlnx/qlnxe/ecore_dev.c

3457

ecore_wr(p_hwfn, p_ptt, MISCS_REG_CLK_100G_MODE, 1);

sys/dev/qlnx/qlnxe/ecore_dev.c

3458

ecore_wr(p_hwfn, p_ptt, MISC_REG_OPTE_MODE, 1);

sys/dev/qlnx/qlnxe/ecore_dev.c

3459

ecore_wr(p_hwfn, p_ptt,

sys/dev/qlnx/qlnxe/ecore_dev.c

3461

ecore_wr(p_hwfn, p_ptt,

sys/dev/qlnx/qlnxe/ecore_dev.c

3463

ecore_wr(p_hwfn, p_ptt,

sys/dev/qlnx/qlnxe/ecore_dev.c

3610

ecore_wr(p_hwfn, p_ptt, PRS_REG_SEARCH_TAG1,

sys/dev/qlnx/qlnxe/ecore_dev.c

3612

ecore_wr(p_hwfn, p_ptt,

sys/dev/qlnx/qlnxe/ecore_dev.c

3649

ecore_wr(p_hwfn, p_ptt,

sys/dev/qlnx/qlnxe/ecore_dev.c

3758

ecore_wr(p_hwfn, p_ptt, PGLUE_B_REG_WAS_ERROR_PF_31_0_CLR,

sys/dev/qlnx/qlnxe/ecore_dev.c

4033

ecore_wr(p_hwfn, p_ptt, TM_REG_PF_ENABLE_CONN, 0x0);

sys/dev/qlnx/qlnxe/ecore_dev.c

4034

ecore_wr(p_hwfn, p_ptt, TM_REG_PF_ENABLE_TASK, 0x0);

sys/dev/qlnx/qlnxe/ecore_dev.c

4144

ecore_wr(p_hwfn, p_ptt,

sys/dev/qlnx/qlnxe/ecore_dev.c

4148

ecore_wr(p_hwfn, p_ptt, PRS_REG_SEARCH_TCP, 0x0);

sys/dev/qlnx/qlnxe/ecore_dev.c

4149

ecore_wr(p_hwfn, p_ptt, PRS_REG_SEARCH_UDP, 0x0);

sys/dev/qlnx/qlnxe/ecore_dev.c

4150

ecore_wr(p_hwfn, p_ptt, PRS_REG_SEARCH_FCOE, 0x0);

sys/dev/qlnx/qlnxe/ecore_dev.c

4151

ecore_wr(p_hwfn, p_ptt, PRS_REG_SEARCH_ROCE, 0x0);

sys/dev/qlnx/qlnxe/ecore_dev.c

4152

ecore_wr(p_hwfn, p_ptt, PRS_REG_SEARCH_OPENFLOW, 0x0);

sys/dev/qlnx/qlnxe/ecore_dev.c

4163

ecore_wr(p_hwfn, p_ptt, IGU_REG_LEADING_EDGE_LATCH, 0);

sys/dev/qlnx/qlnxe/ecore_dev.c

4164

ecore_wr(p_hwfn, p_ptt, IGU_REG_TRAILING_EDGE_LATCH, 0);

sys/dev/qlnx/qlnxe/ecore_dev.c

4185

ecore_wr(p_hwfn, p_ptt, DORQ_REG_PF_DB_ENABLE, 0);

sys/dev/qlnx/qlnxe/ecore_dev.c

4186

ecore_wr(p_hwfn, p_ptt, QM_REG_PF_EN, 0);

sys/dev/qlnx/qlnxe/ecore_dev.c

4256

ecore_wr(p_hwfn, p_ptt,

sys/dev/qlnx/qlnxe/ecore_dev.c

4259

ecore_wr(p_hwfn, p_ptt, PRS_REG_SEARCH_TCP, 0x0);

sys/dev/qlnx/qlnxe/ecore_dev.c

4260

ecore_wr(p_hwfn, p_ptt, PRS_REG_SEARCH_UDP, 0x0);

sys/dev/qlnx/qlnxe/ecore_dev.c

4261

ecore_wr(p_hwfn, p_ptt, PRS_REG_SEARCH_FCOE, 0x0);

sys/dev/qlnx/qlnxe/ecore_dev.c

4262

ecore_wr(p_hwfn, p_ptt, PRS_REG_SEARCH_ROCE, 0x0);

sys/dev/qlnx/qlnxe/ecore_dev.c

4263

ecore_wr(p_hwfn, p_ptt, PRS_REG_SEARCH_OPENFLOW, 0x0);

sys/dev/qlnx/qlnxe/ecore_dev.c

4296

ecore_wr(p_hwfn, p_ptt, p_hwfn->rdma_prs_search_reg, 0x1);

sys/dev/qlnx/qlnxe/ecore_dev.c

4299

ecore_wr(p_hwfn, p_ptt,

sys/dev/qlnx/qlnxe/ecore_dev.c

4422

ecore_wr(p_hwfn, p_ptt, wake_buffer_clear_offset, 1);

sys/dev/qlnx/qlnxe/ecore_dev.c

4423

ecore_wr(p_hwfn, p_ptt, wake_buffer_clear_offset, 0);

sys/dev/qlnx/qlnxe/ecore_dev.c

4494

ecore_wr(p_hwfn, p_hwfn->p_main_ptt,

sys/dev/qlnx/qlnxe/ecore_dev.c

4496

ecore_wr(p_hwfn, p_hwfn->p_main_ptt,

sys/dev/qlnx/qlnxe/ecore_dev.c

4498

ecore_wr(p_hwfn, p_hwfn->p_main_ptt,

sys/dev/qlnx/qlnxe/ecore_dev.c

4500

ecore_wr(p_hwfn, p_hwfn->p_main_ptt,

sys/dev/qlnx/qlnxe/ecore_dev.c

4503

ecore_wr(p_hwfn, p_hwfn->p_main_ptt,

sys/dev/qlnx/qlnxe/ecore_dev.c

4505

ecore_wr(p_hwfn, p_hwfn->p_main_ptt,

sys/dev/qlnx/qlnxe/ecore_dev.c

4507

ecore_wr(p_hwfn, p_hwfn->p_main_ptt,

sys/dev/qlnx/qlnxe/ecore_dev.c

4509

ecore_wr(p_hwfn, p_hwfn->p_main_ptt,

sys/dev/qlnx/qlnxe/ecore_dev.c

4517

ecore_wr(p_hwfn, p_hwfn->p_main_ptt,

sys/dev/qlnx/qlnxe/ecore_dev.c

5778

ecore_wr(p_hwfn, p_ptt, MISCS_REG_PLL_MAIN_CTRL_4, 0x1);

sys/dev/qlnx/qlnxe/ecore_dev.c

5962

ecore_wr(p_hwfn, p_hwfn->p_main_ptt, PCIE_REG_PRTY_MASK_K2_E5,

sys/dev/qlnx/qlnxe/ecore_dev.c

5967

ecore_wr(p_hwfn, p_hwfn->p_main_ptt,

sys/dev/qlnx/qlnxe/ecore_dev.c

6432

ecore_wr(p_hwfn, p_ptt,

sys/dev/qlnx/qlnxe/ecore_dev.c

6435

ecore_wr(p_hwfn, p_ptt, PRS_REG_MSG_INFO, 0);

sys/dev/qlnx/qlnxe/ecore_dev.c

844

ecore_wr(p_hwfn, p_ptt, addr, p_hwfn->rel_pf_id);

sys/dev/qlnx/qlnxe/ecore_dev.c

920

ecore_wr(p_hwfn, p_ptt, addr, val);

sys/dev/qlnx/qlnxe/ecore_dev.c

955

ecore_wr(p_hwfn, p_ptt, NIG_REG_LLH_ENG_CLS_ROCE_QP_SEL,

sys/dev/qlnx/qlnxe/ecore_dev.c

973

ecore_wr(p_hwfn, p_ptt, addr, val);

sys/dev/qlnx/qlnxe/ecore_hw.c

1165

ecore_wr(p_hwfn, p_ptt, hw_addr, val);

sys/dev/qlnx/qlnxe/ecore_hw.c

492

ecore_wr(p_hwfn, p_ptt, hw_lock_cntr_reg + sizeof(u32), resource);

sys/dev/qlnx/qlnxe/ecore_hw.c

516

ecore_wr(p_hwfn, p_ptt, hw_lock_cntr_reg, resource);

sys/dev/qlnx/qlnxe/ecore_hw.c

547

ecore_wr(p_hwfn, p_ptt, hw_lock_cntr_reg, resource);

sys/dev/qlnx/qlnxe/ecore_hw.c

694

ecore_wr(p_hwfn, p_ptt,

sys/dev/qlnx/qlnxe/ecore_hw.c

700

ecore_wr(p_hwfn, p_ptt,

sys/dev/qlnx/qlnxe/ecore_hw.h

153

void ecore_wr(struct ecore_hwfn *p_hwfn,

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1013

ecore_wr(p_hwfn, p_ptt, tc_weight_base_addr + tc_weight_addr_diff * tc_client_offset, byte_weight);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1016

ecore_wr(p_hwfn, p_ptt, tc_bound_base_addr + tc_bound_addr_diff * tc_client_offset, NIG_ETS_UP_BOUND(byte_weight, req->mtu));

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1029

ecore_wr(p_hwfn, p_ptt, NIG_REG_TX_LB_GLBRATELIMIT_CTRL, ctrl);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1034

ecore_wr(p_hwfn, p_ptt, NIG_REG_TX_LB_GLBRATELIMIT_INC_PERIOD, NIG_RL_PERIOD_CLK_25M);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1036

ecore_wr(p_hwfn, p_ptt, NIG_REG_TX_LB_GLBRATELIMIT_INC_VALUE, inc_val);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1037

ecore_wr(p_hwfn, p_ptt, NIG_REG_TX_LB_GLBRATELIMIT_MAX_VALUE, NIG_RL_MAX_VAL(inc_val, req->mtu));

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1041

ecore_wr(p_hwfn, p_ptt, NIG_REG_TX_LB_GLBRATELIMIT_CTRL, ctrl);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1046

ecore_wr(p_hwfn, p_ptt, NIG_REG_LB_BRBRATELIMIT_CTRL, ctrl);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1051

ecore_wr(p_hwfn, p_ptt, NIG_REG_LB_BRBRATELIMIT_INC_PERIOD, NIG_RL_PERIOD_CLK_25M);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1053

ecore_wr(p_hwfn, p_ptt, NIG_REG_LB_BRBRATELIMIT_INC_VALUE, inc_val);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1054

ecore_wr(p_hwfn, p_ptt, NIG_REG_LB_BRBRATELIMIT_MAX_VALUE, NIG_RL_MAX_VAL(inc_val, req->mtu));

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1058

ecore_wr(p_hwfn, p_ptt, NIG_REG_LB_BRBRATELIMIT_CTRL, ctrl);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1065

ecore_wr(p_hwfn, p_ptt, NIG_REG_LB_TCRATELIMIT_CTRL_0 + reg_offset, ctrl);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1072

ecore_wr(p_hwfn, p_ptt, NIG_REG_LB_TCRATELIMIT_INC_PERIOD_0 + reg_offset, NIG_RL_PERIOD_CLK_25M);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1074

ecore_wr(p_hwfn, p_ptt, NIG_REG_LB_TCRATELIMIT_INC_VALUE_0 + reg_offset, inc_val);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1075

ecore_wr(p_hwfn, p_ptt, NIG_REG_LB_TCRATELIMIT_MAX_VALUE_0 + reg_offset, NIG_RL_MAX_VAL(inc_val, req->mtu));

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1079

ecore_wr(p_hwfn, p_ptt, NIG_REG_LB_TCRATELIMIT_CTRL_0 + reg_offset, ctrl);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1100

ecore_wr(p_hwfn, p_ptt, NIG_REG_PKT_PRIORITY_TO_TC, pri_tc_mask);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1104

ecore_wr(p_hwfn, p_ptt, NIG_REG_PRIORITY_FOR_TC_0 + tc * 4, tc_pri_mask[tc]);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1105

ecore_wr(p_hwfn, p_ptt, NIG_REG_RX_TC0_PRIORITY_MASK + tc * 4, tc_pri_mask[tc]);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1146

ecore_wr(p_hwfn, p_ptt, PRS_REG_ETS_ARB_CLIENT_IS_STRICT, sp_tc_map);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1149

ecore_wr(p_hwfn, p_ptt, PRS_REG_ETS_ARB_CLIENT_IS_SUBJECT2WFQ, wfq_tc_map);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1163

ecore_wr(p_hwfn, p_ptt, PRS_REG_ETS_ARB_CREDIT_WEIGHT_0 + tc * tc_weight_addr_diff, byte_weight);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1166

ecore_wr(p_hwfn, p_ptt, PRS_REG_ETS_ARB_CREDIT_UPPER_BOUND_0 + tc * tc_bound_addr_diff, PRS_ETS_UP_BOUND(byte_weight, req->mtu));

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1218

ecore_wr(p_hwfn, p_ptt, BRB_REG_TOTAL_MAC_SIZE + port * 4, port_blocks);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1221

ecore_wr(p_hwfn, p_ptt, BRB_REG_SHARED_HR_AREA + port * 4, port_shared_blocks);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1234

ecore_wr(p_hwfn, p_ptt, BRB_REG_TC_GUARANTIED_0 + reg_offset, tc_guaranteed_blocks);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1235

ecore_wr(p_hwfn, p_ptt, BRB_REG_MAIN_TC_GUARANTIED_HYST_0 + reg_offset, BRB_HYST_BLOCKS);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1240

ecore_wr(p_hwfn, p_ptt, BRB_REG_LB_TC_FULL_XOFF_THRESHOLD_0 + reg_offset, full_xoff_th);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1241

ecore_wr(p_hwfn, p_ptt, BRB_REG_LB_TC_FULL_XON_THRESHOLD_0 + reg_offset, full_xon_th);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1242

ecore_wr(p_hwfn, p_ptt, BRB_REG_LB_TC_PAUSE_XOFF_THRESHOLD_0 + reg_offset, pause_xoff_th);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1243

ecore_wr(p_hwfn, p_ptt, BRB_REG_LB_TC_PAUSE_XON_THRESHOLD_0 + reg_offset, pause_xon_th);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1248

ecore_wr(p_hwfn, p_ptt, BRB_REG_MAIN_TC_FULL_XOFF_THRESHOLD_0 + reg_offset, full_xoff_th);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1249

ecore_wr(p_hwfn, p_ptt, BRB_REG_MAIN_TC_FULL_XON_THRESHOLD_0 + reg_offset, full_xon_th);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1250

ecore_wr(p_hwfn, p_ptt, BRB_REG_MAIN_TC_PAUSE_XOFF_THRESHOLD_0 + reg_offset, pause_xoff_th);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1251

ecore_wr(p_hwfn, p_ptt, BRB_REG_MAIN_TC_PAUSE_XON_THRESHOLD_0 + reg_offset, pause_xon_th);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1277

ecore_wr(p_hwfn, p_ptt, PRS_REG_VXLAN_PORT, dest_port);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1280

ecore_wr(p_hwfn, p_ptt, NIG_REG_VXLAN_CTRL, dest_port);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1283

ecore_wr(p_hwfn, p_ptt, PBF_REG_VXLAN_PORT, dest_port);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1295

ecore_wr(p_hwfn, p_ptt, PRS_REG_ENCAPSULATION_TYPE_EN, reg_val);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1303

ecore_wr(p_hwfn, p_ptt, PRS_REG_OUTPUT_FORMAT_4_0_BB_K2, (u32)PRS_ETH_TUNN_OUTPUT_FORMAT);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1310

ecore_wr(p_hwfn, p_ptt, NIG_REG_ENC_TYPE_ENABLE, reg_val);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1313

ecore_wr(p_hwfn, p_ptt, DORQ_REG_L2_EDPM_TUNNEL_VXLAN_EN, vxlan_enable ? 1 : 0);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1327

ecore_wr(p_hwfn, p_ptt, PRS_REG_ENCAPSULATION_TYPE_EN, reg_val);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1335

ecore_wr(p_hwfn, p_ptt, PRS_REG_OUTPUT_FORMAT_4_0_BB_K2, (u32)PRS_ETH_TUNN_OUTPUT_FORMAT);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1343

ecore_wr(p_hwfn, p_ptt, NIG_REG_ENC_TYPE_ENABLE, reg_val);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1346

ecore_wr(p_hwfn, p_ptt, DORQ_REG_L2_EDPM_TUNNEL_GRE_ETH_EN, eth_gre_enable ? 1 : 0);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1347

ecore_wr(p_hwfn, p_ptt, DORQ_REG_L2_EDPM_TUNNEL_GRE_IP_EN, ip_gre_enable ? 1 : 0);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1356

ecore_wr(p_hwfn, p_ptt, PRS_REG_NGE_PORT, dest_port);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1359

ecore_wr(p_hwfn, p_ptt, NIG_REG_NGE_PORT, dest_port);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1362

ecore_wr(p_hwfn, p_ptt, PBF_REG_NGE_PORT, dest_port);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1376

ecore_wr(p_hwfn, p_ptt, PRS_REG_ENCAPSULATION_TYPE_EN, reg_val);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1384

ecore_wr(p_hwfn, p_ptt, PRS_REG_OUTPUT_FORMAT_4_0_BB_K2, (u32)PRS_ETH_TUNN_OUTPUT_FORMAT);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1389

ecore_wr(p_hwfn, p_ptt, NIG_REG_NGE_ETH_ENABLE, eth_geneve_enable ? 1 : 0);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1390

ecore_wr(p_hwfn, p_ptt, NIG_REG_NGE_IP_ENABLE, ip_geneve_enable ? 1 : 0);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1397

ecore_wr(p_hwfn, p_ptt, DORQ_REG_L2_EDPM_TUNNEL_NGE_ETH_EN_K2_E5, eth_geneve_enable ? 1 : 0);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1398

ecore_wr(p_hwfn, p_ptt, DORQ_REG_L2_EDPM_TUNNEL_NGE_IP_EN_K2_E5, ip_geneve_enable ? 1 : 0);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1422

ecore_wr(p_hwfn, p_ptt, PRS_REG_OUTPUT_FORMAT_4_0_BB_K2, (u32)PRS_ETH_VXLAN_NO_L2_OUTPUT_FORMAT);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1431

ecore_wr(p_hwfn, p_ptt, PRS_REG_MSG_INFO, reg_val);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1449

ecore_wr(p_hwfn, p_ptt, PRS_REG_SEARCH_GFT, 0);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1454

ecore_wr(p_hwfn, p_ptt, PRS_REG_GFT_CAM + CAM_LINE_SIZE*pf_id, 0);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1457

ecore_wr(p_hwfn, p_ptt, PRS_REG_GFT_PROFILE_MASK_RAM + RAM_LINE_SIZE*pf_id, 0);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1458

ecore_wr(p_hwfn, p_ptt, PRS_REG_GFT_PROFILE_MASK_RAM + RAM_LINE_SIZE*pf_id + REG_SIZE, 0);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1470

ecore_wr(p_hwfn, p_ptt, PRS_REG_CM_HDR_GFT, rfs_cm_hdr_event_id);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1494

ecore_wr(p_hwfn, p_ptt, PRS_REG_CM_HDR_GFT, reg_val);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1497

ecore_wr(p_hwfn, p_ptt, PRS_REG_LOAD_L2_FILTER, 0);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1500

ecore_wr(p_hwfn, p_ptt, PRS_REG_SEARCH_TENANT_ID, 0);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1527

ecore_wr(p_hwfn, p_ptt, PRS_REG_GFT_CAM + CAM_LINE_SIZE*pf_id, cam_line);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1568

ecore_wr(p_hwfn, p_ptt, PRS_REG_GFT_PROFILE_MASK_RAM + RAM_LINE_SIZE*pf_id, ram_line_lo);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1569

ecore_wr(p_hwfn, p_ptt, PRS_REG_GFT_PROFILE_MASK_RAM + RAM_LINE_SIZE*pf_id + REG_SIZE, ram_line_hi);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1572

ecore_wr(p_hwfn, p_ptt, PRS_REG_GFT_PROFILE_MASK_RAM + RAM_LINE_SIZE*PRS_GFT_CAM_LINES_NO_MATCH, 0xffffffff);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1573

ecore_wr(p_hwfn, p_ptt, PRS_REG_GFT_PROFILE_MASK_RAM + RAM_LINE_SIZE*PRS_GFT_CAM_LINES_NO_MATCH + REG_SIZE, 0x3ff);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1576

ecore_wr(p_hwfn, p_ptt, PRS_REG_SEARCH_GFT, 1);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1599

ecore_wr(p_hwfn, p_ptt, PGLUE_B_REG_MSDM_VF_SHIFT_B, msdm_vf_size_log);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1600

ecore_wr(p_hwfn, p_ptt, PGLUE_B_REG_MSDM_OFFSET_MASK_B, msdm_vf_offset_mask);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1768

ecore_wr(p_hwfn, p_ptt, CDU_REG_CCFC_CTX_VALID0, ctx_validation);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1772

ecore_wr(p_hwfn, p_ptt, CDU_REG_CCFC_CTX_VALID1, ctx_validation);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1776

ecore_wr(p_hwfn, p_ptt, CDU_REG_TCFC_CTX_VALID0, ctx_validation);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1818

ecore_wr(p_hwfn, p_ptt, RSS_REG_RSS_RAM_ADDR, rss_addr);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1821

ecore_wr(p_hwfn, p_ptt, RSS_REG_RSS_RAM_MASK, reg_val[0]);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1822

ecore_wr(p_hwfn, p_ptt, RSS_REG_RSS_RAM_MASK + 4, reg_val[1]);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1823

ecore_wr(p_hwfn, p_ptt, RSS_REG_RSS_RAM_MASK + 8, reg_val[2]);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1824

ecore_wr(p_hwfn, p_ptt, RSS_REG_RSS_RAM_MASK + 12, reg_val[3]);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1827

ecore_wr(p_hwfn, p_ptt, RSS_REG_RSS_RAM_DATA, reg_val[0]);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1828

ecore_wr(p_hwfn, p_ptt, RSS_REG_RSS_RAM_DATA + 4, reg_val[1]);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1829

ecore_wr(p_hwfn, p_ptt, RSS_REG_RSS_RAM_DATA + 8, reg_val[2]);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

1830

ecore_wr(p_hwfn, p_ptt, RSS_REG_RSS_RAM_DATA + 12, reg_val[3]);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

473

ecore_wr(p_hwfn, p_ptt, PQ_INFO_RAM_GRC_ADDRESS(pq_id), pq_info);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

683

ecore_wr(p_hwfn, p_ptt, QM_REG_SDMCMDADDR, cmd_addr);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

684

ecore_wr(p_hwfn, p_ptt, QM_REG_SDMCMDDATALSB, cmd_data_lsb);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

685

ecore_wr(p_hwfn, p_ptt, QM_REG_SDMCMDDATAMSB, cmd_data_msb);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

686

ecore_wr(p_hwfn, p_ptt, QM_REG_SDMCMDGO, 1);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

687

ecore_wr(p_hwfn, p_ptt, QM_REG_SDMCMDGO, 0);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

820

ecore_wr(p_hwfn, p_ptt, QM_REG_WFQPFWEIGHT + pf_id * 4, inc_val);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

838

ecore_wr(p_hwfn, p_ptt, QM_REG_RLPFCRD + pf_id * 4, (u32)QM_RL_CRD_REG_SIGN_BIT);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

839

ecore_wr(p_hwfn, p_ptt, QM_REG_RLPFINCVAL + pf_id * 4, inc_val);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

862

ecore_wr(p_hwfn, p_ptt, QM_REG_WFQVPWEIGHT + vport_pq_id * 4, inc_val);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

888

ecore_wr(p_hwfn, p_ptt, QM_REG_RLGLBLCRD + vport_id * 4, (u32)QM_RL_CRD_REG_SIGN_BIT);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

889

ecore_wr(p_hwfn, p_ptt, QM_REG_RLGLBLINCVAL + vport_id * 4, inc_val);

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

996

ecore_wr(p_hwfn, p_ptt, is_lb ? NIG_REG_LB_ARB_CLIENT_IS_STRICT : NIG_REG_TX_ARB_CLIENT_IS_STRICT, (sp_tc_map << tc_client_offset));

sys/dev/qlnx/qlnxe/ecore_init_fw_funcs.c

999

ecore_wr(p_hwfn, p_ptt, is_lb ? NIG_REG_LB_ARB_CLIENT_IS_SUBJECT2WFQ : NIG_REG_TX_ARB_CLIENT_IS_SUBJECT2WFQ, (wfq_tc_map << tc_client_offset));

sys/dev/qlnx/qlnxe/ecore_init_ops.c

129

ecore_wr(p_hwfn, p_ptt, addr + (i << 2),

sys/dev/qlnx/qlnxe/ecore_init_ops.c

203

ecore_wr(p_hwfn, p_ptt, addr + (i << 2), data[i]);

sys/dev/qlnx/qlnxe/ecore_init_ops.c

238

ecore_wr(p_hwfn, p_ptt, addr, fill);

sys/dev/qlnx/qlnxe/ecore_init_ops.c

346

ecore_wr(p_hwfn, p_ptt, addr, data);

sys/dev/qlnx/qlnxe/ecore_init_ops.c

601

ecore_wr(p_hwfn, p_ptt,

sys/dev/qlnx/qlnxe/ecore_int.c

1149

ecore_wr(p_hwfn, p_hwfn->p_dpc_ptt, IGU_REG_ATTENTION_ENABLE, aeu_mask);

sys/dev/qlnx/qlnxe/ecore_int.c

1359

ecore_wr(p_hwfn, p_ptt, IGU_REG_ATTN_MSG_ADDR_L,

sys/dev/qlnx/qlnxe/ecore_int.c

1361

ecore_wr(p_hwfn, p_ptt, IGU_REG_ATTN_MSG_ADDR_H,

sys/dev/qlnx/qlnxe/ecore_int.c

138

ecore_wr(p_hwfn, p_hwfn->p_dpc_ptt, MCP_REG_CPU_EVENT_MASK,

sys/dev/qlnx/qlnxe/ecore_int.c

1509

ecore_wr(p_hwfn, p_ptt,

sys/dev/qlnx/qlnxe/ecore_int.c

1906

ecore_wr(p_hwfn, p_ptt, IGU_REG_PF_CONFIGURATION, igu_pf_conf);

sys/dev/qlnx/qlnxe/ecore_int.c

1920

ecore_wr(p_hwfn, p_ptt, IGU_REG_ATTENTION_ENABLE, 0);

sys/dev/qlnx/qlnxe/ecore_int.c

1921

ecore_wr(p_hwfn, p_ptt, IGU_REG_LEADING_EDGE_LATCH, 0xfff);

sys/dev/qlnx/qlnxe/ecore_int.c

1922

ecore_wr(p_hwfn, p_ptt, IGU_REG_TRAILING_EDGE_LATCH, 0xfff);

sys/dev/qlnx/qlnxe/ecore_int.c

1923

ecore_wr(p_hwfn, p_ptt, IGU_REG_ATTENTION_ENABLE, 0xfff);

sys/dev/qlnx/qlnxe/ecore_int.c

1929

ecore_wr(p_hwfn, p_ptt, MISC_REG_AEU_MASK_ATTN_IGU, 0xff);

sys/dev/qlnx/qlnxe/ecore_int.c

1965

ecore_wr(p_hwfn, p_ptt, IGU_REG_PF_CONFIGURATION, 0);

sys/dev/qlnx/qlnxe/ecore_int.c

1997

ecore_wr(p_hwfn, p_ptt, IGU_REG_COMMAND_REG_32LSB_DATA, data);

sys/dev/qlnx/qlnxe/ecore_int.c

2001

ecore_wr(p_hwfn, p_ptt, IGU_REG_COMMAND_REG_CTRL, cmd_ctrl);

sys/dev/qlnx/qlnxe/ecore_int.c

2065

ecore_wr(p_hwfn, p_ptt,

sys/dev/qlnx/qlnxe/ecore_int.c

2083

ecore_wr(p_hwfn, p_ptt, IGU_REG_BLOCK_CONFIGURATION, val);

sys/dev/qlnx/qlnxe/ecore_int.c

2232

ecore_wr(p_hwfn, p_ptt,

sys/dev/qlnx/qlnxe/ecore_int.c

2496

ecore_wr(p_hwfn, p_ptt,

sys/dev/qlnx/qlnxe/ecore_int.c

293

ecore_wr(p_hwfn, p_hwfn->p_dpc_ptt,

sys/dev/qlnx/qlnxe/ecore_int.c

398

ecore_wr(p_hwfn, p_ptt, PGLUE_B_REG_LATCHED_ERRORS_CLR, (1 << 2));

sys/dev/qlnx/qlnxe/ecore_int.c

465

ecore_wr(p_hwfn, p_ptt, DORQ_REG_DPM_FORCE_ABORT, 0x1);

sys/dev/qlnx/qlnxe/ecore_int.c

468

ecore_wr(p_hwfn, p_ptt, DORQ_REG_PF_OVFL_STICKY, 0x0);

sys/dev/qlnx/qlnxe/ecore_int.c

532

ecore_wr(p_hwfn, p_ptt, DORQ_REG_DB_DROP_DETAILS_REL, 0);

sys/dev/qlnx/qlnxe/ecore_int.c

537

ecore_wr(p_hwfn, p_ptt, DORQ_REG_INT_STS_WR,

sys/dev/qlnx/qlnxe/ecore_int.c

570

ecore_wr(p_hwfn, p_hwfn->p_dpc_ptt, TM_REG_INT_MASK_1, val);

sys/dev/qlnx/qlnxe/ecore_int.c

838

ecore_wr(p_hwfn, p_hwfn->p_dpc_ptt, IGU_REG_ATTENTION_ENABLE, igu_mask);

sys/dev/qlnx/qlnxe/ecore_int.c

850

ecore_wr(p_hwfn, p_hwfn->p_dpc_ptt,

sys/dev/qlnx/qlnxe/ecore_int.c

949

ecore_wr(p_hwfn, p_hwfn->p_dpc_ptt, aeu_en_reg, (val & mask));

sys/dev/qlnx/qlnxe/ecore_int.c

990

ecore_wr(p_hwfn, p_hwfn->p_dpc_ptt, aeu_en_reg, val & mask);

sys/dev/qlnx/qlnxe/ecore_iwarp.c

124

ecore_wr(p_hwfn, p_ptt, p_hwfn->rdma_prs_search_reg, 1);

sys/dev/qlnx/qlnxe/ecore_ll2.c

1509

ecore_wr(p_hwfn, p_ptt, PRS_REG_USE_LIGHT_L2, 1);

sys/dev/qlnx/qlnxe/ecore_mcp.c

1319

ecore_wr(p_hwfn, p_ptt,

sys/dev/qlnx/qlnxe/ecore_mcp.c

1811

ecore_wr(p_hwfn, p_ptt,

sys/dev/qlnx/qlnxe/ecore_mcp.c

1816

ecore_wr(p_hwfn, p_ptt, DORQ_REG_TAG1_OVRD_MODE, 1);

sys/dev/qlnx/qlnxe/ecore_mcp.c

1817

ecore_wr(p_hwfn, p_ptt, DORQ_REG_PF_EXT_VID_BB_K2,

sys/dev/qlnx/qlnxe/ecore_mcp.c

2244

ecore_wr(p_hwfn, p_ptt,

sys/dev/qlnx/qlnxe/ecore_mcp.c

2853

ecore_wr(p_hwfn, p_ptt, MISC_REG_AEU_GENERAL_ATTN_35, 0x1);

sys/dev/qlnx/qlnxe/ecore_mcp.c

3026

ecore_wr(p_hwfn, p_ptt, MCP_REG_CPU_STATE, 0xffffffff);

sys/dev/qlnx/qlnxe/ecore_mcp.c

3030

ecore_wr(p_hwfn, p_ptt, MCP_REG_CPU_MODE, cpu_mode);

sys/dev/qlnx/qlnxe/ecore_mcp.c

57

ecore_wr(_p_hwfn, _p_ptt, (_p_hwfn->mcp_info->_ptr + _offset), \

sys/dev/qlnx/qlnxe/ecore_mng_tlv.c

1385

ecore_wr(p_hwfn, p_ptt, addr + offset, val);

sys/dev/qlnx/qlnxe/ecore_rdma.c

1001

ecore_wr(p_hwfn,

sys/dev/qlnx/qlnxe/ecore_rdma.c

1010

ecore_wr(p_hwfn, p_ptt, PRS_REG_LIGHT_L2_ETHERTYPE_EN,

sys/dev/qlnx/qlnxe/ecore_rdma.c

1022

ecore_wr(p_hwfn,

sys/dev/qlnx/qlnxe/ecore_rdma.c

1026

ecore_wr(p_hwfn,

sys/dev/qlnx/qlnxe/ecore_rdma.c

749

ecore_wr(p_hwfn,

sys/dev/qlnx/qlnxe/ecore_rdma.c

763

ecore_wr(p_hwfn, p_ptt, PRS_REG_LIGHT_L2_ETHERTYPE_EN,

sys/dev/qlnx/qlnxe/ecore_rdma.c

768

ecore_wr(p_hwfn,

sys/dev/qlnx/qlnxe/ecore_rdma.c

772

ecore_wr(p_hwfn,

sys/dev/qlnx/qlnxe/ecore_rdma.c

998

ecore_wr(p_hwfn, p_ptt, p_hwfn->rdma_prs_search_reg, 0);

sys/dev/qlnx/qlnxe/ecore_roce.c

1533

ecore_wr(p_hwfn, p_ptt, DORQ_REG_PF_DPM_ENABLE, val);

sys/dev/qlnx/qlnxe/ecore_roce.c

184

ecore_wr(p_hwfn,

sys/dev/qlnx/qlnxe/ecore_sriov.c

1003

ecore_wr(p_hwfn, p_ptt,

sys/dev/qlnx/qlnxe/ecore_sriov.c

1052

ecore_wr(p_hwfn, p_ptt, addr, val);

sys/dev/qlnx/qlnxe/ecore_sriov.c

805

ecore_wr(p_hwfn, p_ptt,

sys/dev/qlnx/qlnxe/ecore_sriov.c

819

ecore_wr(p_hwfn, p_ptt, IGU_REG_STATISTIC_NUM_VF_MSG_SENT, 0);

sys/dev/qlnx/qlnxe/ecore_sriov.c

848

ecore_wr(p_hwfn, p_ptt, IGU_REG_VF_CONFIGURATION, igu_vf_conf);

sys/dev/qlnx/qlnxe/ecore_sriov.c

961

ecore_wr(p_hwfn, p_ptt, reg_addr, val);