dbg_init
dbg_init();
dbg_init();
void dbg_init(void);
uint32_t aq_dbg_categories = dbg_init | dbg_config | dbg_tx | dbg_rx | dbg_intr | dbg_fw;
trace(dbg_init, "RBL enabled = %d", hw->rbl_enabled);
trace(dbg_init, "RBL> Host Bootload mode");
trace(dbg_init, "using F/W ops v1.x");
trace(dbg_init, "using F/W ops v2.x");
trace_error(dbg_init,
trace(dbg_init, "FLB> MAC kickstart done, %d ms", k);
trace_error(dbg_init, "FLB> Global Soft Reset failed");
trace(dbg_init, "FLB> F/W restart: %d ms", k * 10);
trace(dbg_init, "RBL> MAC reset STARTED!");
trace_error(dbg_init, "RBL> RBL restart failed: timeout");
trace(dbg_init, "RBL> reset complete! [Flash]");
trace(dbg_init, "RBL> reset complete! [Host Bootload]");
trace_error(dbg_init, "unknown RBL status 0x%x", rbl_status);
trace_error(dbg_init,
trace_error(dbg_init, "F/W 1.x reset finalize timeout");
trace(dbg_init, "fw1x> set mode %d, rate mask = %#x; raw = %#x",
trace(dbg_init, "fw1x> get_mode(): 0x36c -> %x, 0x368 -> %x",
trace_error(dbg_init, "couldn't read eFUSE Shadow Address");
trace(dbg_init, "fw1x> eFUSE MAC addr -> %02x-%02x-%02x-%02x-%02x-%02x",
trace(dbg_init,
trace_error(dbg_init,
trace_error(dbg_init, "fw2x> unknown MPI state %d", mode);
trace_error(dbg_init, "couldn't read eFUSE Shadow Address");
init_cudbg_hdr(&handle->dbg_init.header);
struct cudbg_init *cudbg_init = &priv->dbg_init;
struct cudbg_init *cudbg_init = &priv->dbg_init;
struct cudbg_init *cudbg_init = &priv->dbg_init;
u8 *dbg_bitmap = ((struct cudbg_private *)handle)->dbg_init.dbg_bitmap;
&(((struct cudbg_private *)handle)->dbg_init);
struct cudbg_init dbg_init;