crypto/heimdal/lib/asn1/check-gen.c

679

COMPARE_INTEGER(aa,ab,bar);

crypto/heimdal/lib/asn1/check-gen.c

695

lt1.bar = 2;

crypto/openssl/test/namemap_internal_test.c

109

const EVP_CIPHER *aes128, *bar;

crypto/openssl/test/namemap_internal_test.c

122

bar = EVP_get_cipherbyname("bar");

crypto/openssl/test/namemap_internal_test.c

123

if (!TEST_ptr_eq(aes128, bar))

lib/libproc/tests/target_prog.c

56

__strong_reference(bar, baz);

lib/libproc/tests/target_prog.c

68

bar(); /* force the symbol to be emitted */

lib/libthr/thread/thr_barrier.c

100

pthread_barrier_t bar;

lib/libthr/thread/thr_barrier.c

108

bar = calloc(1, sizeof(struct pthread_barrier));

lib/libthr/thread/thr_barrier.c

109

if (bar == NULL)

lib/libthr/thread/thr_barrier.c

111

*barrier = bar;

lib/libthr/thread/thr_barrier.c

114

bar = __thr_pshared_offpage(barrier, 1);

lib/libthr/thread/thr_barrier.c

115

if (bar == NULL)

lib/libthr/thread/thr_barrier.c

121

_thr_umutex_init(&bar->b_lock);

lib/libthr/thread/thr_barrier.c

122

_thr_ucond_init(&bar->b_cv);

lib/libthr/thread/thr_barrier.c

124

bar->b_lock.m_flags |= USYNC_PROCESS_SHARED;

lib/libthr/thread/thr_barrier.c

125

bar->b_cv.c_flags |= USYNC_PROCESS_SHARED;

lib/libthr/thread/thr_barrier.c

127

bar->b_count = count;

lib/libthr/thread/thr_barrier.c

135

pthread_barrier_t bar;

lib/libthr/thread/thr_barrier.c

143

bar = __thr_pshared_offpage(barrier, 0);

lib/libthr/thread/thr_barrier.c

144

if (bar == NULL)

lib/libthr/thread/thr_barrier.c

147

bar = *barrier;

lib/libthr/thread/thr_barrier.c

150

THR_UMUTEX_LOCK(curthread, &bar->b_lock);

lib/libthr/thread/thr_barrier.c

151

if (++bar->b_waiters == bar->b_count) {

lib/libthr/thread/thr_barrier.c

153

bar->b_waiters = 0;

lib/libthr/thread/thr_barrier.c

154

bar->b_cycle++;

lib/libthr/thread/thr_barrier.c

155

_thr_ucond_broadcast(&bar->b_cv);

lib/libthr/thread/thr_barrier.c

156

THR_UMUTEX_UNLOCK(curthread, &bar->b_lock);

lib/libthr/thread/thr_barrier.c

159

cycle = bar->b_cycle;

lib/libthr/thread/thr_barrier.c

160

bar->b_refcount++;

lib/libthr/thread/thr_barrier.c

162

_thr_ucond_wait(&bar->b_cv, &bar->b_lock, NULL,

lib/libthr/thread/thr_barrier.c

164

THR_UMUTEX_LOCK(curthread, &bar->b_lock);

lib/libthr/thread/thr_barrier.c

166

} while (cycle == bar->b_cycle);

lib/libthr/thread/thr_barrier.c

167

if (--bar->b_refcount == 0 && bar->b_destroying)

lib/libthr/thread/thr_barrier.c

168

_thr_ucond_broadcast(&bar->b_cv);

lib/libthr/thread/thr_barrier.c

169

THR_UMUTEX_UNLOCK(curthread, &bar->b_lock);

lib/libthr/thread/thr_barrier.c

47

pthread_barrier_t bar;

lib/libthr/thread/thr_barrier.c

55

bar = __thr_pshared_offpage(barrier, 0);

lib/libthr/thread/thr_barrier.c

56

if (bar == NULL) {

lib/libthr/thread/thr_barrier.c

62

bar = *barrier;

lib/libthr/thread/thr_barrier.c

66

THR_UMUTEX_LOCK(curthread, &bar->b_lock);

lib/libthr/thread/thr_barrier.c

67

if (bar->b_destroying) {

lib/libthr/thread/thr_barrier.c

68

THR_UMUTEX_UNLOCK(curthread, &bar->b_lock);

lib/libthr/thread/thr_barrier.c

71

bar->b_destroying = 1;

lib/libthr/thread/thr_barrier.c

73

if (bar->b_waiters > 0) {

lib/libthr/thread/thr_barrier.c

74

bar->b_destroying = 0;

lib/libthr/thread/thr_barrier.c

75

THR_UMUTEX_UNLOCK(curthread, &bar->b_lock);

lib/libthr/thread/thr_barrier.c

78

if (bar->b_refcount != 0) {

lib/libthr/thread/thr_barrier.c

79

_thr_ucond_wait(&bar->b_cv, &bar->b_lock, NULL,

lib/libthr/thread/thr_barrier.c

81

THR_UMUTEX_LOCK(curthread, &bar->b_lock);

lib/libthr/thread/thr_barrier.c

85

bar->b_destroying = 0;

lib/libthr/thread/thr_barrier.c

86

THR_UMUTEX_UNLOCK(curthread, &bar->b_lock);

lib/libthr/thread/thr_barrier.c

92

free(bar);

stand/efi/loader/framebuffer.c

294

u_int bar;

stand/efi/loader/framebuffer.c

302

for (bar = 0; bar < 6; bar++) {

stand/efi/loader/framebuffer.c

303

status = pciio->GetBarAttributes(pciio, bar, NULL,

stand/i386/libi386/comconsole.c

219

uint8_t bus, dev, func, bar;

stand/i386/libi386/comconsole.c

245

bar = pres;

stand/i386/libi386/comconsole.c

247

bar = 0x10;

stand/i386/libi386/comconsole.c

249

locator = (bar << 16) | biospci_locator(bus, dev, func);

stand/uboot/api_public.h

112

unsigned long bar;

stand/uboot/glue.c

496

printf(" bar\t\t= 0x%08lx\n", si->bar);

sys/arm/mv/mv_pci.c

736

uint32_t addr, bar;

sys/arm/mv/mv_pci.c

746

bar = mv_pcib_read_config(sc->sc_dev, bus, slot, func, reg, 4);

sys/arm/mv/mv_pci.c

747

if (bar == 0)

sys/arm/mv/mv_pci.c

751

width = ((bar & 7) == 4) ? 2 : 1;

sys/arm/mv/mv_pci.c

753

addr = pcib_alloc(sc, bar);

sys/arm/mv/mv_pci.c

759

bus, slot, func, reg, bar, addr);

sys/arm/mv/mv_pci.c

873

int maxbar, bar, i;

sys/arm/mv/mv_pci.c

876

bar = 0;

sys/arm/mv/mv_pci.c

879

while (bar < maxbar) {

sys/arm/mv/mv_pci.c

880

i = mv_pcib_init_bar(sc, bus, slot, func, bar);

sys/arm/mv/mv_pci.c

881

bar += i;

sys/arm/nvidia/tegra_pcie.c

1227

tegra_pcib_set_bar(struct tegra_pcib_softc *sc, int bar, uint32_t axi,

sys/arm/nvidia/tegra_pcie.c

1238

AFI_WR4(sc, bars[bar].axi_start, axi_reg);

sys/arm/nvidia/tegra_pcie.c

1239

AFI_WR4(sc, bars[bar].size, size_reg);

sys/arm/nvidia/tegra_pcie.c

1240

AFI_WR4(sc, bars[bar].fpci_start, fpci_reg);

sys/arm64/include/atomic.h

102

_ATOMIC_OP_PROTO(t, op, bar, _lse) \

sys/arm64/include/atomic.h

117

_ATOMIC_OP_PROTO(t, op, bar, ) \

sys/arm64/include/atomic.h

120

atomic_##op##_##bar##t##_lse(p, val); \

sys/arm64/include/atomic.h

122

atomic_##op##_##bar##t##_llsc(p, val); \

sys/arm64/include/atomic.h

125

#define __ATOMIC_OP(op, llsc_asm_op, lse_asm_op, pre, bar, a, l) \

sys/arm64/include/atomic.h

127

bar, a, l) \

sys/arm64/include/atomic.h

129

bar, a, l) \

sys/arm64/include/atomic.h

131

bar, a, l) \

sys/arm64/include/atomic.h

133

bar, a, l)

sys/arm64/include/atomic.h

145

#define _ATOMIC_CMPSET_PROTO(t, bar, flav) \

sys/arm64/include/atomic.h

147

atomic_cmpset_##bar##t##flav(volatile uint##t##_t *p, \

sys/arm64/include/atomic.h

150

#define _ATOMIC_FCMPSET_PROTO(t, bar, flav) \

sys/arm64/include/atomic.h

152

atomic_fcmpset_##bar##t##flav(volatile uint##t##_t *p, \

sys/arm64/include/atomic.h

155

#define _ATOMIC_CMPSET_IMPL(t, w, s, bar, a, l) \

sys/arm64/include/atomic.h

156

_ATOMIC_CMPSET_PROTO(t, bar, _llsc) \

sys/arm64/include/atomic.h

177

_ATOMIC_CMPSET_PROTO(t, bar, _lse) \

sys/arm64/include/atomic.h

197

_ATOMIC_CMPSET_PROTO(t, bar, ) \

sys/arm64/include/atomic.h

200

return (atomic_cmpset_##bar##t##_lse(p, cmpval, \

sys/arm64/include/atomic.h

203

return (atomic_cmpset_##bar##t##_llsc(p, cmpval, \

sys/arm64/include/atomic.h

207

_ATOMIC_FCMPSET_PROTO(t, bar, _llsc) \

sys/arm64/include/atomic.h

229

_ATOMIC_FCMPSET_PROTO(t, bar, _lse) \

sys/arm64/include/atomic.h

250

_ATOMIC_FCMPSET_PROTO(t, bar, ) \

sys/arm64/include/atomic.h

253

return (atomic_fcmpset_##bar##t##_lse(p, cmpval, \

sys/arm64/include/atomic.h

256

return (atomic_fcmpset_##bar##t##_llsc(p, cmpval, \

sys/arm64/include/atomic.h

260

#define _ATOMIC_CMPSET(bar, a, l) \

sys/arm64/include/atomic.h

261

_ATOMIC_CMPSET_IMPL(8, w, b, bar, a, l) \

sys/arm64/include/atomic.h

262

_ATOMIC_CMPSET_IMPL(16, w, h, bar, a, l) \

sys/arm64/include/atomic.h

263

_ATOMIC_CMPSET_IMPL(32, w, , bar, a, l) \

sys/arm64/include/atomic.h

264

_ATOMIC_CMPSET_IMPL(64, , , bar, a, l)

sys/arm64/include/atomic.h

408

#define _ATOMIC_TEST_OP_PROTO(t, op, bar, flav) \

sys/arm64/include/atomic.h

410

atomic_testand##op##_##bar##t##flav(volatile uint##t##_t *p, u_int val)

sys/arm64/include/atomic.h

412

#define _ATOMIC_TEST_OP_IMPL(t, w, op, llsc_asm_op, lse_asm_op, bar, a) \

sys/arm64/include/atomic.h

413

_ATOMIC_TEST_OP_PROTO(t, op, bar, _llsc) \

sys/arm64/include/atomic.h

432

_ATOMIC_TEST_OP_PROTO(t, op, bar, _lse) \

sys/arm64/include/atomic.h

449

_ATOMIC_TEST_OP_PROTO(t, op, bar, ) \

sys/arm64/include/atomic.h

452

return (atomic_testand##op##_##bar##t##_lse(p, val)); \

sys/arm64/include/atomic.h

454

return (atomic_testand##op##_##bar##t##_llsc(p, val)); \

sys/arm64/include/atomic.h

80

#define _ATOMIC_OP_PROTO(t, op, bar, flav) \

sys/arm64/include/atomic.h

82

atomic_##op##_##bar##t##flav(volatile uint##t##_t *p, uint##t##_t val)

sys/arm64/include/atomic.h

84

#define _ATOMIC_OP_IMPL(t, w, s, op, llsc_asm_op, lse_asm_op, pre, bar, a, l) \

sys/arm64/include/atomic.h

85

_ATOMIC_OP_PROTO(t, op, bar, _llsc) \

sys/compat/linuxkpi/common/include/linux/pci.h

1455

int bar, error;

sys/compat/linuxkpi/common/include/linux/pci.h

1459

for (bar = requests = 0; requests != req_mask; bar++) {

sys/compat/linuxkpi/common/include/linux/pci.h

1460

if ((req_mask & (1 << bar)) == 0)

sys/compat/linuxkpi/common/include/linux/pci.h

1462

error = pci_request_region(pdev, bar, name);

sys/compat/linuxkpi/common/include/linux/pci.h

1465

requests |= (1 << bar);

sys/compat/linuxkpi/common/include/linux/pci.h

1475

for (bar = PCIR_MAX_BAR_0; bar >= 0; bar--) {

sys/compat/linuxkpi/common/include/linux/pci.h

1476

if ((requests & (1 << bar)) != 0)

sys/compat/linuxkpi/common/include/linux/pci.h

1477

pci_release_region(pdev, bar);

sys/compat/linuxkpi/common/include/linux/pci.h

1563

pci_assign_resource(struct pci_dev *pdev, int bar)

sys/compat/linuxkpi/common/include/linux/pci.h

381

void linuxkpi_pci_release_region(struct pci_dev *pdev, int bar);

sys/compat/linuxkpi/common/include/linux/pci.h

412

pci_resource_type(struct pci_dev *pdev, int bar)

sys/compat/linuxkpi/common/include/linux/pci.h

416

pm = pci_find_bar(pdev->dev.bsddev, PCIR_BAR(bar));

sys/compat/linuxkpi/common/include/linux/pci.h

430

pci_resource_flags(struct pci_dev *pdev, int bar)

sys/compat/linuxkpi/common/include/linux/pci.h

434

type = pci_resource_type(pdev, bar);

sys/compat/linuxkpi/common/include/linux/pci.h

571

#define pci_request_region(pdev, bar, res_name) \

sys/compat/linuxkpi/common/include/linux/pci.h

572

linuxkpi_pci_request_region(pdev, bar, res_name)

sys/compat/linuxkpi/common/include/linux/pci.h

573

#define pci_release_region(pdev, bar) \

sys/compat/linuxkpi/common/include/linux/pci.h

574

linuxkpi_pci_release_region(pdev, bar)

sys/compat/linuxkpi/common/include/linux/pci.h

615

unsigned long pci_resource_start(struct pci_dev *pdev, int bar);

sys/compat/linuxkpi/common/include/linux/pci.h

616

unsigned long pci_resource_len(struct pci_dev *pdev, int bar);

sys/compat/linuxkpi/common/include/linux/pci.h

619

pci_bus_address(struct pci_dev *pdev, int bar)

sys/compat/linuxkpi/common/include/linux/pci.h

622

return (pci_resource_start(pdev, bar));

sys/compat/linuxkpi/common/include/linux/pci.h

817

#define pcim_iomap(pdev, bar, maxlen) \

sys/compat/linuxkpi/common/include/linux/pci.h

818

linuxkpi_pcim_iomap(pdev, bar, maxlen)

sys/compat/linuxkpi/common/src/linux_aperture.c

357

int bar, ret = 0;

sys/compat/linuxkpi/common/src/linux_aperture.c

367

for (bar = 0; bar < PCI_STD_NUM_BARS; ++bar) {

sys/compat/linuxkpi/common/src/linux_aperture.c

368

if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM))

sys/compat/linuxkpi/common/src/linux_aperture.c

371

base = pci_resource_start(pdev, bar);

sys/compat/linuxkpi/common/src/linux_aperture.c

372

size = pci_resource_len(pdev, bar);

sys/compat/linuxkpi/common/src/linux_pci.c

1007

linuxkpi_pci_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen)

sys/compat/linuxkpi/common/src/linux_pci.c

1009

if (!lkpi_pci_bar_id_valid(bar))

sys/compat/linuxkpi/common/src/linux_pci.c

1012

return (linuxkpi_pci_iomap_range(pdev, bar, 0, maxlen));

sys/compat/linuxkpi/common/src/linux_pci.c

1016

linuxkpi_pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen)

sys/compat/linuxkpi/common/src/linux_pci.c

1021

if (!lkpi_pci_bar_id_valid(bar))

sys/compat/linuxkpi/common/src/linux_pci.c

1028

if (dr->res_table[bar] != NULL)

sys/compat/linuxkpi/common/src/linux_pci.c

1029

return (dr->res_table[bar]);

sys/compat/linuxkpi/common/src/linux_pci.c

1031

res = linuxkpi_pci_iomap(pdev, bar, maxlen);

sys/compat/linuxkpi/common/src/linux_pci.c

1039

lkpi_set_pcim_iomap_devres(dr, bar, res);

sys/compat/linuxkpi/common/src/linux_pci.c

1074

int bar;

sys/compat/linuxkpi/common/src/linux_pci.c

1081

for (bar = mappings = 0; mappings != mask; bar++) {

sys/compat/linuxkpi/common/src/linux_pci.c

1082

if ((mask & (1 << bar)) == 0)

sys/compat/linuxkpi/common/src/linux_pci.c

1086

if (dr->mmio_table[bar] != NULL) {

sys/compat/linuxkpi/common/src/linux_pci.c

1088

__func__, bar, dr->mmio_table[bar]);

sys/compat/linuxkpi/common/src/linux_pci.c

1092

res = _lkpi_pci_iomap(pdev, bar, 0);

sys/compat/linuxkpi/common/src/linux_pci.c

1095

lkpi_set_pcim_iomap_devres(dr, bar, res);

sys/compat/linuxkpi/common/src/linux_pci.c

1097

mappings |= (1 << bar);

sys/compat/linuxkpi/common/src/linux_pci.c

1102

for (bar = PCIR_MAX_BAR_0; bar >= 0; bar--) {

sys/compat/linuxkpi/common/src/linux_pci.c

1103

if ((mappings & (1 << bar)) != 0) {

sys/compat/linuxkpi/common/src/linux_pci.c

1104

res = dr->mmio_table[bar];

sys/compat/linuxkpi/common/src/linux_pci.c

1119

int bar;

sys/compat/linuxkpi/common/src/linux_pci.c

1123

for (bar = PCIR_MAX_BAR_0; bar >= 0; bar--) {

sys/compat/linuxkpi/common/src/linux_pci.c

1125

if (dr->mmio_table[bar] == NULL)

sys/compat/linuxkpi/common/src/linux_pci.c

1128

pci_iounmap(pdev, dr->mmio_table[bar]);

sys/compat/linuxkpi/common/src/linux_pci.c

1267

lkpi_pci_get_bar(struct pci_dev *pdev, int bar, bool reserve)

sys/compat/linuxkpi/common/src/linux_pci.c

1271

type = pci_resource_type(pdev, bar);

sys/compat/linuxkpi/common/src/linux_pci.c

1274

bar = PCIR_BAR(bar);

sys/compat/linuxkpi/common/src/linux_pci.c

1275

return (linux_pci_get_rle(pdev, type, bar, reserve));

sys/compat/linuxkpi/common/src/linux_pci.c

1298

pci_resource_start(struct pci_dev *pdev, int bar)

sys/compat/linuxkpi/common/src/linux_pci.c

1305

if ((rle = lkpi_pci_get_bar(pdev, bar, true)) == NULL)

sys/compat/linuxkpi/common/src/linux_pci.c

1320

pci_resource_len(struct pci_dev *pdev, int bar)

sys/compat/linuxkpi/common/src/linux_pci.c

1324

if ((rle = lkpi_pci_get_bar(pdev, bar, true)) == NULL)

sys/compat/linuxkpi/common/src/linux_pci.c

1330

lkpi_pci_request_region(struct pci_dev *pdev, int bar, const char *res_name,

sys/compat/linuxkpi/common/src/linux_pci.c

1339

if (!lkpi_pci_bar_id_valid(bar))

sys/compat/linuxkpi/common/src/linux_pci.c

1342

type = pci_resource_type(pdev, bar);

sys/compat/linuxkpi/common/src/linux_pci.c

1346

rid = PCIR_BAR(bar);

sys/compat/linuxkpi/common/src/linux_pci.c

1352

__func__, bar, type, PCIR_BAR(bar));

sys/compat/linuxkpi/common/src/linux_pci.c

1369

dr->region_mask |= (1 << bar);

sys/compat/linuxkpi/common/src/linux_pci.c

1370

dr->region_table[bar] = res;

sys/compat/linuxkpi/common/src/linux_pci.c

1375

mmio->rid = PCIR_BAR(bar);

sys/compat/linuxkpi/common/src/linux_pci.c

1384

linuxkpi_pci_request_region(struct pci_dev *pdev, int bar, const char *res_name)

sys/compat/linuxkpi/common/src/linux_pci.c

1386

return (lkpi_pci_request_region(pdev, bar, res_name, false));

sys/compat/linuxkpi/common/src/linux_pci.c

1408

int bar, error;

sys/compat/linuxkpi/common/src/linux_pci.c

1410

for (bar = 0; bar <= PCIR_MAX_BAR_0; bar++) {

sys/compat/linuxkpi/common/src/linux_pci.c

1411

error = lkpi_pci_request_region(pdev, bar, res_name, true);

sys/compat/linuxkpi/common/src/linux_pci.c

1415

bar, res_name, error);

sys/compat/linuxkpi/common/src/linux_pci.c

1424

linuxkpi_pci_release_region(struct pci_dev *pdev, int bar)

sys/compat/linuxkpi/common/src/linux_pci.c

1430

if ((rle = lkpi_pci_get_bar(pdev, bar, false)) == NULL)

sys/compat/linuxkpi/common/src/linux_pci.c

1439

KASSERT(dr->region_table[bar] == rle->res, ("%s: pdev %p bar %d"

sys/compat/linuxkpi/common/src/linux_pci.c

1441

bar, dr->region_table[bar], rle->res));

sys/compat/linuxkpi/common/src/linux_pci.c

1442

dr->region_table[bar] = NULL;

sys/compat/linuxkpi/common/src/linux_pci.c

1443

dr->region_mask &= ~(1 << bar);

sys/compat/linuxkpi/common/src/linux_pci.c

163

lkpi_set_pcim_iomap_devres(struct pcim_iomap_devres *dr, int bar,

sys/compat/linuxkpi/common/src/linux_pci.c

166

dr->mmio_table[bar] = (void *)rman_get_bushandle(res);

sys/compat/linuxkpi/common/src/linux_pci.c

167

dr->res_table[bar] = res;

sys/compat/linuxkpi/common/src/linux_pci.c

171

lkpi_pci_bar_id_valid(int bar)

sys/compat/linuxkpi/common/src/linux_pci.c

173

if (bar < 0 || bar > PCIR_MAX_BAR_0)

sys/compat/linuxkpi/common/src/linux_pci.c

856

int bar;

sys/compat/linuxkpi/common/src/linux_pci.c

871

for (bar = PCIR_MAX_BAR_0; bar >= 0; bar--) {

sys/compat/linuxkpi/common/src/linux_pci.c

873

if ((dr->region_mask & (1 << bar)) == 0)

sys/compat/linuxkpi/common/src/linux_pci.c

875

pci_release_region(pdev, bar);

sys/compat/linuxkpi/common/src/linux_pci.c

945

_lkpi_pci_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen __unused)

sys/compat/linuxkpi/common/src/linux_pci.c

950

if (!lkpi_pci_bar_id_valid(bar))

sys/compat/linuxkpi/common/src/linux_pci.c

953

type = pci_resource_type(pdev, bar);

sys/compat/linuxkpi/common/src/linux_pci.c

956

__func__, bar, type);

sys/compat/linuxkpi/common/src/linux_pci.c

965

if (mmio->type == type && mmio->rid == PCIR_BAR(bar)) {

sys/compat/linuxkpi/common/src/linux_pci.c

971

mmio->rid = PCIR_BAR(bar);

sys/compat/linuxkpi/common/src/linux_pci.c

978

__func__, bar, type, PCIR_BAR(bar));

sys/compat/linuxkpi/common/src/linux_pci.c

988

linuxkpi_pci_iomap_range(struct pci_dev *pdev, int bar,

sys/compat/linuxkpi/common/src/linux_pci.c

993

if (!lkpi_pci_bar_id_valid(bar))

sys/compat/linuxkpi/common/src/linux_pci.c

996

res = _lkpi_pci_iomap(pdev, bar, maxlen);

sys/dev/bnxt/bnxt_en/if_bnxt.c

4953

bnxt_map_bar(struct bnxt_softc *softc, struct bnxt_bar_info *bar, int bar_num, bool shareable)

sys/dev/bnxt/bnxt_en/if_bnxt.c

4957

if (bar->res != NULL) {

sys/dev/bnxt/bnxt_en/if_bnxt.c

4962

bar->rid = PCIR_BAR(bar_num);

sys/dev/bnxt/bnxt_en/if_bnxt.c

4967

if ((bar->res =

sys/dev/bnxt/bnxt_en/if_bnxt.c

4970

&bar->rid,

sys/dev/bnxt/bnxt_en/if_bnxt.c

4976

bar->tag = rman_get_bustag(bar->res);

sys/dev/bnxt/bnxt_en/if_bnxt.c

4977

bar->handle = rman_get_bushandle(bar->res);

sys/dev/bnxt/bnxt_en/if_bnxt.c

4978

bar->size = rman_get_size(bar->res);

sys/dev/bxe/bxe.c

13042

if (sc->bar[i].resource != NULL) {

sys/dev/bxe/bxe.c

13045

sc->bar[i].rid,

sys/dev/bxe/bxe.c

13046

sc->bar[i].resource);

sys/dev/bxe/bxe.c

13059

memset(sc->bar, 0, sizeof(sc->bar));

sys/dev/bxe/bxe.c

13069

sc->bar[i].rid = PCIR_BAR(i);

sys/dev/bxe/bxe.c

13076

if ((sc->bar[i].resource =

sys/dev/bxe/bxe.c

13079

&sc->bar[i].rid,

sys/dev/bxe/bxe.c

13084

sc->bar[i].tag = rman_get_bustag(sc->bar[i].resource);

sys/dev/bxe/bxe.c

13085

sc->bar[i].handle = rman_get_bushandle(sc->bar[i].resource);

sys/dev/bxe/bxe.c

13086

sc->bar[i].kva = (vm_offset_t)rman_get_virtual(sc->bar[i].resource);

sys/dev/bxe/bxe.c

13090

rman_get_start(sc->bar[i].resource),

sys/dev/bxe/bxe.c

13091

rman_get_end(sc->bar[i].resource),

sys/dev/bxe/bxe.c

13092

rman_get_size(sc->bar[i].resource),

sys/dev/bxe/bxe.c

13093

(uintmax_t)sc->bar[i].kva);

sys/dev/bxe/bxe.c

16527

bus_space_barrier(sc->bar[BAR0].tag, sc->bar[BAR0].handle, 0, 0,

sys/dev/bxe/bxe.c

16535

bus_space_barrier(sc->bar[BAR0].tag, sc->bar[BAR0].handle, 0, 0,

sys/dev/bxe/bxe.c

2349

bus_space_barrier(sc->bar[BAR0].tag, sc->bar[BAR0].handle, 0, 0,

sys/dev/bxe/bxe.c

5509

bus_space_barrier(sc->bar[BAR0].tag, sc->bar[BAR0].handle,

sys/dev/bxe/bxe.c

5513

bus_space_barrier(sc->bar[BAR2].tag, sc->bar[BAR2].handle,

sys/dev/bxe/bxe.h

1335

struct bxe_bar bar[MAX_BARS]; /* map BARs 0, 2, 4 */

sys/dev/bxe/bxe.h

1830

bus_space_write_1(sc->bar[BAR0].tag, \

sys/dev/bxe/bxe.h

1831

sc->bar[BAR0].handle, \

sys/dev/bxe/bxe.h

1835

bus_space_write_2(sc->bar[BAR0].tag, \

sys/dev/bxe/bxe.h

1836

sc->bar[BAR0].handle, \

sys/dev/bxe/bxe.h

1840

bus_space_write_4(sc->bar[BAR0].tag, \

sys/dev/bxe/bxe.h

1841

sc->bar[BAR0].handle, \

sys/dev/bxe/bxe.h

1845

bus_space_read_1(sc->bar[BAR0].tag, \

sys/dev/bxe/bxe.h

1846

sc->bar[BAR0].handle, \

sys/dev/bxe/bxe.h

1850

bus_space_read_2(sc->bar[BAR0].tag, \

sys/dev/bxe/bxe.h

1851

sc->bar[BAR0].handle, \

sys/dev/bxe/bxe.h

1855

bus_space_read_4(sc->bar[BAR0].tag, \

sys/dev/bxe/bxe.h

1856

sc->bar[BAR0].handle, \

sys/dev/bxe/bxe.h

1909

bus_space_write_4(sc->bar[BAR1].tag, sc->bar[BAR1].handle, \

sys/dev/bxe/bxe.h

2317

bus_space_barrier(sc->bar[0].tag, sc->bar[0].handle, 0, 0,

sys/dev/bxe/bxe.h

2344

bus_space_barrier(sc->bar[0].tag, sc->bar[0].handle, 0, 0,

sys/dev/bxe/bxe_debug.c

103

val = bus_space_read_2(sc->bar[BAR0].tag,

sys/dev/bxe/bxe_debug.c

104

sc->bar[BAR0].handle,

sys/dev/bxe/bxe_debug.c

120

val = bus_space_read_4(sc->bar[BAR0].tag,

sys/dev/bxe/bxe_debug.c

121

sc->bar[BAR0].handle,

sys/dev/bxe/bxe_debug.c

47

bus_space_write_1(sc->bar[BAR0].tag,

sys/dev/bxe/bxe_debug.c

48

sc->bar[BAR0].handle,

sys/dev/bxe/bxe_debug.c

61

bus_space_write_2(sc->bar[BAR0].tag,

sys/dev/bxe/bxe_debug.c

62

sc->bar[BAR0].handle,

sys/dev/bxe/bxe_debug.c

75

bus_space_write_4(sc->bar[BAR0].tag,

sys/dev/bxe/bxe_debug.c

76

sc->bar[BAR0].handle,

sys/dev/bxe/bxe_debug.c

86

val = bus_space_read_1(sc->bar[BAR0].tag,

sys/dev/bxe/bxe_debug.c

87

sc->bar[BAR0].handle,

sys/dev/cardbus/cardbus_cis.c

292

uint32_t bar;

sys/dev/cardbus/cardbus_cis.c

306

bar = reg & TPL_BAR_REG_ASI_MASK;

sys/dev/cardbus/cardbus_cis.c

307

if (bar == 0) {

sys/dev/cardbus/cardbus_cis.c

310

} else if (bar == 7) {

sys/dev/cardbus/cardbus_cis.c

316

bar = PCIR_BAR(bar - 1);

sys/dev/cardbus/cardbus_cis.c

320

dinfo->mprefetchable |= (1 << PCI_RID2BAR(bar));

sys/dev/cardbus/cardbus_cis.c

341

dinfo->mbelow1mb |= (1 << PCI_RID2BAR(bar));

sys/dev/cardbus/cardbus_cis.c

645

MAKETUPLE(BAR, bar),

sys/dev/dpaa/qman.c

234

uint32_t bar, bare;

sys/dev/dpaa/qman.c

244

bar = bus_read_4(sc->sc_rres, off + 4);

sys/dev/dpaa/qman.c

245

old_bar = (vm_paddr_t)bare << 32 | bar;

sys/dev/enic/enic.h

36

bus_space_write_8(res->bar.tag, res->bar.handle, \

sys/dev/enic/enic.h

37

res->bar.offset + (index), value)

sys/dev/enic/enic.h

39

bus_space_write_4(res->bar.tag, res->bar.handle, \

sys/dev/enic/enic.h

40

res->bar.offset + (index), value)

sys/dev/enic/enic.h

42

bus_space_write_region_4(res->bar.tag, res->bar.handle, \

sys/dev/enic/enic.h

43

res->bar.offset + (index), values, count);

sys/dev/enic/enic.h

46

bus_space_read_8(res->bar.tag, res->bar.handle, \

sys/dev/enic/enic.h

47

res->bar.offset + (index))

sys/dev/enic/enic.h

49

bus_space_read_4(res->bar.tag, res->bar.handle, \

sys/dev/enic/enic.h

50

res->bar.offset + (index))

sys/dev/enic/enic.h

57

struct enic_bar_info bar;

sys/dev/enic/if_enic.c

1586

enic_map_bar(struct enic_softc *softc, struct enic_bar_info *bar, int bar_num,

sys/dev/enic/if_enic.c

1591

if (bar->res != NULL) {

sys/dev/enic/if_enic.c

1596

bar->rid = PCIR_BAR(bar_num);

sys/dev/enic/if_enic.c

1601

if ((bar->res = bus_alloc_resource_any(softc->dev,

sys/dev/enic/if_enic.c

1602

SYS_RES_MEMORY, &bar->rid, flag)) == NULL) {

sys/dev/enic/if_enic.c

1607

bar->tag = rman_get_bustag(bar->res);

sys/dev/enic/if_enic.c

1608

bar->handle = rman_get_bushandle(bar->res);

sys/dev/enic/if_enic.c

1609

bar->size = rman_get_size(bar->res);

sys/dev/enic/vnic_dev.c

108

bcopy(&softc->mem, &vdev->res[type].bar, sizeof(softc->mem));

sys/dev/enic/vnic_dev.c

109

vdev->res[type].bar.offset = bar_offset;

sys/dev/enic/vnic_dev.c

130

if (!vdev->res[type].bar.tag)

sys/dev/enic/vnic_dev.c

141

res->bar.offset +=

sys/dev/enic/vnic_dev.c

144

res->bar.offset += 0;

sys/dev/enic/vnic_dev.c

228

ENIC_BUS_READ_REGION_4(devcmd, bar, DEVCMD_ARGS(0), (void *)&vdev->args[0], VNIC_DEVCMD_NARGS * 2);

sys/dev/enic/vnic_dev.c

37

struct vnic_dev_bar *bar, unsigned int num_bars)

sys/dev/enic/vnic_dev.c

84

u8 bar_num = r->bar;

sys/dev/enic/vnic_resource.h

62

u8 bar;

sys/dev/ice/ice_lib.c

278

ice_map_bar(device_t dev, struct ice_bar_info *bar, int bar_num)

sys/dev/ice/ice_lib.c

280

if (bar->res != NULL) {

sys/dev/ice/ice_lib.c

285

bar->rid = PCIR_BAR(bar_num);

sys/dev/ice/ice_lib.c

286

bar->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &bar->rid,

sys/dev/ice/ice_lib.c

288

if (!bar->res) {

sys/dev/ice/ice_lib.c

293

bar->tag = rman_get_bustag(bar->res);

sys/dev/ice/ice_lib.c

294

bar->handle = rman_get_bushandle(bar->res);

sys/dev/ice/ice_lib.c

295

bar->size = rman_get_size(bar->res);

sys/dev/ice/ice_lib.c

308

ice_free_bar(device_t dev, struct ice_bar_info *bar)

sys/dev/ice/ice_lib.c

310

if (bar->res != NULL)

sys/dev/ice/ice_lib.c

311

bus_release_resource(dev, SYS_RES_MEMORY, bar->rid, bar->res);

sys/dev/ice/ice_lib.c

312

bar->res = NULL;

sys/dev/ice/ice_lib.h

932

int ice_map_bar(device_t dev, struct ice_bar_info *bar, int bar_num);

sys/dev/ice/ice_lib.h

933

void ice_free_bar(device_t dev, struct ice_bar_info *bar);

sys/dev/ice/if_ice_iflib.c

1430

int bar, queues, vectors, requested;

sys/dev/ice/if_ice_iflib.c

1435

bar = scctx->isc_msix_bar;

sys/dev/ice/if_ice_iflib.c

1436

sc->msix_table = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &bar, RF_ACTIVE);

sys/dev/isci/isci.c

585

uint32_t bar = (uint32_t)(((POINTER_UINT)address & 0xF0000000) >> 28);

sys/dev/isci/isci.c

588

bus_space_write_4(isci->pci_bar[bar].bus_tag,

sys/dev/isci/isci.c

589

isci->pci_bar[bar].bus_handle, offset, write_value);

sys/dev/isci/isci.c

612

uint32_t bar = (uint32_t)(((POINTER_UINT)address & 0xF0000000) >> 28);

sys/dev/isci/isci.c

615

return (bus_space_read_4(isci->pci_bar[bar].bus_tag,

sys/dev/isci/isci.c

616

isci->pci_bar[bar].bus_handle, offset));

sys/dev/mana/gdma_main.c

1514

mana_gd_alloc_bar(device_t dev, int bar)

sys/dev/mana/gdma_main.c

1520

if (bar < 0 || bar > PCIR_MAX_BAR_0)

sys/dev/mana/gdma_main.c

1523

pm = pci_find_bar(dev, PCIR_BAR(bar));

sys/dev/mana/gdma_main.c

1534

rid = PCIR_BAR(bar);

sys/dev/mana/gdma_main.c

1540

bar, rid, res->r_bustag, res->r_bushandle);

sys/dev/mlx4/device.h

887

u8 bar;

sys/dev/mlx4/mlx4_core/mlx4_main.c

1884

params->bar = priv->fw.clock_bar;

sys/dev/mlx4/mlx4_ib/mlx4_ib_main.c

1099

params.bar) +

sys/dev/ntb/ntb_hw/ntb_hw_amd.c

1109

print_map_success(struct amd_ntb_softc *ntb, struct amd_ntb_pci_bar_info *bar,

sys/dev/ntb/ntb_hw/ntb_hw_amd.c

1113

PCI_RID2BAR(bar->pci_resource_id), bar->vbase,

sys/dev/ntb/ntb_hw/ntb_hw_amd.c

1114

(char *)bar->vbase + bar->size - 1, (uintmax_t)bar->pbase,

sys/dev/ntb/ntb_hw/ntb_hw_amd.c

1115

(uintmax_t)(bar->pbase + bar->size - 1), (uintmax_t)bar->size, kind);

sys/dev/ntb/ntb_hw/ntb_hw_amd.c

1119

save_bar_parameters(struct amd_ntb_pci_bar_info *bar)

sys/dev/ntb/ntb_hw/ntb_hw_amd.c

1121

bar->pci_bus_tag = rman_get_bustag(bar->pci_resource);

sys/dev/ntb/ntb_hw/ntb_hw_amd.c

1122

bar->pci_bus_handle = rman_get_bushandle(bar->pci_resource);

sys/dev/ntb/ntb_hw/ntb_hw_amd.c

1123

bar->pbase = rman_get_start(bar->pci_resource);

sys/dev/ntb/ntb_hw/ntb_hw_amd.c

1124

bar->size = rman_get_size(bar->pci_resource);

sys/dev/ntb/ntb_hw/ntb_hw_amd.c

1125

bar->vbase = rman_get_virtual(bar->pci_resource);

sys/dev/ntb/ntb_hw/ntb_hw_amd.c

1126

bar->map_mode = VM_MEMATTR_UNCACHEABLE;

sys/dev/ntb/ntb_hw/ntb_hw_amd.c

1130

map_bar(struct amd_ntb_softc *ntb, struct amd_ntb_pci_bar_info *bar)

sys/dev/ntb/ntb_hw/ntb_hw_amd.c

1132

bar->pci_resource = bus_alloc_resource_any(ntb->device, SYS_RES_MEMORY,

sys/dev/ntb/ntb_hw/ntb_hw_amd.c

1133

&bar->pci_resource_id, RF_ACTIVE);

sys/dev/ntb/ntb_hw/ntb_hw_amd.c

1134

if (bar->pci_resource == NULL)

sys/dev/ntb/ntb_hw/ntb_hw_amd.c

1137

save_bar_parameters(bar);

sys/dev/ntb/ntb_hw/ntb_hw_amd.c

1138

print_map_success(ntb, bar, "mmr");

sys/dev/ntb/ntb_hw/ntb_hw_amd.h

68

#define amd_ntb_bar_read(SIZE, bar, offset) \

sys/dev/ntb/ntb_hw/ntb_hw_amd.h

69

bus_space_read_ ## SIZE (ntb->bar_info[(bar)].pci_bus_tag, \

sys/dev/ntb/ntb_hw/ntb_hw_amd.h

70

ntb->bar_info[(bar)].pci_bus_handle, (offset))

sys/dev/ntb/ntb_hw/ntb_hw_amd.h

71

#define amd_ntb_bar_write(SIZE, bar, offset, val) \

sys/dev/ntb/ntb_hw/ntb_hw_amd.h

72

bus_space_write_ ## SIZE (ntb->bar_info[(bar)].pci_bus_tag, \

sys/dev/ntb/ntb_hw/ntb_hw_amd.h

73

ntb->bar_info[(bar)].pci_bus_handle, (offset), (val))

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

1005

bar->pci_resource = bus_alloc_resource_any(ntb->device, SYS_RES_MEMORY,

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

1006

&bar->pci_resource_id, RF_ACTIVE);

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

1008

if (bar->pci_resource == NULL)

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

1011

save_bar_parameters(bar);

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

1029

if (bar->pci_resource_id == PCIR_BAR(2))

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

1037

bar->pci_resource, bar->pbase,

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

1038

bar->pbase + (1ul << bar_size_bits) - 1);

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

1045

save_bar_parameters(bar);

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

1048

bar->map_mode = VM_MEMATTR_UNCACHEABLE;

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

1049

print_map_success(ntb, bar, "mw");

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

1056

if (mapmode == bar->map_mode)

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

1059

rc = pmap_change_attr(bar->vbase, bar->size, mapmode);

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

1061

bar->map_mode = mapmode;

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

1065

PCI_RID2BAR(bar->pci_resource_id), bar->vbase,

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

1066

(char *)bar->vbase + bar->size - 1,

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

1067

(uintmax_t)bar->pbase,

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

1068

(uintmax_t)(bar->pbase + bar->size - 1),

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

1074

PCI_RID2BAR(bar->pci_resource_id), bar->vbase,

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

1075

(char *)bar->vbase + bar->size - 1,

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

1076

(uintmax_t)bar->pbase,

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

1077

(uintmax_t)(bar->pbase + bar->size - 1),

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

1086

struct ntb_pci_bar_info *bar;

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

1096

bar = &ntb->bar_info[i];

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

1097

if (bar->pci_resource != NULL)

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

1099

bar->pci_resource_id, bar->pci_resource);

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

2153

struct ntb_pci_bar_info *bar;

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

2159

bar = &ntb->bar_info[idx];

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

2160

bar_sz = pci_read_config(ntb->device, bar->psz_off, 1);

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

2167

pci_write_config(ntb->device, bar->ssz_off, bar_sz, 1);

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

2168

bar_sz = pci_read_config(ntb->device, bar->ssz_off, 1);

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

2209

struct ntb_pci_bar_info *bar;

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

2211

bar = &ntb->bar_info[idx];

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

2213

intel_ntb_reg_write(4, bar->pbarxlat_off, base_addr);

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

2214

base_addr = intel_ntb_reg_read(4, bar->pbarxlat_off);

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

2216

intel_ntb_reg_write(8, bar->pbarxlat_off, base_addr);

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

2217

base_addr = intel_ntb_reg_read(8, bar->pbarxlat_off);

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

295

#define intel_ntb_bar_read(SIZE, bar, offset) \

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

296

bus_space_read_ ## SIZE (ntb->bar_info[(bar)].pci_bus_tag, \

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

297

ntb->bar_info[(bar)].pci_bus_handle, (offset))

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

298

#define intel_ntb_bar_write(SIZE, bar, offset, val) \

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

299

bus_space_write_ ## SIZE (ntb->bar_info[(bar)].pci_bus_tag, \

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

300

ntb->bar_info[(bar)].pci_bus_handle, (offset), (val))

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

336

static int map_mmr_bar(struct ntb_softc *ntb, struct ntb_pci_bar_info *bar);

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

338

struct ntb_pci_bar_info *bar);

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

3556

struct ntb_pci_bar_info *bar;

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

3566

bar = &ntb->bar_info[bar_num];

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

3580

*base = bar->pbase + bar_b2b_off;

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

3582

*vbase = bar->vbase + bar_b2b_off;

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

3584

*size = bar->size - bar_b2b_off;

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

3586

*align = bar->size;

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

3598

struct ntb_pci_bar_info *bar;

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

3609

bar = &ntb->bar_info[bar_num];

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

3611

bar_size = bar->size;

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

3700

struct ntb_pci_bar_info *bar;

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

3706

bar = &ntb->bar_info[intel_ntb_mw_to_bar(ntb, idx)];

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

3707

*mode = bar->map_mode;

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

3726

struct ntb_pci_bar_info *bar;

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

3729

bar = &ntb->bar_info[intel_ntb_mw_to_bar(ntb, idx)];

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

3730

if (bar->map_mode == mode)

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

3733

rc = pmap_change_attr(bar->vbase, bar->size, mode);

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

3735

bar->map_mode = mode;

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

3791

struct ntb_pci_bar_info *bar;

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

3797

bar = &ntb->bar_info[NTB_CONFIG_BAR];

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

3803

bar = &ntb->bar_info[intel_ntb_mw_to_bar(ntb, ntb->b2b_mw_idx)];

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

3806

KASSERT(bar->pci_bus_tag != X86_BUS_SPACE_IO, ("uh oh"));

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

3809

*db_addr = ((uint64_t)bar->pci_bus_handle + regoff);

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

3853

save_bar_parameters(struct ntb_pci_bar_info *bar)

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

3856

bar->pci_bus_tag = rman_get_bustag(bar->pci_resource);

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

3857

bar->pci_bus_handle = rman_get_bushandle(bar->pci_resource);

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

3858

bar->pbase = rman_get_start(bar->pci_resource);

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

3859

bar->size = rman_get_size(bar->pci_resource);

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

3860

bar->vbase = rman_get_virtual(bar->pci_resource);

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

390

static void save_bar_parameters(struct ntb_pci_bar_info *bar);

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

830

bar_is_64bit(struct ntb_softc *ntb, enum ntb_bar bar)

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

833

KASSERT(bar < NTB_MAX_BARS, ("bogus bar"));

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

834

return (bar < NTB_B2B_BAR_2 || !HAS_FEATURE(ntb, NTB_SPLIT_BAR));

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

838

bar_get_xlat_params(struct ntb_softc *ntb, enum ntb_bar bar, uint32_t *base,

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

843

switch (bar) {

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

860

KASSERT(bar >= NTB_B2B_BAR_1 && bar < NTB_MAX_BARS,

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

877

struct ntb_pci_bar_info *bar;

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

880

bar = &ntb->bar_info[NTB_CONFIG_BAR];

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

881

bar->pci_resource_id = PCIR_BAR(0);

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

882

rc = map_mmr_bar(ntb, bar);

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

895

bar->size, 1, bar->size, 0, NULL, NULL, &ntb->bar0_dma_tag)) {

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

904

bar->pbase, bar->size, 0)) {

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

909

bar = &ntb->bar_info[NTB_B2B_BAR_1];

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

910

bar->pci_resource_id = PCIR_BAR(2);

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

911

rc = map_memory_window_bar(ntb, bar);

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

915

bar->psz_off = XEON_GEN3_INT_REG_IMBAR1SZ;

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

916

bar->ssz_off = XEON_GEN3_INT_REG_EMBAR1SZ;

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

917

bar->pbarxlat_off = XEON_GEN3_REG_EMBAR1XBASE;

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

919

bar->psz_off = XEON_GEN4_CFG_REG_IMBAR1SZ;

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

920

bar->ssz_off = XEON_GEN4_CFG_REG_EMBAR1SZ;

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

921

bar->pbarxlat_off = XEON_GEN4_REG_EXT_BAR1BASE;

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

923

bar->psz_off = XEON_PBAR23SZ_OFFSET;

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

924

bar->ssz_off = XEON_SBAR23SZ_OFFSET;

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

925

bar->pbarxlat_off = XEON_PBAR2XLAT_OFFSET;

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

928

bar = &ntb->bar_info[NTB_B2B_BAR_2];

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

929

bar->pci_resource_id = PCIR_BAR(4);

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

930

rc = map_memory_window_bar(ntb, bar);

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

934

bar->psz_off = XEON_GEN3_INT_REG_IMBAR2SZ;

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

935

bar->ssz_off = XEON_GEN3_INT_REG_EMBAR2SZ;

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

936

bar->pbarxlat_off = XEON_GEN3_REG_EMBAR2XBASE;

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

938

bar->psz_off = XEON_GEN4_CFG_REG_IMBAR2SZ;

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

939

bar->ssz_off = XEON_GEN4_CFG_REG_EMBAR2SZ;

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

940

bar->pbarxlat_off = XEON_GEN4_REG_EXT_BAR2BASE;

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

942

bar->psz_off = XEON_PBAR4SZ_OFFSET;

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

943

bar->ssz_off = XEON_SBAR4SZ_OFFSET;

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

944

bar->pbarxlat_off = XEON_PBAR4XLAT_OFFSET;

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

956

bar = &ntb->bar_info[NTB_B2B_BAR_3];

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

957

bar->pci_resource_id = PCIR_BAR(5);

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

958

rc = map_memory_window_bar(ntb, bar);

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

959

bar->psz_off = XEON_PBAR5SZ_OFFSET;

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

960

bar->ssz_off = XEON_SBAR5SZ_OFFSET;

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

961

bar->pbarxlat_off = XEON_PBAR5XLAT_OFFSET;

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

971

print_map_success(struct ntb_softc *ntb, struct ntb_pci_bar_info *bar,

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

977

PCI_RID2BAR(bar->pci_resource_id), bar->vbase,

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

978

(char *)bar->vbase + bar->size - 1,

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

979

(uintmax_t)bar->pbase, (uintmax_t)(bar->pbase + bar->size - 1),

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

980

(uintmax_t)bar->size, kind);

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

984

map_mmr_bar(struct ntb_softc *ntb, struct ntb_pci_bar_info *bar)

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

987

bar->pci_resource = bus_alloc_resource_any(ntb->device, SYS_RES_MEMORY,

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

988

&bar->pci_resource_id, RF_ACTIVE);

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

989

if (bar->pci_resource == NULL)

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

992

save_bar_parameters(bar);

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

993

bar->map_mode = VM_MEMATTR_UNCACHEABLE;

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

994

print_map_success(ntb, bar, "mmr");

sys/dev/ntb/ntb_hw/ntb_hw_intel.c

999

map_memory_window_bar(struct ntb_softc *ntb, struct ntb_pci_bar_info *bar)

sys/dev/ocs_fc/ocs_ioctl.c

294

if (req->bar >= PCI_MAX_BAR) {

sys/dev/ocs_fc/ocs_ioctl.c

295

device_printf(ocs->dev, "Error: bar %d out of range\n", req->bar);

sys/dev/ocs_fc/ocs_ioctl.c

298

if (ocs->reg[req->bar].res == NULL) {

sys/dev/ocs_fc/ocs_ioctl.c

299

device_printf(ocs->dev, "Error: bar %d not defined\n", req->bar);

sys/dev/ocs_fc/ocs_ioctl.c

330

req->data = ocs_reg_read8(ocs, req->bar, req->offset);

sys/dev/ocs_fc/ocs_ioctl.c

333

req->data = ocs_reg_read16(ocs, req->bar, req->offset);

sys/dev/ocs_fc/ocs_ioctl.c

336

req->data = ocs_reg_read32(ocs, req->bar, req->offset);

sys/dev/ocs_fc/ocs_ioctl.c

339

ocs_reg_write8(ocs, req->bar, req->offset, req->data);

sys/dev/ocs_fc/ocs_ioctl.c

342

ocs_reg_write16(ocs, req->bar, req->offset, req->data);

sys/dev/ocs_fc/ocs_ioctl.c

345

ocs_reg_write32(ocs, req->bar, req->offset, req->data);

sys/dev/ocs_fc/ocs_ioctl.h

217

uint32_t bar; /*<< BAR value to use */

sys/dev/pci/isa_pci.c

172

int bar;

sys/dev/pci/isa_pci.c

185

bar = PCI_RID2BAR(rid);

sys/dev/pci/isa_pci.c

186

if (bar < 0 || bar > PCIR_MAX_BAR_0)

sys/dev/pci/isa_pci.c

189

if (sc->isab_pci_res[bar].ip_res == NULL)

sys/dev/pci/isa_pci.c

190

sc->isab_pci_res[bar].ip_res = bus_alloc_resource(dev, type,

sys/dev/pci/isa_pci.c

192

if (sc->isab_pci_res[bar].ip_res != NULL)

sys/dev/pci/isa_pci.c

193

sc->isab_pci_res[bar].ip_refs++;

sys/dev/pci/isa_pci.c

194

return (sc->isab_pci_res[bar].ip_res);

sys/dev/pci/isa_pci.c

205

int bar, error;

sys/dev/pci/isa_pci.c

217

bar = PCI_RID2BAR(rman_get_rid(r));

sys/dev/pci/isa_pci.c

218

if (bar < 0 || bar > PCIR_MAX_BAR_0)

sys/dev/pci/isa_pci.c

221

if (sc->isab_pci_res[bar].ip_res == NULL)

sys/dev/pci/isa_pci.c

223

KASSERT(sc->isab_pci_res[bar].ip_res == r,

sys/dev/pci/isa_pci.c

225

if (sc->isab_pci_res[bar].ip_refs > 1) {

sys/dev/pci/isa_pci.c

226

sc->isab_pci_res[bar].ip_refs--;

sys/dev/pci/isa_pci.c

229

KASSERT(sc->isab_pci_res[bar].ip_refs > 0,

sys/dev/pci/isa_pci.c

233

sc->isab_pci_res[bar].ip_res = NULL;

sys/dev/pci/isa_pci.c

234

sc->isab_pci_res[bar].ip_refs = 0;

sys/dev/pci/pci_iov.c

338

pci_iov_alloc_bar(struct pci_devinfo *dinfo, int bar, pci_addr_t bar_shift)

sys/dev/pci/pci_iov.c

350

rid = iov->iov_pos + PCIR_SRIOV_BAR(bar);

sys/dev/pci/pci_iov.c

359

iov->iov_bar[bar].res = res;

sys/dev/pci/pci_iov.c

360

iov->iov_bar[bar].bar_size = bar_size;

sys/dev/pci/pci_iov.c

361

iov->iov_bar[bar].bar_shift = bar_shift;

sys/dev/pci/pci_iov.c

371

struct pci_iov_bar *bar;

sys/dev/pci/pci_iov.c

376

bar = &iov->iov_bar[i];

sys/dev/pci/pci_iov.c

377

if (bar->res != NULL) {

sys/dev/pci/pci_iov.c

378

bar_start = rman_get_start(bar->res) +

sys/dev/pci/pci_iov.c

379

dinfo->cfg.vf.index * bar->bar_size;

sys/dev/pci/pci_iov.c

382

bar->bar_shift);

sys/dev/pci/pci_iov.c

544

pci_iov_alloc_bar_ea(struct pci_devinfo *dinfo, int bar)

sys/dev/pci/pci_iov.c

556

iov->iov_pos + PCIR_SRIOV_BAR(bar));

sys/dev/pci/pci_iov.c

559

iov->iov_pos + PCIR_SRIOV_BAR(bar));

sys/dev/pci/pci_iov.c

564

iov->iov_bar[bar].res = res;

sys/dev/pci/pci_iov.c

565

iov->iov_bar[bar].bar_size = rman_get_size(res) / iov->iov_num_vfs;

sys/dev/pci/pci_iov.c

566

iov->iov_bar[bar].bar_shift = pci_mapsize(iov->iov_bar[bar].bar_size);

sys/dev/pci/pci_user.c

1031

int bar, error, type;

sys/dev/pci/pci_user.c

1037

bar = PCIR_BAR(pbi->pbi_bar);

sys/dev/pci/pci_user.c

1038

pm = pci_find_bar(pcidev, bar);

sys/dev/pci/pci_user.c

1056

res = bus_alloc_resource_any(pcidev, type, &bar, RF_ACTIVE);

sys/dev/pci/pci_user.c

1106

bus_release_resource(pcidev, type, bar, res);

sys/dev/pci/vga_pci.c

414

int bar;

sys/dev/pci/vga_pci.c

418

bar = PCI_RID2BAR(rid);

sys/dev/pci/vga_pci.c

419

if (bar >= 0 && bar <= PCIR_MAX_BAR_0)

sys/dev/pci/vga_pci.c

420

return (&sc->vga_bars[bar]);

sys/dev/pms/RefTisa/sallsdk/spc/saioctlcmd.c

3701

bit32 bar = 0;

sys/dev/pms/RefTisa/sallsdk/spc/saioctlcmd.c

3726

bar = PCIBAR1;

sys/dev/pms/RefTisa/sallsdk/spc/saioctlcmd.c

3730

bar = PCIBAR2;

sys/dev/pms/RefTisa/sallsdk/spc/saioctlcmd.c

3754

value = ossaHwRegReadExt(agRoot, bar, (workOffset + offset) & 0x0000FFFF);

sys/dev/pms/RefTisa/sallsdk/spc/saioctlcmd.c

3763

value = ossaHwRegReadExt(agRoot, bar, (workOffset + offset) & 0x0000FFFF);

sys/dev/pms/freebsd/driver/common/lxutil.c

154

U32 bar;

sys/dev/pms/freebsd/driver/common/lxutil.c

156

for (bar = 0; bar < PCI_NUMBER_BARS; bar++) {

sys/dev/pms/freebsd/driver/common/lxutil.c

157

if ((bar==1) || (bar==3))

sys/dev/pms/freebsd/driver/common/lxutil.c

159

thisCardInst->pciMemBaseRIDSpc[lBar] = PCIR_BAR(bar);

sys/dev/pms/freebsd/driver/common/lxutil.c

178

"VirtAddr=%lx, len=%d\n", bar, lBar,

sys/dev/pms/freebsd/driver/common/lxutil.c

587

U32 bar = 0;

sys/dev/pms/freebsd/driver/common/lxutil.c

593

for (bar=0; bar < PCI_NUMBER_BARS; bar++) { // clean up PCI resource

sys/dev/pms/freebsd/driver/common/lxutil.c

594

tmpRid = pCardInfo->pciMemBaseRIDSpc[bar];

sys/dev/pms/freebsd/driver/common/lxutil.c

595

tmpRsc = pCardInfo->pciMemBaseRscSpc[bar];

sys/dev/proto/proto_bus_pci.c

79

int bar, rid, type;

sys/dev/proto/proto_bus_pci.c

86

for (bar = 0; bar < PCIR_MAX_BAR_0; bar++) {

sys/dev/proto/proto_bus_pci.c

87

rid = PCIR_BAR(bar);

sys/dev/proto/proto_bus_pci.c

98

bar++;

sys/dev/puc/puc.c

100

bar->b_type = SYS_RES_IOPORT;

sys/dev/puc/puc.c

101

bar->b_res = bus_alloc_resource_any(sc->sc_dev, bar->b_type,

sys/dev/puc/puc.c

102

&bar->b_rid, RF_ACTIVE);

sys/dev/puc/puc.c

103

if (bar->b_res == NULL) {

sys/dev/puc/puc.c

104

bar->b_rid = rid;

sys/dev/puc/puc.c

105

bar->b_type = SYS_RES_MEMORY;

sys/dev/puc/puc.c

106

bar->b_res = bus_alloc_resource_any(sc->sc_dev, bar->b_type,

sys/dev/puc/puc.c

107

&bar->b_rid, RF_ACTIVE);

sys/dev/puc/puc.c

108

if (bar->b_res == NULL) {

sys/dev/puc/puc.c

109

bar->b_rid = -1;

sys/dev/puc/puc.c

115

rm = (bar->b_type == SYS_RES_IOPORT) ? &sc->sc_ioport : &sc->sc_iomem;

sys/dev/puc/puc.c

116

start = rman_get_start(bar->b_res);

sys/dev/puc/puc.c

117

end = rman_get_end(bar->b_res);

sys/dev/puc/puc.c

120

bus_release_resource(sc->sc_dev, bar->b_type, bar->b_rid,

sys/dev/puc/puc.c

121

bar->b_res);

sys/dev/puc/puc.c

122

bar->b_res = NULL;

sys/dev/puc/puc.c

123

bar->b_rid = -1;

sys/dev/puc/puc.c

124

bar = NULL;

sys/dev/puc/puc.c

127

return (bar);

sys/dev/puc/puc.c

213

struct puc_bar *bar;

sys/dev/puc/puc.c

281

bar = puc_get_bar(sc, res);

sys/dev/puc/puc.c

282

if (bar == NULL) {

sys/dev/puc/puc.c

286

port->p_bar = bar;

sys/dev/puc/puc.c

287

start = rman_get_start(bar->b_res);

sys/dev/puc/puc.c

296

rm = (bar->b_type == SYS_RES_IOPORT)

sys/dev/puc/puc.c

301

bsh = rman_get_bushandle(bar->b_res);

sys/dev/puc/puc.c

302

bst = rman_get_bustag(bar->b_res);

sys/dev/puc/puc.c

385

bar = &sc->sc_bar[idx];

sys/dev/puc/puc.c

386

if (bar->b_res != NULL)

sys/dev/puc/puc.c

387

bus_release_resource(sc->sc_dev, bar->b_type,

sys/dev/puc/puc.c

388

bar->b_rid, bar->b_res);

sys/dev/puc/puc.c

403

struct puc_bar *bar;

sys/dev/puc/puc.c

430

bar = &sc->sc_bar[idx];

sys/dev/puc/puc.c

431

if (bar->b_res != NULL)

sys/dev/puc/puc.c

432

bus_release_resource(sc->sc_dev, bar->b_type,

sys/dev/puc/puc.c

433

bar->b_rid, bar->b_res);

sys/dev/puc/puc.c

79

struct puc_bar *bar;

sys/dev/puc/puc.c

96

bar = puc_get_bar(sc, -1);

sys/dev/puc/puc.c

97

if (bar == NULL)

sys/dev/puc/puc.c

99

bar->b_rid = rid;

sys/dev/puc/pucdata.c

1735

struct puc_bar *bar;

sys/dev/puc/pucdata.c

1790

bar = puc_get_bar(sc, cfg->rid + i * cfg->d_rid);

sys/dev/puc/pucdata.c

1791

if (bar == NULL) {

sys/dev/puc/pucdata.c

1807

bus_write_1(bar->b_res, REG_SPR, REG_ACR);

sys/dev/puc/pucdata.c

1808

bus_write_1(bar->b_res, REG_ICR, acr);

sys/dev/puc/pucdata.c

1908

struct puc_bar *bar;

sys/dev/puc/pucdata.c

1917

bar = puc_get_bar(sc, cfg->rid);

sys/dev/puc/pucdata.c

1918

if (bar == NULL)

sys/dev/puc/pucdata.c

1920

bus_write_1(bar->b_res, REG_LCR, LCR_DLAB);

sys/dev/puc/pucdata.c

1921

bus_write_1(bar->b_res, REG_SPR, 0);

sys/dev/puc/pucdata.c

1922

v0 = bus_read_1(bar->b_res, REG_SPR);

sys/dev/puc/pucdata.c

1923

bus_write_1(bar->b_res, REG_SPR, 0x80 + -cfg->clock);

sys/dev/puc/pucdata.c

1924

v1 = bus_read_1(bar->b_res, REG_SPR);

sys/dev/puc/pucdata.c

1925

bus_write_1(bar->b_res, REG_LCR, 0);

sys/dev/puc/pucdata.c

2001

struct puc_bar *bar;

sys/dev/puc/pucdata.c

2007

bar = puc_get_bar(sc, cfg->rid);

sys/dev/puc/pucdata.c

2008

if (bar == NULL)

sys/dev/puc/pucdata.c

2012

bus_write_1(bar->b_res, 0x250, 0x89);

sys/dev/puc/pucdata.c

2013

bus_write_1(bar->b_res, 0x3f0, 0x87);

sys/dev/puc/pucdata.c

2014

bus_write_1(bar->b_res, 0x3f0, 0x87);

sys/dev/puc/pucdata.c

2018

bus_write_1(bar->b_res, efir, 0x09);

sys/dev/puc/pucdata.c

2019

v = bus_read_1(bar->b_res, efir + 1);

sys/dev/puc/pucdata.c

2022

bus_write_1(bar->b_res, efir, 0x16);

sys/dev/puc/pucdata.c

2023

v = bus_read_1(bar->b_res, efir + 1);

sys/dev/puc/pucdata.c

2024

bus_write_1(bar->b_res, efir, 0x16);

sys/dev/puc/pucdata.c

2025

bus_write_1(bar->b_res, efir + 1, v | 0x04);

sys/dev/puc/pucdata.c

2026

bus_write_1(bar->b_res, efir, 0x16);

sys/dev/puc/pucdata.c

2027

bus_write_1(bar->b_res, efir + 1, v & ~0x04);

sys/dev/puc/pucdata.c

2029

bus_write_1(bar->b_res, efir, 0x23);

sys/dev/puc/pucdata.c

2030

bus_write_1(bar->b_res, efir + 1, (ofs + 0x78) >> 2);

sys/dev/puc/pucdata.c

2031

bus_write_1(bar->b_res, efir, 0x24);

sys/dev/puc/pucdata.c

2032

bus_write_1(bar->b_res, efir + 1, (ofs + 0xf8) >> 2);

sys/dev/puc/pucdata.c

2033

bus_write_1(bar->b_res, efir, 0x25);

sys/dev/puc/pucdata.c

2034

bus_write_1(bar->b_res, efir + 1, (ofs + 0xe8) >> 2);

sys/dev/puc/pucdata.c

2035

bus_write_1(bar->b_res, efir, 0x17);

sys/dev/puc/pucdata.c

2036

bus_write_1(bar->b_res, efir + 1, 0x03);

sys/dev/puc/pucdata.c

2037

bus_write_1(bar->b_res, efir, 0x28);

sys/dev/puc/pucdata.c

2038

bus_write_1(bar->b_res, efir + 1, 0x43);

sys/dev/puc/pucdata.c

2041

bus_write_1(bar->b_res, 0x250, 0xaa);

sys/dev/puc/pucdata.c

2042

bus_write_1(bar->b_res, 0x3f0, 0xaa);

sys/dev/puc/pucdata.c

2206

struct puc_bar *bar;

sys/dev/puc/pucdata.c

2215

bar = puc_get_bar(sc, cfg->rid);

sys/dev/puc/pucdata.c

2216

if (bar == NULL)

sys/dev/puc/pucdata.c

2219

value = bus_read_1(bar->b_res, 0x1000 + (idx << 9) +

sys/dev/puc/pucdata.c

2221

bus_write_1(bar->b_res, 0x1000 + (idx << 9) + 0x92,

sys/dev/puc/pucdata.c

2250

bar = puc_get_bar(sc, cfg->rid);

sys/dev/puc/pucdata.c

2251

if (bar == NULL)

sys/dev/puc/pucdata.c

2254

value = bus_read_1(bar->b_res, 0x04);

sys/dev/puc/pucdata.c

2320

struct puc_bar *bar;

sys/dev/puc/pucdata.c

2324

bar = puc_get_bar(sc, 0x14);

sys/dev/puc/pucdata.c

2325

if (bar == NULL)

sys/dev/puc/pucdata.c

2333

bus_write_1(bar->b_res, /* OPT_IMRREG0 */ 0xc, 0xff);

sys/dev/qat/include/common/adf_uio_control.h

30

struct adf_bar *bar;

sys/dev/qat/qat_common/adf_freebsd_uio.c

172

accel->bar->base_addr + offset +

sys/dev/qat/qat_common/adf_freebsd_uio.c

329

if (!accel->bar)

sys/dev/qat/qat_common/adf_freebsd_uio.c

332

bundle->csr_addr = (void *)accel->bar->virt_addr;

sys/dev/qat/qat_common/adf_freebsd_uio.c

386

accel->bar = accel_dev->accel_pci_dev.pci_bars +

sys/dev/qat/qat_common/adf_freebsd_uio_cleanup.c

126

csr_base = accel->bar->virt_addr;

sys/dev/qat/qat_common/adf_freebsd_uio_cleanup.c

267

struct resource *csr_base = accel->bar->virt_addr;

sys/dev/qat/qat_hw/qat_200xx/adf_drv.c

195

struct adf_bar *bar;

sys/dev/qat/qat_hw/qat_200xx/adf_drv.c

205

bar = &accel_pci_dev->pci_bars[i++];

sys/dev/qat/qat_hw/qat_200xx/adf_drv.c

206

bar->virt_addr = bus_alloc_resource_any(dev,

sys/dev/qat/qat_hw/qat_200xx/adf_drv.c

210

if (!bar->virt_addr) {

sys/dev/qat/qat_hw/qat_200xx/adf_drv.c

215

bar->base_addr = rman_get_start(bar->virt_addr);

sys/dev/qat/qat_hw/qat_200xx/adf_drv.c

216

bar->size = rman_get_size(bar->virt_addr);

sys/dev/qat/qat_hw/qat_200xx/adf_drv.c

56

struct adf_bar *bar = &accel_pci_dev->pci_bars[i];

sys/dev/qat/qat_hw/qat_200xx/adf_drv.c

58

if (bar->virt_addr)

sys/dev/qat/qat_hw/qat_200xx/adf_drv.c

61

bar->virt_addr);

sys/dev/qat/qat_hw/qat_4xxx/adf_drv.c

128

struct adf_bar *bar = &accel_pci_dev->pci_bars[i];

sys/dev/qat/qat_hw/qat_4xxx/adf_drv.c

130

if (bar->virt_addr)

sys/dev/qat/qat_hw/qat_4xxx/adf_drv.c

133

bar->virt_addr);

sys/dev/qat/qat_hw/qat_4xxx/adf_drv.c

264

struct adf_bar *bar;

sys/dev/qat/qat_hw/qat_4xxx/adf_drv.c

267

bar = &accel_pci_dev->pci_bars[bar_nr / 2];

sys/dev/qat/qat_hw/qat_4xxx/adf_drv.c

269

bar->virt_addr = bus_alloc_resource_any(dev,

sys/dev/qat/qat_hw/qat_4xxx/adf_drv.c

273

if (!bar->virt_addr) {

sys/dev/qat/qat_hw/qat_4xxx/adf_drv.c

278

bar->base_addr = rman_get_start(bar->virt_addr);

sys/dev/qat/qat_hw/qat_4xxx/adf_drv.c

279

bar->size = rman_get_size(bar->virt_addr);

sys/dev/qat/qat_hw/qat_4xxxvf/adf_drv.c

175

struct adf_bar *bar;

sys/dev/qat/qat_hw/qat_4xxxvf/adf_drv.c

178

bar = &accel_pci_dev->pci_bars[bar_nr / 2];

sys/dev/qat/qat_hw/qat_4xxxvf/adf_drv.c

179

bar->virt_addr = bus_alloc_resource_any(dev,

sys/dev/qat/qat_hw/qat_4xxxvf/adf_drv.c

183

if (!bar->virt_addr) {

sys/dev/qat/qat_hw/qat_4xxxvf/adf_drv.c

188

bar->base_addr = rman_get_start(bar->virt_addr);

sys/dev/qat/qat_hw/qat_4xxxvf/adf_drv.c

189

bar->size = rman_get_size(bar->virt_addr);

sys/dev/qat/qat_hw/qat_4xxxvf/adf_drv.c

62

struct adf_bar *bar = &accel_pci_dev->pci_bars[i];

sys/dev/qat/qat_hw/qat_4xxxvf/adf_drv.c

64

if (bar->virt_addr)

sys/dev/qat/qat_hw/qat_4xxxvf/adf_drv.c

67

bar->virt_addr);

sys/dev/qat/qat_hw/qat_c3xxx/adf_drv.c

184

struct adf_bar *bar;

sys/dev/qat/qat_hw/qat_c3xxx/adf_drv.c

194

bar = &accel_pci_dev->pci_bars[i++];

sys/dev/qat/qat_hw/qat_c3xxx/adf_drv.c

195

bar->virt_addr = bus_alloc_resource_any(dev,

sys/dev/qat/qat_hw/qat_c3xxx/adf_drv.c

199

if (bar->virt_addr == NULL) {

sys/dev/qat/qat_hw/qat_c3xxx/adf_drv.c

204

bar->base_addr = rman_get_start(bar->virt_addr);

sys/dev/qat/qat_hw/qat_c3xxx/adf_drv.c

205

bar->size = rman_get_size(bar->virt_addr);

sys/dev/qat/qat_hw/qat_c3xxx/adf_drv.c

56

struct adf_bar *bar = &accel_pci_dev->pci_bars[i];

sys/dev/qat/qat_hw/qat_c3xxx/adf_drv.c

58

if (bar->virt_addr)

sys/dev/qat/qat_hw/qat_c3xxx/adf_drv.c

61

bar->virt_addr);

sys/dev/qat/qat_hw/qat_c4xxx/adf_drv.c

183

struct adf_bar *bar;

sys/dev/qat/qat_hw/qat_c4xxx/adf_drv.c

193

bar = &accel_pci_dev->pci_bars[i++];

sys/dev/qat/qat_hw/qat_c4xxx/adf_drv.c

194

bar->virt_addr = bus_alloc_resource_any(dev,

sys/dev/qat/qat_hw/qat_c4xxx/adf_drv.c

198

if (!bar->virt_addr) {

sys/dev/qat/qat_hw/qat_c4xxx/adf_drv.c

203

bar->base_addr = rman_get_start(bar->virt_addr);

sys/dev/qat/qat_hw/qat_c4xxx/adf_drv.c

204

bar->size = rman_get_start(bar->virt_addr);

sys/dev/qat/qat_hw/qat_c4xxx/adf_drv.c

56

struct adf_bar *bar = &accel_pci_dev->pci_bars[i];

sys/dev/qat/qat_hw/qat_c4xxx/adf_drv.c

58

if (bar->virt_addr)

sys/dev/qat/qat_hw/qat_c4xxx/adf_drv.c

61

bar->virt_addr);

sys/dev/qat/qat_hw/qat_c62x/adf_drv.c

184

struct adf_bar *bar;

sys/dev/qat/qat_hw/qat_c62x/adf_drv.c

194

bar = &accel_pci_dev->pci_bars[i++];

sys/dev/qat/qat_hw/qat_c62x/adf_drv.c

195

bar->virt_addr = bus_alloc_resource_any(dev,

sys/dev/qat/qat_hw/qat_c62x/adf_drv.c

200

if (bar->virt_addr == NULL) {

sys/dev/qat/qat_hw/qat_c62x/adf_drv.c

205

bar->base_addr = rman_get_start(bar->virt_addr);

sys/dev/qat/qat_hw/qat_c62x/adf_drv.c

206

bar->size = rman_get_size(bar->virt_addr);

sys/dev/qat/qat_hw/qat_c62x/adf_drv.c

56

struct adf_bar *bar = &accel_pci_dev->pci_bars[i];

sys/dev/qat/qat_hw/qat_c62x/adf_drv.c

58

if (bar->virt_addr)

sys/dev/qat/qat_hw/qat_c62x/adf_drv.c

61

bar->virt_addr);

sys/dev/qat/qat_hw/qat_dh895xcc/adf_drv.c

173

struct adf_bar *bar;

sys/dev/qat/qat_hw/qat_dh895xcc/adf_drv.c

183

bar = &accel_pci_dev->pci_bars[i++];

sys/dev/qat/qat_hw/qat_dh895xcc/adf_drv.c

184

bar->virt_addr = bus_alloc_resource_any(dev,

sys/dev/qat/qat_hw/qat_dh895xcc/adf_drv.c

188

if (bar->virt_addr == NULL) {

sys/dev/qat/qat_hw/qat_dh895xcc/adf_drv.c

193

bar->base_addr = rman_get_start(bar->virt_addr);

sys/dev/qat/qat_hw/qat_dh895xcc/adf_drv.c

194

bar->size = rman_get_size(bar->virt_addr);

sys/dev/qat/qat_hw/qat_dh895xcc/adf_drv.c

56

struct adf_bar *bar = &accel_pci_dev->pci_bars[i];

sys/dev/qat/qat_hw/qat_dh895xcc/adf_drv.c

58

if (bar->virt_addr)

sys/dev/qat/qat_hw/qat_dh895xcc/adf_drv.c

61

bar->virt_addr);

sys/dev/qat_c2xxx/qat.c

330

int bar, count, error, i;

sys/dev/qat_c2xxx/qat.c

374

for (bar = 0; bar < PCIR_MAX_BAR_0; bar++) {

sys/dev/qat_c2xxx/qat.c

375

uint32_t val = pci_read_config(dev, PCIR_BAR(bar), 4);

sys/dev/qat_c2xxx/qat.c

379

sc->sc_rid[i] = PCIR_BAR(bar);

sys/dev/qat_c2xxx/qat.c

383

device_printf(dev, "couldn't map BAR %d\n", bar);

sys/dev/qat_c2xxx/qat.c

392

bar++;

sys/dev/qat_c2xxx/qat.c

516

int bar, i;

sys/dev/qat_c2xxx/qat.c

549

for (bar = 0; bar < MAX_BARS; bar++) {

sys/dev/qat_c2xxx/qat.c

550

if (sc->sc_res[bar] != NULL) {

sys/dev/qat_c2xxx/qat.c

552

sc->sc_rid[bar], sc->sc_res[bar]);

sys/dev/qat_c2xxx/qat.c

553

sc->sc_res[bar] = NULL;

sys/dev/qlnx/qlnxe/nvm_cfg.h

380

u32 bar; /* 0x58 */

sys/dev/sdhci/sdhci_pci.c

337

int bar, err, rid, slots, i;

sys/dev/sdhci/sdhci_pci.c

359

bar = PCI_SLOT_INFO_FIRST_BAR(slots);

sys/dev/sdhci/sdhci_pci.c

361

if (slots > 6 || bar > 5) {

sys/dev/sdhci/sdhci_pci.c

363

slots, bar);

sys/dev/sdhci/sdhci_pci.c

383

rid = PCIR_BAR(bar + i);

sys/dev/sfxge/sfxge.c

640

efsys_bar_t *esbp = &sc->bar;

sys/dev/sfxge/sfxge.c

660

efsys_bar_t *esbp = &sc->bar;

sys/dev/sfxge/sfxge.c

727

&sc->bar, &sc->enp_lock, &enp)) != 0)

sys/dev/sfxge/sfxge.h

295

efsys_bar_t bar;

sys/dev/tws/tws.c

181

u_int32_t bar;

sys/dev/tws/tws.c

223

bar = pci_read_config(dev, TWS_PCI_BAR0, 4);

sys/dev/tws/tws.c

224

TWS_TRACE_DEBUG(sc, "bar0 ", bar, 0);

sys/dev/tws/tws.c

225

bar = pci_read_config(dev, TWS_PCI_BAR1, 4);

sys/dev/tws/tws.c

226

bar = bar & ~TWS_BIT2;

sys/dev/tws/tws.c

227

TWS_TRACE_DEBUG(sc, "bar1 ", bar, 0);

sys/dev/virtio/pci/virtio_pci_modern.c

1006

vtpci_modern_get_bar_resource(struct vtpci_modern_softc *sc, int bar, int type)

sys/dev/virtio/pci/virtio_pci_modern.c

1010

MPASS(bar >= 0 && bar < VTPCI_MODERN_MAX_BARS);

sys/dev/virtio/pci/virtio_pci_modern.c

1011

res = sc->vtpci_bar_res[bar].vtbr_res;

sys/dev/virtio/pci/virtio_pci_modern.c

1012

MPASS(res == NULL || sc->vtpci_bar_res[bar].vtbr_type == type);

sys/dev/virtio/pci/virtio_pci_modern.c

1018

vtpci_modern_alloc_bar_resource(struct vtpci_modern_softc *sc, int bar,

sys/dev/virtio/pci/virtio_pci_modern.c

1024

MPASS(bar >= 0 && bar < VTPCI_MODERN_MAX_BARS);

sys/dev/virtio/pci/virtio_pci_modern.c

1027

res = sc->vtpci_bar_res[bar].vtbr_res;

sys/dev/virtio/pci/virtio_pci_modern.c

1029

MPASS(sc->vtpci_bar_res[bar].vtbr_type == type);

sys/dev/virtio/pci/virtio_pci_modern.c

1033

rid = PCIR_BAR(bar);

sys/dev/virtio/pci/virtio_pci_modern.c

1037

sc->vtpci_bar_res[bar].vtbr_res = res;

sys/dev/virtio/pci/virtio_pci_modern.c

1038

sc->vtpci_bar_res[bar].vtbr_type = type;

sys/dev/virtio/pci/virtio_pci_modern.c

1049

int bar, rid, type;

sys/dev/virtio/pci/virtio_pci_modern.c

1053

for (bar = 0; bar < VTPCI_MODERN_MAX_BARS; bar++) {

sys/dev/virtio/pci/virtio_pci_modern.c

1054

res = sc->vtpci_bar_res[bar].vtbr_res;

sys/dev/virtio/pci/virtio_pci_modern.c

1055

type = sc->vtpci_bar_res[bar].vtbr_type;

sys/dev/virtio/pci/virtio_pci_modern.c

1058

rid = PCIR_BAR(bar);

sys/dev/virtio/pci/virtio_pci_modern.c

1060

sc->vtpci_bar_res[bar].vtbr_res = NULL;

sys/dev/virtio/pci/virtio_pci_modern.c

1061

sc->vtpci_bar_res[bar].vtbr_type = 0;

sys/dev/virtio/pci/virtio_pci_modern.c

1108

int bar;

sys/dev/virtio/pci/virtio_pci_modern.c

1113

(bar = pci_msix_table_bar(dev)) == -1)

sys/dev/virtio/pci/virtio_pci_modern.c

1117

sc->vtpci_msix_bar = bar;

sys/dev/virtio/pci/virtio_pci_modern.c

1119

&bar, RF_ACTIVE)) == NULL)

sys/dev/virtio/pci/virtio_pci_modern.c

765

uint32_t type, bar;

sys/dev/virtio/pci/virtio_pci_modern.c

774

bar = pci_read_config(dev, capreg +

sys/dev/virtio/pci/virtio_pci_modern.c

775

offsetof(struct virtio_pci_cap, bar), 1);

sys/dev/virtio/pci/virtio_pci_modern.c

778

if (bar >= VTPCI_MODERN_MAX_BARS)

sys/dev/virtio/pci/virtio_pci_modern.c

942

uint8_t bar, cap_length;

sys/dev/virtio/pci/virtio_pci_modern.c

959

bar = pci_read_config(dev,

sys/dev/virtio/pci/virtio_pci_modern.c

960

cap_offset + offsetof(struct virtio_pci_cap, bar), 1);

sys/dev/virtio/pci/virtio_pci_modern.c

981

res->vtrm_bar = bar;

sys/dev/virtio/pci/virtio_pci_modern.c

984

res->vtrm_type = vtpci_modern_bar_type(sc, bar);

sys/dev/virtio/pci/virtio_pci_modern.c

990

vtpci_modern_bar_type(struct vtpci_modern_softc *sc, int bar)

sys/dev/virtio/pci/virtio_pci_modern.c

998

val = pci_read_config(sc->vtpci_dev, PCIR_BAR(bar), 4);

sys/dev/virtio/pci/virtio_pci_modern_var.h

59

uint8_t bar; /* Where to find it. */

sys/dev/vkbd/vkbd.c

251

vkbd_dev_close(struct cdev *dev, int foo, int bar, struct thread *td)

sys/dev/vmd/vmd.c

255

uint32_t bar;

sys/dev/vmd/vmd.c

268

bar = pci_read_config(dev, PCIR_BAR(0), 4);

sys/dev/vmd/vmd.c

269

if (PCI_BAR_MEM(bar) && (bar & PCIM_BAR_MEM_TYPE) ==

sys/kern/uipc_domain.c

180

#define DEFAULT(foo, bar) if (pr->foo == NULL) pr->foo = bar

sys/net/iflib.c

6563

int admincnt, bar, err, iflib_num_rx_queues, iflib_num_tx_queues;

sys/net/iflib.c

6584

bar = ctx->ifc_softc_ctx.isc_msix_bar;

sys/net/iflib.c

6592

if (bar != -1) {

sys/net/iflib.c

6594

SYS_RES_MEMORY, &bar, RF_ACTIVE);

sys/net/iflib.c

6670

if (bar != -1) {

sys/net/iflib.c

6671

bus_release_resource(dev, SYS_RES_MEMORY, bar,

sys/net/iflib.c

6689

if (bar != -1) {

sys/net/iflib.c

6690

bus_release_resource(dev, SYS_RES_MEMORY, bar,

sys/net80211/ieee80211_ht.c

3017

struct ieee80211_frame_bar *bar;

sys/net80211/ieee80211_ht.c

3038

m = ieee80211_getmgtframe(&frm, ic->ic_headroom, sizeof(*bar));

sys/net80211/ieee80211_ht.c

3048

bar = mtod(m, struct ieee80211_frame_bar *);

sys/net80211/ieee80211_ht.c

3049

bar->i_fc[0] = IEEE80211_FC0_VERSION_0 |

sys/net80211/ieee80211_ht.c

3051

bar->i_fc[1] = 0;

sys/net80211/ieee80211_ht.c

3052

IEEE80211_ADDR_COPY(bar->i_ra, ni->ni_macaddr);

sys/net80211/ieee80211_ht.c

3053

IEEE80211_ADDR_COPY(bar->i_ta, vap->iv_myaddr);

sys/net80211/ieee80211_ht.c

3063

bar->i_ctl = htole16(barctl);

sys/net80211/ieee80211_ht.c

3064

bar->i_seq = htole16(barseqctl);

sys/powerpc/mpc85xx/mpc85xx.c

112

law_write(uint32_t n, uint64_t bar, uint32_t sr)

sys/powerpc/mpc85xx/mpc85xx.c

116

ccsr_write4(OCP85XX_LAWBARH(n), bar >> 32);

sys/powerpc/mpc85xx/mpc85xx.c

117

ccsr_write4(OCP85XX_LAWBARL(n), bar);

sys/powerpc/mpc85xx/mpc85xx.c

121

ccsr_write4(OCP85XX_LAWBAR(n), bar >> 12);

sys/powerpc/mpc85xx/mpc85xx.c

137

law_read(uint32_t n, uint64_t *bar, uint32_t *sr)

sys/powerpc/mpc85xx/mpc85xx.c

141

*bar = (uint64_t)ccsr_read4(OCP85XX_LAWBARH(n)) << 32 |

sys/powerpc/mpc85xx/mpc85xx.c

145

*bar = (uint64_t)ccsr_read4(OCP85XX_LAWBAR(n)) << 12;

sys/powerpc/mpc85xx/mpc85xx.c

154

uint64_t bar;

sys/powerpc/mpc85xx/mpc85xx.c

160

law_read(i, &bar, &sr);

sys/powerpc/mpc85xx/mpc85xx.c

172

law_enable(int trgt, uint64_t bar, uint32_t size)

sys/powerpc/mpc85xx/mpc85xx.c

187

if (sr == sr_tmp && bar == bar_tmp)

sys/powerpc/mpc85xx/mpc85xx.c

197

law_write(i, bar, sr);

sys/powerpc/mpc85xx/mpc85xx.c

202

law_disable(int trgt, uint64_t bar, uint32_t size)

sys/powerpc/mpc85xx/mpc85xx.c

214

if (sr == sr_tmp && bar == bar_tmp) {

sys/powerpc/mpc85xx/mpc85xx.h

162

int law_enable(int trgt, uint64_t bar, uint32_t size);

sys/powerpc/mpc85xx/mpc85xx.h

163

int law_disable(int trgt, uint64_t bar, uint32_t size);

sys/powerpc/mpc85xx/pci_mpc85xx.c

587

uint32_t attr, bar, tar;

sys/powerpc/mpc85xx/pci_mpc85xx.c

604

bar = pci_start >> 12;

sys/powerpc/mpc85xx/pci_mpc85xx.c

608

bus_space_write_4(sc->sc_bst, sc->sc_bsh, REG_PIWBAR(wnd), bar);

sys/powerpc/mpc85xx/pci_mpc85xx.c

616

uint32_t attr, bar, tar;

sys/powerpc/mpc85xx/pci_mpc85xx.c

629

bar = start >> 12;

sys/powerpc/mpc85xx/pci_mpc85xx.c

634

bus_space_write_4(sc->sc_bst, sc->sc_bsh, REG_POWBAR(wnd), bar);

usr.bin/ministat/ministat.c

291

char **bar;

usr.bin/ministat/ministat.c

307

pl->bar = NULL;

usr.bin/ministat/ministat.c

345

int bar;

usr.bin/ministat/ministat.c

353

bar = val-1;

usr.bin/ministat/ministat.c

355

bar = 0;

usr.bin/ministat/ministat.c

357

if (pl->bar == NULL) {

usr.bin/ministat/ministat.c

358

pl->bar = calloc(pl->num_datasets, sizeof(char *));

usr.bin/ministat/ministat.c

359

assert(pl->bar != NULL);

usr.bin/ministat/ministat.c

362

if (pl->bar[bar] == NULL) {

usr.bin/ministat/ministat.c

363

pl->bar[bar] = malloc(pl->width);

usr.bin/ministat/ministat.c

364

assert(pl->bar[bar] != NULL);

usr.bin/ministat/ministat.c

365

memset(pl->bar[bar], 0, pl->width);

usr.bin/ministat/ministat.c

407

pl->bar[bar][m] = '|';

usr.bin/ministat/ministat.c

408

pl->bar[bar][x] = '|';

usr.bin/ministat/ministat.c

410

if (pl->bar[bar][z] == 0)

usr.bin/ministat/ministat.c

411

pl->bar[bar][z] = '_';

usr.bin/ministat/ministat.c

414

pl->bar[bar][x] = 'M';

usr.bin/ministat/ministat.c

416

pl->bar[bar][x] = 'A';

usr.bin/ministat/ministat.c

450

if (pl->bar[i] == NULL)

usr.bin/ministat/ministat.c

454

k = pl->bar[i][j];

usr.sbin/bhyve/pci_emul.c

1603

struct pci_bar_allocation *bar;

usr.sbin/bhyve/pci_emul.c

1605

TAILQ_FOREACH_SAFE(bar, &pci_bars, chain, bar_tmp) {

usr.sbin/bhyve/pci_emul.c

1606

pci_emul_assign_bar(bar->pdi, bar->idx, bar->type,

usr.sbin/bhyve/pci_emul.c

1607

bar->size);

usr.sbin/bhyve/pci_emul.c

1608

free(bar);

usr.sbin/bhyve/pci_emul.c

2273

uint64_t addr, bar, mask;

usr.sbin/bhyve/pci_emul.c

2357

pi->pi_bar[idx].addr = bar = 0;

usr.sbin/bhyve/pci_emul.c

2364

bar = addr | pi->pi_bar[idx].lobits;

usr.sbin/bhyve/pci_emul.c

2374

addr = bar = *valp & mask;

usr.sbin/bhyve/pci_emul.c

2375

bar |= pi->pi_bar[idx].lobits;

usr.sbin/bhyve/pci_emul.c

2382

addr = bar = *valp & mask;

usr.sbin/bhyve/pci_emul.c

2383

bar |= pi->pi_bar[idx].lobits;

usr.sbin/bhyve/pci_emul.c

2392

bar = addr >> 32;

usr.sbin/bhyve/pci_emul.c

2393

if (bar != pi->pi_bar[idx - 1].addr >> 32) {

usr.sbin/bhyve/pci_emul.c

2399

addr = bar = *valp & mask;

usr.sbin/bhyve/pci_emul.c

2410

bar |= pi->pi_bar[idx].lobits;

usr.sbin/bhyve/pci_emul.c

2415

pci_set_cfgdata32(pi, coff, bar);

usr.sbin/bhyve/pci_emul.c

839

struct pci_bar_allocation *bar = NULL;

usr.sbin/bhyve/pci_emul.c

840

TAILQ_FOREACH(bar, &pci_bars, chain) {

usr.sbin/bhyve/pci_emul.c

841

if (bar->size < size) {

usr.sbin/bhyve/pci_emul.c

846

if (bar == NULL) {

usr.sbin/bhyve/pci_emul.c

857

TAILQ_INSERT_BEFORE(bar, new_bar, chain);

usr.sbin/bhyve/pci_emul.c

898

uint64_t *baseptr, limit, addr, mask, lobits, bar;

usr.sbin/bhyve/pci_emul.c

972

bar = (addr & mask) | lobits;

usr.sbin/bhyve/pci_emul.c

973

pci_set_cfgdata32(pdi, PCIR_BAR(idx), bar);

usr.sbin/bhyve/pci_emul.c

978

pci_set_cfgdata32(pdi, PCIR_BAR(idx + 1), bar >> 32);

usr.sbin/bhyve/pci_passthru.c

583

struct pci_bar_io bar;

usr.sbin/bhyve/pci_passthru.c

595

bzero(&bar, sizeof(bar));

usr.sbin/bhyve/pci_passthru.c

596

bar.pbi_sel = sc->psc_sel;

usr.sbin/bhyve/pci_passthru.c

597

bar.pbi_reg = PCIR_BAR(i);

usr.sbin/bhyve/pci_passthru.c

599

if (ioctl(pcifd, PCIOCGETBAR, &bar) < 0)

usr.sbin/bhyve/pci_passthru.c

602

if (PCI_BAR_IO(bar.pbi_base)) {

usr.sbin/bhyve/pci_passthru.c

604

base = bar.pbi_base & PCIM_BAR_IO_BASE;

usr.sbin/bhyve/pci_passthru.c

606

switch (bar.pbi_base & PCIM_BAR_MEM_TYPE) {

usr.sbin/bhyve/pci_passthru.c

614

base = bar.pbi_base & PCIM_BAR_MEM_BASE;

usr.sbin/bhyve/pci_passthru.c

616

size = bar.pbi_length;

usr.sbin/pciconf/pciconf.c

1535

read_bar(const char *name, const char *bar, const char *start_end, int width)

usr.sbin/pciconf/pciconf.c

1548

map_bar(name, bar, 0, &pbm);

usr.sbin/pciconf/pciconf.c

1588

write_bar(const char *name, const char *bar, const char *offset_str,

usr.sbin/pciconf/pciconf.c

1601

map_bar(name, bar, PCIIO_BAR_MMAP_RW, &pbm);

usr.sbin/pciconf/pciconf.c

826

struct pci_bar_io bar;

usr.sbin/pciconf/pciconf.c

829

bar.pbi_sel = p->pc_sel;

usr.sbin/pciconf/pciconf.c

830

bar.pbi_reg = bar_offset;

usr.sbin/pciconf/pciconf.c

831

if (ioctl(fd, PCIOCGETBAR, &bar) < 0)

usr.sbin/pciconf/pciconf.c

833

if (PCI_BAR_IO(bar.pbi_base)) {

usr.sbin/pciconf/pciconf.c

836

base = bar.pbi_base & PCIM_BAR_IO_BASE;

usr.sbin/pciconf/pciconf.c

838

if (bar.pbi_base & PCIM_BAR_MEM_PREFETCH)

usr.sbin/pciconf/pciconf.c

842

switch (bar.pbi_base & PCIM_BAR_MEM_TYPE) {

usr.sbin/pciconf/pciconf.c

855

base = bar.pbi_base & ~((uint64_t)0xf);

usr.sbin/pciconf/pciconf.c

859

printf("size %ju, %s\n", (uintmax_t)bar.pbi_length,

usr.sbin/pciconf/pciconf.c

860

bar.pbi_enabled ? "enabled" : "disabled");

usr.sbin/pciconf/pciconf.c

94

static void read_bar(const char *name, const char *bar, const char *start_end,

usr.sbin/pciconf/pciconf.c

96

static void write_bar(const char *name, const char *bar, const char *offset_str,

usr.sbin/pciconf/pciconf.h

40

void print_bar(int fd, struct pci_conf *p, const char *label, uint16_t bar);