bhnd_bus_write_4
bhnd_bus_write_4(r, BCMA_DMP_IOCTRL, ioctl);
bhnd_bus_write_4(r, offset, *(const uint32_t *)value);
bhnd_bus_write_4(dinfo->res_agent, BCMA_DMP_RESETCTRL, value);
DEVMETHOD(bhnd_bus_write_4, bhnd_write_4),
bhnd_bus_write_4((_clkctl)->cc_res, (_clkctl)->cc_res_offset, (_val))
DEVMETHOD(bhnd_bus_write_4, bhndb_bus_write_4),
bhnd_bus_write_4(sc->core, CHIPC_CHIPCTRL, cctrl);
bhnd_bus_write_4(sc->core, CHIPC_CHIPCTRL, cctrl);
bhnd_bus_write_4(sc->core, CHIPC_CHIPCTRL, cctrl);
bhnd_bus_write_4(sc->mem_res, offset, value);
bhnd_bus_write_4((sc)->mem_res, (off), (val))
bhnd_bus_write_4(sc->res, CHIPC_SYS_CLK_CTL, clkctl);
bhnd_bus_write_4(sc->res, CHIPC_PLL_ON_DELAY, pll_on_delay);
bhnd_bus_write_4(sc->res, CHIPC_PLL_FREFSEL_DELAY, fref_sel_delay);
bhnd_bus_write_4(sc->res, CHIPC_PLL_SLOWCLK_CTL, scc);
bhnd_bus_write_4(sc->res, CHIPC_SYS_CLK_CTL, scc);
bhnd_bus_write_4(sc->res, CHIPC_PLL_SLOWCLK_CTL, scc);
bhnd_bus_write_4(sc->res, CHIPC_SYS_CLK_CTL, scc);
bhnd_bus_write_4((_sc)->mem_res, (_reg), (_val))
bhnd_bus_write_4(BHND_PCI_SOFTC(_sc)->mem_res, (_reg), (_val))
return (bhnd_bus_write_4(sc->res, reg, val));
bhnd_bus_write_4(r, offset, *(const uint8_t *)value);
bhnd_bus_write_4(dinfo->cfg_res[0], SIBA_CFG0_IMCONFIGLOW, imcfg);
bhnd_bus_write_4(r, reg, rval);