__BITS
#define HMIC_CTRL2_MDATA_THRES __BITS(12,8)
#define A64_ADCG __BITS(2,0)
#define A64_LINEOUT_VOL __BITS(4,0)
#define A64_MIC1G __BITS(6,4)
#define A64_MIC1BOOST __BITS(2,0)
#define A64_LINEING __BITS(6,4)
#define DA_FAT0_SR __BITS(5,4)
#define DA_FAT0_WSS __BITS(3,2)
#define GENET_MDIO_PMD __BITS(25,21)
#define GENET_MDIO_REG __BITS(20,16)
#define GENET_RX_DMA_RING_BUF_SIZE_DESC_COUNT __BITS(31,16)
#define GENET_RX_DMA_RING_BUF_SIZE_BUF_LENGTH __BITS(15,0)
#define GENET_RX_DMA_XON_XOFF_THRES_LO __BITS(31,16)
#define GENET_RX_DMA_XON_XOFF_THRES_HI __BITS(15,0)
#define GENET_TX_DMA_RING_BUF_SIZE_DESC_COUNT __BITS(31,16)
#define GENET_TX_DMA_RING_BUF_SIZE_BUF_LENGTH __BITS(15,0)
#define GENET_RX_DESC_STATUS_BUFLEN __BITS(27,16)
#define GENET_TX_DESC_STATUS_BUFLEN __BITS(27,16)
#define GENET_TX_DESC_STATUS_QTAG __BITS(12,7)
#define SYS_REV_MAJOR __BITS(27,24)
#define SYS_REV_MINOR __BITS(19,16)
#ifdef __BITS
#define GENET_UMAC_CMD_SPEED __BITS(3,2)
uint16_t mask = __BITS(3, 0);
#define NRSSI_11G_MASK __BITS(13, 8)
#define NRSSI_THR1_MASK __BITS(5, 0)
#define NRSSI_THR2_MASK __BITS(11, 6)
#define BWI_RFR_TXPWR1_MASK __BITS(6, 4)
#define BWI_RFR_BBP_ATTEN_CALIB_IDX __BITS(4, 1)
#define IEEE80211_OFDM_PLCP_RATE_MASK __BITS(3, 0)
#define IEEE80211_OFDM_PLCP_LEN_MASK __BITS(16, 5)
#define BWI_CLOCK_CTRL_CLKSRC __BITS(2, 0)
#define BWI_CLOCK_CTRL_FDIV __BITS(31, 16) /* freq divisor */
#define BWI_CLOCK_INFO_FDIV __BITS(31, 16) /* freq divisor */
#define BWI_MAC_STATUS_GPOSEL_MASK __BITS(15, 14)
#define BWI_LO_TSSI_MASK __BITS(7, 0)
#define BWI_HI_TSSI_MASK __BITS(15, 8)
#define BWI_TXSTATUS0_FREASON_MASK __BITS(4, 2) /* Failure reason */
#define BWI_TXSTATUS0_RTS_TXCNT_MASK __BITS(11, 8)
#define BWI_TXSTATUS0_DATA_TXCNT_MASK __BITS(15, 12)
#define BWI_TXSTATUS0_TXID_MASK __BITS(31, 16)
#define BWI_TX32_STATUS_STATE_MASK __BITS(15, 12)
#define BWI_RX32_CTRL_HDRSZ_MASK __BITS(7, 1)
#define BWI_RX32_STATUS_INDEX_MASK __BITS(11, 0)
#define BWI_RX32_STATUS_STATE_MASK __BITS(15, 12)
#define BWI_TXRX32_CTRL_ADDRHI_MASK __BITS(17, 16)
#define BWI_TXRX32_RINGINFO_FUNC_MASK __BITS(31, 30)
#define BWI_TXRX32_RINGINFO_ADDR_MASK __BITS(29, 0)
#define BWI_PHYINFO_REV_MASK __BITS(3, 0)
#define BWI_PHYINFO_TYPE_MASK __BITS(11, 8)
#define BWI_PHYINFO_VER_MASK __BITS(15, 12)
#define BWI_RFINFO_MANUFACT_MASK __BITS(11, 0)
#define BWI_RFINFO_TYPE_MASK __BITS(27, 12)
#define BWI_RFINFO_REV_MASK __BITS(31, 28)
#define BWI_SPROM_CARD_INFO_LOCALE __BITS(11, 8)
#define BWI_SPROM_GPIO_0 __BITS(7, 0)
#define BWI_SPROM_GPIO_1 __BITS(15, 8)
#define BWI_SPROM_GPIO_2 __BITS(7, 0)
#define BWI_SPROM_GPIO_3 __BITS(15, 8)
#define BWI_SPROM_MAX_TXPWR_MASK_11BG __BITS(7, 0) /* XXX */
#define BWI_SPROM_MAX_TXPWR_MASK_11A __BITS(15, 8) /* XXX */
#define BWI_SPROM_IDLE_TSSI_MASK_11BG __BITS(7, 0) /* XXX */
#define BWI_SPROM_IDLE_TSSI_MASK_11A __BITS(15, 8) /* XXX */
#define BWI_SPROM_ANT_GAIN_MASK_11A __BITS(7, 0)
#define BWI_SPROM_ANT_GAIN_MASK_11BG __BITS(15, 8)
#define BWI_LED_ACT_MASK __BITS(6, 0)
#define BWI_FLAGS_INTR_MASK __BITS(5, 0)
#define BWI_TXRX_INTR_ERROR (__BIT(15) | __BIT(14) | __BITS(12, 10))
#define BWI_STATE_LO_FLAGS_MASK __BITS(29, 18)
#define BWI_STATE_HI_FLAGS_MASK __BITS(28, 16)
#define BWI_CONF_LO_SERVTO_MASK __BITS(2, 0) /* service timeout */
#define BWI_CONF_LO_REQTO_MASK __BITS(6, 4) /* request timeout */
#define BWI_ID_LO_BUSREV_MASK __BITS(31, 28)
#define BWI_ID_HI_REGWIN_VENDOR_MASK __BITS(31, 16)
#define BWI_INFO_BBPID_MASK __BITS(15, 0)
#define BWI_INFO_BBPREV_MASK __BITS(19, 16)
#define BWI_INFO_BBPPKG_MASK __BITS(23, 20)
#define BWI_INFO_NREGWIN_MASK __BITS(27, 24)
#define BWI_DESC32_A_FUNC_MASK __BITS(31, 30)
#define BWI_DESC32_A_ADDR_MASK __BITS(29, 0)
#define BWI_DESC32_C_BUFLEN_MASK __BITS(12, 0)
#define BWI_DESC32_C_ADDRHI_MASK __BITS(17, 16)
#define BWI_RXH_PHYINFO_LNAGAIN __BITS(15, 14)
#define BWI_TXH_ID_RING_MASK __BITS(15, 13)
#define BWI_TXH_ID_IDX_MASK __BITS(12, 0)
#define BWI_TXH_PHY_C_ANTMODE_MASK __BITS(9, 8)
#define BWI_TXS_TXCNT_DATA __BITS(7, 4)
#define BWI_FW_IV_OFS_MASK __BITS(14, 0)
#define LA_FLAGS_PROTO __BITS(8, 6)
#define LA_FLAGS_PARTIAL __BITS(1, 0)
#define ARCH_IF_FLAGS_RESP_RING_TYPE __BITS(4, 3)
#define ARCH_IF_FLAGS_RESP_TYPE __BITS(2, 0)
#define HW_AUTH_CONFIG_SHA3_ALGO __BITS(22, 23)
#define HW_AUTH_CONFIG_CMPLEN __BITS(14, 8)
#define HW_AUTH_CONFIG_MODE __BITS(7, 4)
#define HW_AUTH_CONFIG_ALGO __BITS(3, 0)
#define CIPHER_CONFIG_MODE __BITS(7, 4)
#define CIPHER_CONFIG_ALGO __BITS(3, 0)
#define ETR_RING_CONFIG_NEAR_FULL_WM __BITS(14, 10)
#define ETR_RING_CONFIG_NEAR_EMPTY_WM __BITS(9, 5)
#define ETR_RING_CONFIG_RING_SIZE __BITS(4, 0)
#define ETR_AP_DEST_AE __BITS(6, 2)
#define ETR_AP_DEST_MAILBOX __BITS(1, 0)
#define FCU_CTRL_AE __BITS(8, 31)
#define FCU_STATUS_STS __BITS(0, 2)
#define FCU_STATUS_LOADED_AE __BITS(22, 31)
#define CAP_GLOBAL_CTL_RESET_MASK __BITS(31, 26)
#define CAP_GLOBAL_CTL_RESET_ACCEL_MASK __BITS(25, 20)
#define CAP_GLOBAL_CTL_RESET_AE_MASK __BITS(19, 0)
#define CAP_GLOBAL_CTL_CLK_EN_ACCEL_MASK __BITS(25, 20)
#define CAP_GLOBAL_CTL_CLK_EN_AE_MASK __BITS(19, 0)
#define AE_LOCAL_AE_MASK __BITS(31, 12)
#define AE_LOCAL_CSR_MASK __BITS(9, 0)
#define CTX_ENABLES_ENABLE __BITS(15,8)
#define CSR_CTX_POINTER_CONTEXT __BITS(2,0)
#define ACTIVE_CTX_STATUS_ACNO __BITS(0, 2)
#define AE_MISC_CONTROL_CS_RELOAD __BITS(21, 20)
#define AE_XFER_AE_MASK __BITS(31, 12)
#define AE_XFER_CSR_MASK __BITS(9, 2)
#define AE_MODE_NN_MODE __BITS(7, 4)
#define AE_MODE_CTX_MODE __BITS(3, 0)