VM_MEMATTR_UNCACHEABLE
mode = VM_MEMATTR_UNCACHEABLE;
mode = VM_MEMATTR_UNCACHEABLE;
#define VM_MEMATTR_DEVICE VM_MEMATTR_UNCACHEABLE
error = vm_object_set_memattr(obj, VM_MEMATTR_UNCACHEABLE);
memattr = VM_MEMATTR_UNCACHEABLE;
VM_MEMATTR_UNCACHEABLE);
PAGE_SIZE, 0, VM_MEMATTR_UNCACHEABLE);
VM_MEMATTR_UNCACHEABLE);
0, VM_MEMATTR_UNCACHEABLE);
VM_MEMATTR_UNCACHEABLE);
*memattr = VM_MEMATTR_UNCACHEABLE;
attr = VM_MEMATTR_UNCACHEABLE;
attr = VM_MEMATTR_UNCACHEABLE;
if (attr == VM_MEMATTR_UNCACHEABLE ||
if (mode == VM_MEMATTR_UNCACHEABLE)
case VM_MEMATTR_UNCACHEABLE:
case ATTR_S1_IDX(VM_MEMATTR_UNCACHEABLE):
MAIR_ATTR(MAIR_NORMAL_NC, VM_MEMATTR_UNCACHEABLE) |
return (-pmap_change_attr(addr, len, VM_MEMATTR_UNCACHEABLE));
pmap_page_set_memattr(page, VM_MEMATTR_UNCACHEABLE);
mapping->attr = VM_MEMATTR_UNCACHEABLE;
_ioremap_attr((addr), (size), VM_MEMATTR_UNCACHEABLE)
_ioremap_attr((addr), (size), VM_MEMATTR_UNCACHEABLE)
(((prot) & VM_PROT_ALL) | cachemode2protval(VM_MEMATTR_UNCACHEABLE))
*memattr = VM_MEMATTR_UNCACHEABLE;
VM_MEMATTR_UNCACHEABLE);
VM_MAX_ADDRESS, PAGE_SIZE, 0, VM_MEMATTR_UNCACHEABLE);
VM_MEMATTR_WRITE_COMBINING : VM_MEMATTR_UNCACHEABLE);
return (VM_MEMATTR_UNCACHEABLE);
VM_MEMATTR_WRITE_COMBINING : VM_MEMATTR_UNCACHEABLE);
return (VM_MEMATTR_UNCACHEABLE);
pmap_page_set_memattr(pages[i], VM_MEMATTR_UNCACHEABLE);
pmap_page_set_memattr(p, VM_MEMATTR_UNCACHEABLE);
attr = (flags & BUS_DMA_NOCACHE) != 0 ? VM_MEMATTR_UNCACHEABLE :
bar->map_mode = VM_MEMATTR_UNCACHEABLE;
bar->map_mode = VM_MEMATTR_UNCACHEABLE;
VM_MEMATTR_UNCACHEABLE);
VM_MEMATTR_UNCACHEABLE);
return (VM_MEMATTR_UNCACHEABLE);
case VM_MEMATTR_UNCACHEABLE:
bar->map_mode = VM_MEMATTR_UNCACHEABLE;
mw->splits[j].mw_map_mode = VM_MEMATTR_UNCACHEABLE;
mode = VM_MEMATTR_UNCACHEABLE;
mode = VM_MEMATTR_UNCACHEABLE;
VM_MEMATTR_UNCACHEABLE);
*memattr = VM_MEMATTR_UNCACHEABLE;
vm_object_set_memattr(obj, VM_MEMATTR_UNCACHEABLE);
memattr = VM_MEMATTR_UNCACHEABLE;
memattr = VM_MEMATTR_UNCACHEABLE;
VM_MEMATTR_UNCACHEABLE);
#define VM_MEMATTR_DEVICE VM_MEMATTR_UNCACHEABLE
#ifdef VM_MEMATTR_UNCACHEABLE
wait, 0, BUS_SPACE_MAXADDR, VM_MEMATTR_UNCACHEABLE));
case VM_MEMATTR_UNCACHEABLE:
return VM_MEMATTR_UNCACHEABLE;
return VM_MEMATTR_UNCACHEABLE;
case VM_MEMATTR_UNCACHEABLE:
case VM_MEMATTR_UNCACHEABLE:
case VM_MEMATTR_UNCACHEABLE:
attr = VM_MEMATTR_UNCACHEABLE;
*memattr = VM_MEMATTR_UNCACHEABLE;
case VM_MEMATTR_UNCACHEABLE:
attr = VM_MEMATTR_UNCACHEABLE;
attr = VM_MEMATTR_UNCACHEABLE;
if (mode == VM_MEMATTR_UNCACHEABLE)
case VM_MEMATTR_UNCACHEABLE:
memattr_bits[VM_MEMATTR_UNCACHEABLE] = PTE_MA_NC;
memattr_bits[VM_MEMATTR_UNCACHEABLE] = PTE_THEAD_MA_NC;
VM_MEMATTR_DEFAULT : VM_MEMATTR_UNCACHEABLE);
VM_MEMATTR_DEFAULT : VM_MEMATTR_UNCACHEABLE);
attr = VM_MEMATTR_UNCACHEABLE;
#ifdef VM_MEMATTR_UNCACHEABLE
MEMATTR_STR(VM_MEMATTR_UNCACHEABLE, "UC")