Symbol: BIT
crypto/krb5/src/lib/kadm5/alt_prof.c
490
#define GET_STRING_PARAM(FIELD, BIT, CONFTAG, DEFAULT) \
crypto/krb5/src/lib/kadm5/alt_prof.c
492
&params.mask, params_in->mask, BIT, \
crypto/krb5/src/lib/kadm5/alt_prof.c
524
#define GET_PORT_PARAM(FIELD, BIT, CONFTAG, DEFAULT) \
crypto/krb5/src/lib/kadm5/alt_prof.c
526
&params.mask, params_in->mask, BIT, \
crypto/krb5/src/lib/kadm5/alt_prof.c
568
#define GET_DELTAT_PARAM(FIELD, BIT, CONFTAG, DEFAULT) \
crypto/krb5/src/lib/kadm5/alt_prof.c
570
&params.mask, params_in->mask, BIT, \
lib/libc/string/strcspn.c
60
bit = BIT(*charset);
lib/libc/string/strcspn.c
66
bit = BIT(*s1);
lib/libc/string/strspn.c
59
bit = BIT(*charset);
lib/libc/string/strspn.c
65
bit = BIT(*s1);
sbin/nvmecontrol/logpage.c
621
if (letoh(dst->result[r].valid_diag_info) & BIT(0))
sbin/nvmecontrol/logpage.c
623
if (letoh(dst->result[r].valid_diag_info) & BIT(1)) {
sbin/nvmecontrol/logpage.c
628
if (letoh(dst->result[r].valid_diag_info) & BIT(2))
sbin/nvmecontrol/logpage.c
630
if (letoh(dst->result[r].valid_diag_info) & BIT(3))
sys/amd64/vmm/amd/amdvi_hw.c
152
#define PCIM_ATS_EN BIT(31)
sys/amd64/vmm/amd/amdvi_priv.h
132
#define AMDVI_CMP_WAIT_STORE BIT(0) /* Write back data. */
sys/amd64/vmm/amd/amdvi_priv.h
133
#define AMDVI_CMP_WAIT_INTR BIT(1) /* Completion wait interrupt. */
sys/amd64/vmm/amd/amdvi_priv.h
134
#define AMDVI_CMP_WAIT_FLUSH BIT(2) /* Flush queue. */
sys/amd64/vmm/amd/amdvi_priv.h
137
#define AMDVI_INVD_PAGE_S BIT(0) /* Invalidation size. */
sys/amd64/vmm/amd/amdvi_priv.h
138
#define AMDVI_INVD_PAGE_PDE BIT(1) /* Invalidate PDE. */
sys/amd64/vmm/amd/amdvi_priv.h
139
#define AMDVI_INVD_PAGE_GN_GVA BIT(2) /* GPA or GVA. */
sys/amd64/vmm/amd/amdvi_priv.h
144
#define AMDVI_INVD_IOTLB_S BIT(0) /* Invalidation size 4k or addr */
sys/amd64/vmm/amd/amdvi_priv.h
145
#define AMDVI_INVD_IOTLB_GN_GVA BIT(2) /* GPA or GVA. */
sys/amd64/vmm/amd/amdvi_priv.h
265
#define IVHD_FLAG_HTT BIT(0) /* Hypertransport Tunnel. */
sys/amd64/vmm/amd/amdvi_priv.h
266
#define IVHD_FLAG_PPW BIT(1) /* Pass posted write. */
sys/amd64/vmm/amd/amdvi_priv.h
267
#define IVHD_FLAG_RPPW BIT(2) /* Response pass posted write. */
sys/amd64/vmm/amd/amdvi_priv.h
268
#define IVHD_FLAG_ISOC BIT(3) /* Isoc support. */
sys/amd64/vmm/amd/amdvi_priv.h
269
#define IVHD_FLAG_IOTLB BIT(4) /* IOTLB support. */
sys/amd64/vmm/amd/amdvi_priv.h
270
#define IVHD_FLAG_COH BIT(5) /* Coherent control, default 1 */
sys/amd64/vmm/amd/amdvi_priv.h
271
#define IVHD_FLAG_PFS BIT(6) /* Prefetch IOMMU pages. */
sys/amd64/vmm/amd/amdvi_priv.h
272
#define IVHD_FLAG_PPRS BIT(7) /* Peripheral page support. */
sys/amd64/vmm/amd/amdvi_priv.h
275
#define IVHD_DEV_LINT0_PASS BIT(6) /* LINT0 interrupts. */
sys/amd64/vmm/amd/amdvi_priv.h
276
#define IVHD_DEV_LINT1_PASS BIT(7) /* LINT1 interrupts. */
sys/amd64/vmm/amd/amdvi_priv.h
279
#define IVHD_DEV_INIT_PASS BIT(0) /* INIT */
sys/amd64/vmm/amd/amdvi_priv.h
280
#define IVHD_DEV_EXTINTR_PASS BIT(1) /* ExtInt */
sys/amd64/vmm/amd/amdvi_priv.h
281
#define IVHD_DEV_NMI_PASS BIT(2) /* NMI */
sys/amd64/vmm/amd/amdvi_priv.h
284
#define IVHD_DEV_EXT_ATS_DISABLE BIT(31) /* Disable ATS */
sys/amd64/vmm/amd/amdvi_priv.h
287
#define AMDVI_CTRL_EN BIT(0) /* IOMMU enable. */
sys/amd64/vmm/amd/amdvi_priv.h
288
#define AMDVI_CTRL_HTT BIT(1) /* Hypertransport tunnel enable. */
sys/amd64/vmm/amd/amdvi_priv.h
289
#define AMDVI_CTRL_ELOG BIT(2) /* Event log enable. */
sys/amd64/vmm/amd/amdvi_priv.h
290
#define AMDVI_CTRL_ELOGINT BIT(3) /* Event log interrupt. */
sys/amd64/vmm/amd/amdvi_priv.h
291
#define AMDVI_CTRL_COMINT BIT(4) /* Completion wait interrupt. */
sys/amd64/vmm/amd/amdvi_priv.h
292
#define AMDVI_CTRL_PPW BIT(8)
sys/amd64/vmm/amd/amdvi_priv.h
293
#define AMDVI_CTRL_RPPW BIT(9)
sys/amd64/vmm/amd/amdvi_priv.h
294
#define AMDVI_CTRL_COH BIT(10)
sys/amd64/vmm/amd/amdvi_priv.h
295
#define AMDVI_CTRL_ISOC BIT(11)
sys/amd64/vmm/amd/amdvi_priv.h
296
#define AMDVI_CTRL_CMD BIT(12) /* Command buffer enable. */
sys/amd64/vmm/amd/amdvi_priv.h
297
#define AMDVI_CTRL_PPRLOG BIT(13)
sys/amd64/vmm/amd/amdvi_priv.h
298
#define AMDVI_CTRL_PPRINT BIT(14)
sys/amd64/vmm/amd/amdvi_priv.h
299
#define AMDVI_CTRL_PPREN BIT(15)
sys/amd64/vmm/amd/amdvi_priv.h
300
#define AMDVI_CTRL_GTE BIT(16) /* Guest translation enable. */
sys/amd64/vmm/amd/amdvi_priv.h
301
#define AMDVI_CTRL_GAE BIT(17) /* Guest APIC enable. */
sys/amd64/vmm/amd/amdvi_priv.h
319
#define AMDVI_MAX_DOMAIN (BIT(16) - 1)
sys/amd64/vmm/amd/amdvi_priv.h
324
#define AMDVI_PT_PRESENT BIT(0)
sys/amd64/vmm/amd/amdvi_priv.h
325
#define AMDVI_PT_COHERENT BIT(60)
sys/amd64/vmm/amd/amdvi_priv.h
326
#define AMDVI_PT_READ BIT(61)
sys/amd64/vmm/amd/amdvi_priv.h
327
#define AMDVI_PT_WRITE BIT(62)
sys/amd64/vmm/amd/amdvi_priv.h
337
#define AMDVI_STATUS_EV_OF BIT(0) /* Event overflow. */
sys/amd64/vmm/amd/amdvi_priv.h
338
#define AMDVI_STATUS_EV_INTR BIT(1) /* Event interrupt. */
sys/amd64/vmm/amd/amdvi_priv.h
340
#define AMDVI_STATUS_CMP BIT(2)
sys/amd64/vmm/amd/amdvi_priv.h
45
#define AMDVI_PCI_CAP_IOTLB BIT(0) /* IOTLB is supported. */
sys/amd64/vmm/amd/amdvi_priv.h
46
#define AMDVI_PCI_CAP_HT BIT(1) /* HyperTransport tunnel support. */
sys/amd64/vmm/amd/amdvi_priv.h
47
#define AMDVI_PCI_CAP_NPCACHE BIT(2) /* Not present page cached. */
sys/amd64/vmm/amd/amdvi_priv.h
48
#define AMDVI_PCI_CAP_EFR BIT(3) /* Extended features. */
sys/amd64/vmm/amd/amdvi_priv.h
49
#define AMDVI_PCI_CAP_EXT BIT(4) /* Miscellaneous information reg. */
sys/amd64/vmm/amd/amdvi_priv.h
54
#define AMDVI_EX_FEA_PREFSUP BIT(0) /* Prefetch command support. */
sys/amd64/vmm/amd/amdvi_priv.h
55
#define AMDVI_EX_FEA_PPRSUP BIT(1) /* PPR support */
sys/amd64/vmm/amd/amdvi_priv.h
56
#define AMDVI_EX_FEA_XTSUP BIT(2) /* Reserved */
sys/amd64/vmm/amd/amdvi_priv.h
57
#define AMDVI_EX_FEA_NXSUP BIT(3) /* No-execute. */
sys/amd64/vmm/amd/amdvi_priv.h
58
#define AMDVI_EX_FEA_GTSUP BIT(4) /* Guest translation support. */
sys/amd64/vmm/amd/amdvi_priv.h
59
#define AMDVI_EX_FEA_EFRW BIT(5) /* Reserved */
sys/amd64/vmm/amd/amdvi_priv.h
60
#define AMDVI_EX_FEA_IASUP BIT(6) /* Invalidate all command supp. */
sys/amd64/vmm/amd/amdvi_priv.h
61
#define AMDVI_EX_FEA_GASUP BIT(7) /* Guest APIC or AVIC support. */
sys/amd64/vmm/amd/amdvi_priv.h
62
#define AMDVI_EX_FEA_HESUP BIT(8) /* Hardware Error. */
sys/amd64/vmm/amd/amdvi_priv.h
63
#define AMDVI_EX_FEA_PCSUP BIT(9) /* Performance counters support. */
sys/amd64/vmm/amd/svm.c
2472
svm_set_intercept(vcpu, VMCB_EXC_INTCPT, BIT(IDT_BP), val);
sys/amd64/vmm/amd/svm.c
2519
svm_set_intercept(vcpu, VMCB_EXC_INTCPT, BIT(IDT_DB), val);
sys/amd64/vmm/amd/svm.c
2556
*retval = svm_get_intercept(vcpu, VMCB_EXC_INTCPT, BIT(IDT_BP));
sys/amd64/vmm/amd/svm.c
490
mask = (BIT(n) << 16) | BIT(n);
sys/amd64/vmm/amd/svm.c
509
svm_enable_intercept(vcpu, VMCB_EXC_INTCPT, BIT(n));
sys/amd64/vmm/amd/svm.c
512
svm_enable_intercept(vcpu, VMCB_EXC_INTCPT, BIT(IDT_MC));
sys/amd64/vmm/amd/svm.c
567
state->dbgctl = BIT(0);
sys/amd64/vmm/amd/svm.c
82
#define AMD_CPUID_SVM_NP BIT(0) /* Nested paging or RVI */
sys/amd64/vmm/amd/svm.c
83
#define AMD_CPUID_SVM_LBR BIT(1) /* Last branch virtualization */
sys/amd64/vmm/amd/svm.c
84
#define AMD_CPUID_SVM_SVML BIT(2) /* SVM lock */
sys/amd64/vmm/amd/svm.c
845
inout_string = info1 & BIT(2) ? 1 : 0;
sys/amd64/vmm/amd/svm.c
848
vmexit->u.inout.in = (info1 & BIT(0)) ? 1 : 0;
sys/amd64/vmm/amd/svm.c
85
#define AMD_CPUID_SVM_NRIP_SAVE BIT(3) /* Next RIP is saved */
sys/amd64/vmm/amd/svm.c
850
vmexit->u.inout.rep = (info1 & BIT(3)) ? 1 : 0;
sys/amd64/vmm/amd/svm.c
86
#define AMD_CPUID_SVM_TSC_RATE BIT(4) /* TSC rate control. */
sys/amd64/vmm/amd/svm.c
87
#define AMD_CPUID_SVM_VMCB_CLEAN BIT(5) /* VMCB state caching */
sys/amd64/vmm/amd/svm.c
88
#define AMD_CPUID_SVM_FLUSH_BY_ASID BIT(6) /* Flush by ASID */
sys/amd64/vmm/amd/svm.c
89
#define AMD_CPUID_SVM_DECODE_ASSIST BIT(7) /* Decode assist */
sys/amd64/vmm/amd/svm.c
90
#define AMD_CPUID_SVM_PAUSE_INC BIT(10) /* Pause intercept filter. */
sys/amd64/vmm/amd/svm.c
91
#define AMD_CPUID_SVM_PAUSE_FTH BIT(12) /* Pause filter threshold */
sys/amd64/vmm/amd/svm.c
92
#define AMD_CPUID_SVM_AVIC BIT(13) /* AVIC present */
sys/amd64/vmm/amd/vmcb.h
104
#define VMCB_CACHE_I BIT(0) /* Intercept, TSC off, Pause filter */
sys/amd64/vmm/amd/vmcb.h
105
#define VMCB_CACHE_IOPM BIT(1) /* I/O and MSR permission */
sys/amd64/vmm/amd/vmcb.h
106
#define VMCB_CACHE_ASID BIT(2) /* ASID */
sys/amd64/vmm/amd/vmcb.h
107
#define VMCB_CACHE_TPR BIT(3) /* V_TPR to V_INTR_VECTOR */
sys/amd64/vmm/amd/vmcb.h
108
#define VMCB_CACHE_NP BIT(4) /* Nested Paging */
sys/amd64/vmm/amd/vmcb.h
109
#define VMCB_CACHE_CR BIT(5) /* CR0, CR3, CR4 & EFER */
sys/amd64/vmm/amd/vmcb.h
110
#define VMCB_CACHE_DR BIT(6) /* Debug registers */
sys/amd64/vmm/amd/vmcb.h
111
#define VMCB_CACHE_DT BIT(7) /* GDT/IDT */
sys/amd64/vmm/amd/vmcb.h
112
#define VMCB_CACHE_SEG BIT(8) /* User segments, CPL */
sys/amd64/vmm/amd/vmcb.h
113
#define VMCB_CACHE_CR2 BIT(9) /* page fault address */
sys/amd64/vmm/amd/vmcb.h
114
#define VMCB_CACHE_LBR BIT(10) /* Last branch */
sys/amd64/vmm/amd/vmcb.h
117
#define VMCB_EVENTINJ_EC_VALID BIT(11) /* Error Code valid */
sys/amd64/vmm/amd/vmcb.h
118
#define VMCB_EVENTINJ_VALID BIT(31) /* Event valid */
sys/amd64/vmm/amd/vmcb.h
160
#define VMCB_NPF_INFO1_P BIT(0) /* Nested page present. */
sys/amd64/vmm/amd/vmcb.h
161
#define VMCB_NPF_INFO1_W BIT(1) /* Access was write. */
sys/amd64/vmm/amd/vmcb.h
162
#define VMCB_NPF_INFO1_U BIT(2) /* Access was user access. */
sys/amd64/vmm/amd/vmcb.h
163
#define VMCB_NPF_INFO1_RSV BIT(3) /* Reserved bits present. */
sys/amd64/vmm/amd/vmcb.h
164
#define VMCB_NPF_INFO1_ID BIT(4) /* Code read. */
sys/amd64/vmm/amd/vmcb.h
166
#define VMCB_NPF_INFO1_GPA BIT(32) /* Guest physical address. */
sys/amd64/vmm/amd/vmcb.h
167
#define VMCB_NPF_INFO1_GPT BIT(33) /* Guest page table. */
sys/amd64/vmm/amd/vmcb.h
175
#define VMCB_EXITINTINFO_EC_VALID(x) (((x) & BIT(11)) ? 1 : 0)
sys/amd64/vmm/amd/vmcb.h
176
#define VMCB_EXITINTINFO_VALID(x) (((x) & BIT(31)) ? 1 : 0)
sys/amd64/vmm/amd/vmcb.h
248
#define VMCB_CS_ATTRIB_L BIT(9) /* Long mode. */
sys/amd64/vmm/amd/vmcb.h
249
#define VMCB_CS_ATTRIB_D BIT(10) /* OPerand size bit. */
sys/amd64/vmm/amd/vmcb.h
47
#define VMCB_INTCPT_INTR BIT(0)
sys/amd64/vmm/amd/vmcb.h
48
#define VMCB_INTCPT_NMI BIT(1)
sys/amd64/vmm/amd/vmcb.h
49
#define VMCB_INTCPT_SMI BIT(2)
sys/amd64/vmm/amd/vmcb.h
50
#define VMCB_INTCPT_INIT BIT(3)
sys/amd64/vmm/amd/vmcb.h
51
#define VMCB_INTCPT_VINTR BIT(4)
sys/amd64/vmm/amd/vmcb.h
52
#define VMCB_INTCPT_CR0_WRITE BIT(5)
sys/amd64/vmm/amd/vmcb.h
53
#define VMCB_INTCPT_IDTR_READ BIT(6)
sys/amd64/vmm/amd/vmcb.h
54
#define VMCB_INTCPT_GDTR_READ BIT(7)
sys/amd64/vmm/amd/vmcb.h
55
#define VMCB_INTCPT_LDTR_READ BIT(8)
sys/amd64/vmm/amd/vmcb.h
56
#define VMCB_INTCPT_TR_READ BIT(9)
sys/amd64/vmm/amd/vmcb.h
57
#define VMCB_INTCPT_IDTR_WRITE BIT(10)
sys/amd64/vmm/amd/vmcb.h
58
#define VMCB_INTCPT_GDTR_WRITE BIT(11)
sys/amd64/vmm/amd/vmcb.h
59
#define VMCB_INTCPT_LDTR_WRITE BIT(12)
sys/amd64/vmm/amd/vmcb.h
60
#define VMCB_INTCPT_TR_WRITE BIT(13)
sys/amd64/vmm/amd/vmcb.h
61
#define VMCB_INTCPT_RDTSC BIT(14)
sys/amd64/vmm/amd/vmcb.h
62
#define VMCB_INTCPT_RDPMC BIT(15)
sys/amd64/vmm/amd/vmcb.h
63
#define VMCB_INTCPT_PUSHF BIT(16)
sys/amd64/vmm/amd/vmcb.h
64
#define VMCB_INTCPT_POPF BIT(17)
sys/amd64/vmm/amd/vmcb.h
65
#define VMCB_INTCPT_CPUID BIT(18)
sys/amd64/vmm/amd/vmcb.h
66
#define VMCB_INTCPT_RSM BIT(19)
sys/amd64/vmm/amd/vmcb.h
67
#define VMCB_INTCPT_IRET BIT(20)
sys/amd64/vmm/amd/vmcb.h
68
#define VMCB_INTCPT_INTn BIT(21)
sys/amd64/vmm/amd/vmcb.h
69
#define VMCB_INTCPT_INVD BIT(22)
sys/amd64/vmm/amd/vmcb.h
70
#define VMCB_INTCPT_PAUSE BIT(23)
sys/amd64/vmm/amd/vmcb.h
71
#define VMCB_INTCPT_HLT BIT(24)
sys/amd64/vmm/amd/vmcb.h
72
#define VMCB_INTCPT_INVLPG BIT(25)
sys/amd64/vmm/amd/vmcb.h
73
#define VMCB_INTCPT_INVLPGA BIT(26)
sys/amd64/vmm/amd/vmcb.h
74
#define VMCB_INTCPT_IO BIT(27)
sys/amd64/vmm/amd/vmcb.h
75
#define VMCB_INTCPT_MSR BIT(28)
sys/amd64/vmm/amd/vmcb.h
76
#define VMCB_INTCPT_TASK_SWITCH BIT(29)
sys/amd64/vmm/amd/vmcb.h
77
#define VMCB_INTCPT_FERR_FREEZE BIT(30)
sys/amd64/vmm/amd/vmcb.h
78
#define VMCB_INTCPT_SHUTDOWN BIT(31)
sys/amd64/vmm/amd/vmcb.h
81
#define VMCB_INTCPT_VMRUN BIT(0)
sys/amd64/vmm/amd/vmcb.h
82
#define VMCB_INTCPT_VMMCALL BIT(1)
sys/amd64/vmm/amd/vmcb.h
83
#define VMCB_INTCPT_VMLOAD BIT(2)
sys/amd64/vmm/amd/vmcb.h
84
#define VMCB_INTCPT_VMSAVE BIT(3)
sys/amd64/vmm/amd/vmcb.h
85
#define VMCB_INTCPT_STGI BIT(4)
sys/amd64/vmm/amd/vmcb.h
86
#define VMCB_INTCPT_CLGI BIT(5)
sys/amd64/vmm/amd/vmcb.h
87
#define VMCB_INTCPT_SKINIT BIT(6)
sys/amd64/vmm/amd/vmcb.h
88
#define VMCB_INTCPT_RDTSCP BIT(7)
sys/amd64/vmm/amd/vmcb.h
89
#define VMCB_INTCPT_ICEBP BIT(8)
sys/amd64/vmm/amd/vmcb.h
90
#define VMCB_INTCPT_WBINVD BIT(9)
sys/amd64/vmm/amd/vmcb.h
91
#define VMCB_INTCPT_MONITOR BIT(10)
sys/amd64/vmm/amd/vmcb.h
92
#define VMCB_INTCPT_MWAIT BIT(11)
sys/amd64/vmm/amd/vmcb.h
93
#define VMCB_INTCPT_MWAIT_ARMED BIT(12)
sys/amd64/vmm/amd/vmcb.h
94
#define VMCB_INTCPT_XSETBV BIT(13)
sys/arm/mv/clk/a37x0_xtal.c
50
#define NB_GPIO1_MPP1_9 BIT(9)
sys/arm/nvidia/drm2/hdmi.c
114
ptr[0] |= BIT(4);
sys/arm/nvidia/drm2/hdmi.c
118
ptr[0] |= BIT(3);
sys/arm/nvidia/drm2/hdmi.c
121
ptr[0] |= BIT(2);
sys/arm/nvidia/drm2/hdmi.c
132
ptr[2] |= BIT(7);
sys/arm/nvidia/drm2/hdmi.c
292
ptr[4] |= BIT(7);
sys/arm/nvidia/drm2/hdmi.c
30
#ifndef BIT
sys/arm64/qoriq/qoriq_gpio_pic.c
111
status &= ~BIT(pin);
sys/arm64/qoriq/qoriq_gpio_pic.c
250
reg |= BIT(31 - qisrc->pin);
sys/arm64/qoriq/qoriq_gpio_pic.c
252
reg &= ~BIT(31 - qisrc->pin);
sys/arm64/qoriq/qoriq_gpio_pic.c
81
reg |= BIT(31 - pin);
sys/arm64/qoriq/qoriq_gpio_pic.c
83
reg &= ~BIT(31 - pin);
sys/arm64/qoriq/qoriq_gpio_pic.c
92
reg = BIT(31 - pin);
sys/compat/linuxkpi/common/include/linux/i2c.h
103
#define I2C_AQ_COMB BIT(0)
sys/compat/linuxkpi/common/include/linux/i2c.h
104
#define I2C_AQ_COMB_WRITE_FIRST BIT(1)
sys/compat/linuxkpi/common/include/linux/i2c.h
105
#define I2C_AQ_COMB_READ_SECOND BIT(2)
sys/compat/linuxkpi/common/include/linux/i2c.h
106
#define I2C_AQ_COMB_SAME_ADDR BIT(3)
sys/compat/linuxkpi/common/include/linux/i2c.h
110
#define I2C_AQ_NO_CLK_STRETCH BIT(4)
sys/compat/linuxkpi/common/include/linux/i2c.h
111
#define I2C_AQ_NO_ZERO_LEN_READ BIT(5)
sys/compat/linuxkpi/common/include/linux/i2c.h
112
#define I2C_AQ_NO_ZERO_LEN_WRITE BIT(6)
sys/compat/linuxkpi/common/include/linux/i2c.h
115
#define I2C_AQ_NO_REP_START BIT(7)
sys/compat/linuxkpi/common/include/linux/ieee80211.h
107
#define IEEE80211_P2P_OPPPS_ENABLE_BIT BIT(7)
sys/compat/linuxkpi/common/include/linux/ieee80211.h
119
IEEE80211_RATE_SHORT_PREAMBLE = BIT(0), /* 2.4Ghz, CCK */
sys/compat/linuxkpi/common/include/linux/ieee80211.h
120
IEEE80211_RATE_SUPPORTS_5MHZ = BIT(1),
sys/compat/linuxkpi/common/include/linux/ieee80211.h
121
IEEE80211_RATE_SUPPORTS_10MHZ = BIT(2),
sys/compat/linuxkpi/common/include/linux/ieee80211.h
122
IEEE80211_RATE_ERP_G = BIT(3),
sys/compat/linuxkpi/common/include/linux/ieee80211.h
128
IEEE80211_RATE_MANDATORY_A = BIT(4),
sys/compat/linuxkpi/common/include/linux/ieee80211.h
129
IEEE80211_RATE_MANDATORY_G = BIT(5),
sys/compat/linuxkpi/common/include/linux/ieee80211.h
130
IEEE80211_RATE_MANDATORY_B = BIT(6),
sys/compat/linuxkpi/common/include/linux/ieee80211.h
134
IEEE80211_RC_BW_CHANGED = BIT(0),
sys/compat/linuxkpi/common/include/linux/ieee80211.h
135
IEEE80211_RC_NSS_CHANGED = BIT(1),
sys/compat/linuxkpi/common/include/linux/ieee80211.h
136
IEEE80211_RC_SUPP_RATES_CHANGED = BIT(2),
sys/compat/linuxkpi/common/include/linux/ieee80211.h
137
IEEE80211_RC_SMPS_CHANGED = BIT(3),
sys/compat/linuxkpi/common/include/linux/ieee80211.h
283
#define WLAN_EXT_CAPA1_EXT_CHANNEL_SWITCHING BIT(2 % 8)
sys/compat/linuxkpi/common/include/linux/ieee80211.h
284
#define WLAN_EXT_CAPA3_MULTI_BSSID_SUPPORT BIT(22 % 8)
sys/compat/linuxkpi/common/include/linux/ieee80211.h
285
#define WLAN_EXT_CAPA3_TIMING_MEASUREMENT_SUPPORT BIT(23 % 8)
sys/compat/linuxkpi/common/include/linux/ieee80211.h
286
#define WLAN_EXT_CAPA8_OPMODE_NOTIF BIT(62 % 8)
sys/compat/linuxkpi/common/include/linux/ieee80211.h
287
#define WLAN_EXT_CAPA8_MAX_MSDU_IN_AMSDU_LSB BIT(63 % 8)
sys/compat/linuxkpi/common/include/linux/ieee80211.h
288
#define WLAN_EXT_CAPA9_MAX_MSDU_IN_AMSDU_MSB BIT(64 % 8)
sys/compat/linuxkpi/common/include/linux/ieee80211.h
289
#define WLAN_EXT_CAPA10_TWT_REQUESTER_SUPPORT BIT(77 % 8)
sys/compat/linuxkpi/common/include/linux/ieee80211.h
290
#define WLAN_EXT_CAPA10_TWT_RESPONDER_SUPPORT BIT(78 % 8)
sys/compat/linuxkpi/common/include/linux/ieee80211.h
291
#define WLAN_EXT_CAPA10_OBSS_NARROW_BW_RU_TOLERANCE_SUPPORT BIT(79 % 8)
sys/compat/linuxkpi/common/include/linux/ieee80211.h
387
IEEE80211_CHANCTX_CHANGE_MIN_WIDTH = BIT(0),
sys/compat/linuxkpi/common/include/linux/ieee80211.h
388
IEEE80211_CHANCTX_CHANGE_RADAR = BIT(1),
sys/compat/linuxkpi/common/include/linux/ieee80211.h
389
IEEE80211_CHANCTX_CHANGE_RX_CHAINS = BIT(2),
sys/compat/linuxkpi/common/include/linux/ieee80211.h
390
IEEE80211_CHANCTX_CHANGE_WIDTH = BIT(3),
sys/compat/linuxkpi/common/include/linux/ieee80211.h
391
IEEE80211_CHANCTX_CHANGE_CHANNEL = BIT(4),
sys/compat/linuxkpi/common/include/linux/ieee80211.h
392
IEEE80211_CHANCTX_CHANGE_PUNCTURING = BIT(5),
sys/compat/linuxkpi/common/include/linux/ieee80211.h
393
IEEE80211_CHANCTX_CHANGE_MIN_DEF = BIT(6),
sys/compat/linuxkpi/common/include/linux/ieee80211.h
394
IEEE80211_CHANCTX_CHANGE_AP = BIT(7),
sys/compat/linuxkpi/common/include/linux/ieee80211.h
448
IEEE80211_TX_CTL_AMPDU = BIT(0),
sys/compat/linuxkpi/common/include/linux/ieee80211.h
449
IEEE80211_TX_CTL_ASSIGN_SEQ = BIT(1),
sys/compat/linuxkpi/common/include/linux/ieee80211.h
450
IEEE80211_TX_CTL_NO_ACK = BIT(2),
sys/compat/linuxkpi/common/include/linux/ieee80211.h
451
IEEE80211_TX_CTL_SEND_AFTER_DTIM = BIT(3),
sys/compat/linuxkpi/common/include/linux/ieee80211.h
452
IEEE80211_TX_CTL_TX_OFFCHAN = BIT(4),
sys/compat/linuxkpi/common/include/linux/ieee80211.h
453
IEEE80211_TX_CTL_REQ_TX_STATUS = BIT(5),
sys/compat/linuxkpi/common/include/linux/ieee80211.h
454
IEEE80211_TX_STATUS_EOSP = BIT(6),
sys/compat/linuxkpi/common/include/linux/ieee80211.h
455
IEEE80211_TX_STAT_ACK = BIT(7),
sys/compat/linuxkpi/common/include/linux/ieee80211.h
456
IEEE80211_TX_STAT_AMPDU = BIT(8),
sys/compat/linuxkpi/common/include/linux/ieee80211.h
457
IEEE80211_TX_STAT_AMPDU_NO_BACK = BIT(9),
sys/compat/linuxkpi/common/include/linux/ieee80211.h
458
IEEE80211_TX_STAT_TX_FILTERED = BIT(10),
sys/compat/linuxkpi/common/include/linux/ieee80211.h
459
IEEE80211_TX_STAT_NOACK_TRANSMITTED = BIT(11),
sys/compat/linuxkpi/common/include/linux/ieee80211.h
460
IEEE80211_TX_CTL_FIRST_FRAGMENT = BIT(12),
sys/compat/linuxkpi/common/include/linux/ieee80211.h
461
IEEE80211_TX_INTFL_DONT_ENCRYPT = BIT(13),
sys/compat/linuxkpi/common/include/linux/ieee80211.h
462
IEEE80211_TX_CTL_NO_CCK_RATE = BIT(14),
sys/compat/linuxkpi/common/include/linux/ieee80211.h
463
IEEE80211_TX_CTL_INJECTED = BIT(15),
sys/compat/linuxkpi/common/include/linux/ieee80211.h
464
IEEE80211_TX_CTL_HW_80211_ENCAP = BIT(16),
sys/compat/linuxkpi/common/include/linux/ieee80211.h
465
IEEE80211_TX_CTL_USE_MINRATE = BIT(17),
sys/compat/linuxkpi/common/include/linux/ieee80211.h
466
IEEE80211_TX_CTL_RATE_CTRL_PROBE = BIT(18),
sys/compat/linuxkpi/common/include/linux/ieee80211.h
467
IEEE80211_TX_CTL_LDPC = BIT(19),
sys/compat/linuxkpi/common/include/linux/ieee80211.h
468
IEEE80211_TX_CTL_STBC = BIT(20),
sys/compat/linuxkpi/common/include/linux/ieee80211.h
472
IEEE80211_TX_STATUS_ACK_SIGNAL_VALID = BIT(0),
sys/compat/linuxkpi/common/include/linux/ieee80211.h
477
IEEE80211_TX_CTRL_PORT_CTRL_PROTO = BIT(0),
sys/compat/linuxkpi/common/include/linux/ieee80211.h
478
IEEE80211_TX_CTRL_PS_RESPONSE = BIT(1),
sys/compat/linuxkpi/common/include/linux/ieee80211.h
479
IEEE80211_TX_CTRL_RATE_INJECT = BIT(2),
sys/compat/linuxkpi/common/include/linux/ieee80211.h
480
IEEE80211_TX_CTRL_DONT_USE_RATE_MASK = BIT(3),
sys/compat/linuxkpi/common/include/linux/ieee80211.h
744
#define IEEE80211_TWT_CONTROL_NEG_TYPE_BROADCAST BIT(3)
sys/compat/linuxkpi/common/include/linux/ieee80211.h
745
#define IEEE80211_TWT_CONTROL_RX_DISABLED BIT(4)
sys/compat/linuxkpi/common/include/linux/ieee80211.h
746
#define IEEE80211_TWT_CONTROL_WAKE_DUR_UNIT BIT(5)
sys/compat/linuxkpi/common/include/linux/ieee80211.h
749
#define IEEE80211_TWT_REQTYPE_SETUP_CMD (BIT(1) | BIT(2) | BIT(3))
sys/compat/linuxkpi/common/include/linux/ieee80211.h
750
#define IEEE80211_TWT_REQTYPE_TRIGGER BIT(4)
sys/compat/linuxkpi/common/include/linux/ieee80211.h
751
#define IEEE80211_TWT_REQTYPE_IMPLICIT BIT(5)
sys/compat/linuxkpi/common/include/linux/ieee80211.h
752
#define IEEE80211_TWT_REQTYPE_FLOWTYPE BIT(6)
sys/compat/linuxkpi/common/include/linux/ieee80211.h
753
#define IEEE80211_TWT_REQTYPE_FLOWID (BIT(7) | BIT(8) | BIT(9))
sys/compat/linuxkpi/common/include/linux/ieee80211.h
754
#define IEEE80211_TWT_REQTYPE_WAKE_INT_EXP (BIT(10) | BIT(11) | BIT(12) | BIT(13) | BIT(14))
sys/compat/linuxkpi/common/include/linux/ieee80211.h
755
#define IEEE80211_TWT_REQTYPE_PROTECTION BIT(15)
sys/compat/linuxkpi/common/include/linux/netdev_features.h
36
#define NETIF_F_HIGHDMA BIT(0) /* Can DMA to high memory. */
sys/compat/linuxkpi/common/include/linux/netdev_features.h
37
#define NETIF_F_SG BIT(1) /* Can do scatter/gather I/O. */
sys/compat/linuxkpi/common/include/linux/netdev_features.h
38
#define NETIF_F_IP_CSUM BIT(2) /* Can csum TCP/UDP on IPv4. */
sys/compat/linuxkpi/common/include/linux/netdev_features.h
39
#define NETIF_F_IPV6_CSUM BIT(3) /* Can csum TCP/UDP on IPv6. */
sys/compat/linuxkpi/common/include/linux/netdev_features.h
40
#define NETIF_F_TSO BIT(4) /* Can do TCP over IPv4 segmentation. */
sys/compat/linuxkpi/common/include/linux/netdev_features.h
41
#define NETIF_F_TSO6 BIT(5) /* Can do TCP over IPv6 segmentation. */
sys/compat/linuxkpi/common/include/linux/netdev_features.h
42
#define NETIF_F_RXCSUM BIT(6) /* Can do receive csum offload. */
sys/compat/linuxkpi/common/include/linux/netdev_features.h
43
#define NETIF_F_HW_CSUM BIT(7) /* Can csum packets (which?). */
sys/compat/linuxkpi/common/include/linux/netdev_features.h
44
#define NETIF_F_HW_TC BIT(8) /* Can offload TC. */
sys/compat/linuxkpi/common/include/linux/nl80211.h
100
NL80211_SCAN_FLAG_ACCEPT_BCAST_PROBE_RESP = BIT(6),
sys/compat/linuxkpi/common/include/linux/nl80211.h
35
NL80211_FEATURE_AP_MODE_CHAN_WIDTH_CHANGE = BIT(0),
sys/compat/linuxkpi/common/include/linux/nl80211.h
36
NL80211_FEATURE_DS_PARAM_SET_IE_IN_PROBES = BIT(1),
sys/compat/linuxkpi/common/include/linux/nl80211.h
37
NL80211_FEATURE_HT_IBSS = BIT(2),
sys/compat/linuxkpi/common/include/linux/nl80211.h
38
NL80211_FEATURE_LOW_PRIORITY_SCAN = BIT(3),
sys/compat/linuxkpi/common/include/linux/nl80211.h
39
NL80211_FEATURE_ND_RANDOM_MAC_ADDR = BIT(4),
sys/compat/linuxkpi/common/include/linux/nl80211.h
40
NL80211_FEATURE_P2P_GO_CTWIN = BIT(5),
sys/compat/linuxkpi/common/include/linux/nl80211.h
41
NL80211_FEATURE_P2P_GO_OPPPS = BIT(6),
sys/compat/linuxkpi/common/include/linux/nl80211.h
42
NL80211_FEATURE_QUIET = BIT(7),
sys/compat/linuxkpi/common/include/linux/nl80211.h
43
NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR = BIT(8),
sys/compat/linuxkpi/common/include/linux/nl80211.h
44
NL80211_FEATURE_SCHED_SCAN_RANDOM_MAC_ADDR = BIT(9),
sys/compat/linuxkpi/common/include/linux/nl80211.h
444
NL80211_RXMGMT_FLAG_EXTERNAL_AUTH = BIT(1),
sys/compat/linuxkpi/common/include/linux/nl80211.h
45
NL80211_FEATURE_DYNAMIC_SMPS = BIT(10),
sys/compat/linuxkpi/common/include/linux/nl80211.h
46
NL80211_FEATURE_STATIC_SMPS = BIT(11),
sys/compat/linuxkpi/common/include/linux/nl80211.h
47
NL80211_FEATURE_SUPPORTS_WMM_ADMISSION = BIT(12),
sys/compat/linuxkpi/common/include/linux/nl80211.h
48
NL80211_FEATURE_TDLS_CHANNEL_SWITCH = BIT(13),
sys/compat/linuxkpi/common/include/linux/nl80211.h
49
NL80211_FEATURE_TX_POWER_INSERTION = BIT(14),
sys/compat/linuxkpi/common/include/linux/nl80211.h
50
NL80211_FEATURE_WFA_TPC_IE_IN_PROBES = BIT(15),
sys/compat/linuxkpi/common/include/linux/nl80211.h
51
NL80211_FEATURE_AP_SCAN = BIT(16),
sys/compat/linuxkpi/common/include/linux/nl80211.h
52
NL80211_FEATURE_ACTIVE_MONITOR = BIT(17),
sys/compat/linuxkpi/common/include/linux/nl80211.h
53
NL80211_FEATURE_SAE = BIT(18),
sys/compat/linuxkpi/common/include/linux/nl80211.h
57
NL80211_PMSR_FTM_FAILURE_NO_RESPONSE = BIT(0),
sys/compat/linuxkpi/common/include/linux/nl80211.h
58
NL80211_PMSR_FTM_FAILURE_PEER_BUSY = BIT(1),
sys/compat/linuxkpi/common/include/linux/nl80211.h
59
NL80211_PMSR_FTM_FAILURE_UNSPECIFIED = BIT(2),
sys/compat/linuxkpi/common/include/linux/nl80211.h
63
NL80211_PMSR_STATUS_FAILURE = BIT(0),
sys/compat/linuxkpi/common/include/linux/nl80211.h
64
NL80211_PMSR_STATUS_SUCCESS = BIT(1),
sys/compat/linuxkpi/common/include/linux/nl80211.h
65
NL80211_PMSR_STATUS_TIMEOUT = BIT(2),
sys/compat/linuxkpi/common/include/linux/nl80211.h
71
NL80211_RRF_AUTO_BW = BIT(0),
sys/compat/linuxkpi/common/include/linux/nl80211.h
72
NL80211_RRF_DFS = BIT(1),
sys/compat/linuxkpi/common/include/linux/nl80211.h
73
NL80211_RRF_GO_CONCURRENT = BIT(2),
sys/compat/linuxkpi/common/include/linux/nl80211.h
74
NL80211_RRF_NO_IR = BIT(3),
sys/compat/linuxkpi/common/include/linux/nl80211.h
75
NL80211_RRF_NO_OUTDOOR = BIT(4),
sys/compat/linuxkpi/common/include/linux/nl80211.h
76
NL80211_RRF_NO_HT40MINUS = BIT(5),
sys/compat/linuxkpi/common/include/linux/nl80211.h
77
NL80211_RRF_NO_HT40PLUS = BIT(6),
sys/compat/linuxkpi/common/include/linux/nl80211.h
78
NL80211_RRF_NO_80MHZ = BIT(7),
sys/compat/linuxkpi/common/include/linux/nl80211.h
79
NL80211_RRF_NO_160MHZ = BIT(8),
sys/compat/linuxkpi/common/include/linux/nl80211.h
80
NL80211_RRF_NO_HE = BIT(9),
sys/compat/linuxkpi/common/include/linux/nl80211.h
81
NL80211_RRF_NO_OFDM = BIT(10),
sys/compat/linuxkpi/common/include/linux/nl80211.h
82
NL80211_RRF_NO_320MHZ = BIT(11),
sys/compat/linuxkpi/common/include/linux/nl80211.h
83
NL80211_RRF_NO_EHT = BIT(12),
sys/compat/linuxkpi/common/include/linux/nl80211.h
84
NL80211_RRF_DFS_CONCURRENT = BIT(13),
sys/compat/linuxkpi/common/include/linux/nl80211.h
85
NL80211_RRF_NO_6GHZ_VLP_CLIENT = BIT(14),
sys/compat/linuxkpi/common/include/linux/nl80211.h
86
NL80211_RRF_NO_6GHZ_AFC_CLIENT = BIT(15),
sys/compat/linuxkpi/common/include/linux/nl80211.h
87
NL80211_RRF_PSD = BIT(16),
sys/compat/linuxkpi/common/include/linux/nl80211.h
88
NL80211_RRF_ALLOW_6GHZ_VLP_AP = BIT(17),
sys/compat/linuxkpi/common/include/linux/nl80211.h
89
NL80211_RRF_ALLOW_20MHZ_ACTIVITY = BIT(18),
sys/compat/linuxkpi/common/include/linux/nl80211.h
94
NL80211_SCAN_FLAG_FILS_MAX_CHANNEL_TIME = BIT(0),
sys/compat/linuxkpi/common/include/linux/nl80211.h
95
NL80211_SCAN_FLAG_OCE_PROBE_REQ_DEFERRAL_SUPPRESSION = BIT(1),
sys/compat/linuxkpi/common/include/linux/nl80211.h
96
NL80211_SCAN_FLAG_OCE_PROBE_REQ_HIGH_TX_RATE = BIT(2),
sys/compat/linuxkpi/common/include/linux/nl80211.h
97
NL80211_SCAN_FLAG_RANDOM_ADDR = BIT(3),
sys/compat/linuxkpi/common/include/linux/nl80211.h
98
NL80211_SCAN_FLAG_COLOCATED_6GHZ = BIT(4),
sys/compat/linuxkpi/common/include/linux/nl80211.h
99
NL80211_SCAN_FLAG_RANDOM_SN = BIT(5),
sys/compat/linuxkpi/common/include/linux/shrinker.h
54
#define SHRINKER_REGISTERED BIT(0)
sys/compat/linuxkpi/common/include/linux/shrinker.h
55
#define SHRINKER_ALLOCATED BIT(1)
sys/compat/linuxkpi/common/include/net/cfg80211.h
1025
WIPHY_BSS_PARAM_AP_ISOLATE = BIT(0),
sys/compat/linuxkpi/common/include/net/cfg80211.h
1065
REGULATORY_CUSTOM_REG = BIT(0),
sys/compat/linuxkpi/common/include/net/cfg80211.h
1066
REGULATORY_STRICT_REG = BIT(1),
sys/compat/linuxkpi/common/include/net/cfg80211.h
1067
REGULATORY_DISABLE_BEACON_HINTS = BIT(2),
sys/compat/linuxkpi/common/include/net/cfg80211.h
1068
REGULATORY_ENABLE_RELAX_NO_IR = BIT(3),
sys/compat/linuxkpi/common/include/net/cfg80211.h
1069
REGULATORY_WIPHY_SELF_MANAGED = BIT(4),
sys/compat/linuxkpi/common/include/net/cfg80211.h
1070
REGULATORY_COUNTRY_IE_IGNORE = BIT(5),
sys/compat/linuxkpi/common/include/net/cfg80211.h
1071
REGULATORY_COUNTRY_IE_FOLLOW_POWER = BIT(6),
sys/compat/linuxkpi/common/include/net/cfg80211.h
1087
WIPHY_FLAG_AP_UAPSD = BIT(0),
sys/compat/linuxkpi/common/include/net/cfg80211.h
1088
WIPHY_FLAG_HAS_CHANNEL_SWITCH = BIT(1),
sys/compat/linuxkpi/common/include/net/cfg80211.h
1089
WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL = BIT(2),
sys/compat/linuxkpi/common/include/net/cfg80211.h
1090
WIPHY_FLAG_HAVE_AP_SME = BIT(3),
sys/compat/linuxkpi/common/include/net/cfg80211.h
1091
WIPHY_FLAG_IBSS_RSN = BIT(4),
sys/compat/linuxkpi/common/include/net/cfg80211.h
1092
WIPHY_FLAG_NETNS_OK = BIT(5),
sys/compat/linuxkpi/common/include/net/cfg80211.h
1093
WIPHY_FLAG_OFFCHAN_TX = BIT(6),
sys/compat/linuxkpi/common/include/net/cfg80211.h
1094
WIPHY_FLAG_PS_ON_BY_DEFAULT = BIT(7),
sys/compat/linuxkpi/common/include/net/cfg80211.h
1095
WIPHY_FLAG_SPLIT_SCAN_6GHZ = BIT(8),
sys/compat/linuxkpi/common/include/net/cfg80211.h
1096
WIPHY_FLAG_SUPPORTS_EXT_KEK_KCK = BIT(9),
sys/compat/linuxkpi/common/include/net/cfg80211.h
1097
WIPHY_FLAG_SUPPORTS_FW_ROAM = BIT(10),
sys/compat/linuxkpi/common/include/net/cfg80211.h
1098
WIPHY_FLAG_SUPPORTS_TDLS = BIT(11),
sys/compat/linuxkpi/common/include/net/cfg80211.h
1099
WIPHY_FLAG_TDLS_EXTERNAL_SETUP = BIT(12),
sys/compat/linuxkpi/common/include/net/cfg80211.h
1100
WIPHY_FLAG_AP_PROBE_RESP_OFFLOAD = BIT(13),
sys/compat/linuxkpi/common/include/net/cfg80211.h
1101
WIPHY_FLAG_4ADDR_AP = BIT(14),
sys/compat/linuxkpi/common/include/net/cfg80211.h
1102
WIPHY_FLAG_4ADDR_STATION = BIT(15),
sys/compat/linuxkpi/common/include/net/cfg80211.h
1103
WIPHY_FLAG_SUPPORTS_MLO = BIT(16),
sys/compat/linuxkpi/common/include/net/cfg80211.h
1104
WIPHY_FLAG_DISABLE_WEXT = BIT(17),
sys/compat/linuxkpi/common/include/net/cfg80211.h
112
IEEE80211_CHAN_DISABLED = BIT(0),
sys/compat/linuxkpi/common/include/net/cfg80211.h
113
IEEE80211_CHAN_INDOOR_ONLY = BIT(1),
sys/compat/linuxkpi/common/include/net/cfg80211.h
114
IEEE80211_CHAN_IR_CONCURRENT = BIT(2),
sys/compat/linuxkpi/common/include/net/cfg80211.h
115
IEEE80211_CHAN_RADAR = BIT(3),
sys/compat/linuxkpi/common/include/net/cfg80211.h
116
IEEE80211_CHAN_NO_IR = BIT(4),
sys/compat/linuxkpi/common/include/net/cfg80211.h
117
IEEE80211_CHAN_NO_HT40MINUS = BIT(5),
sys/compat/linuxkpi/common/include/net/cfg80211.h
118
IEEE80211_CHAN_NO_HT40PLUS = BIT(6),
sys/compat/linuxkpi/common/include/net/cfg80211.h
119
IEEE80211_CHAN_NO_80MHZ = BIT(7),
sys/compat/linuxkpi/common/include/net/cfg80211.h
120
IEEE80211_CHAN_NO_160MHZ = BIT(8),
sys/compat/linuxkpi/common/include/net/cfg80211.h
121
IEEE80211_CHAN_NO_OFDM = BIT(9),
sys/compat/linuxkpi/common/include/net/cfg80211.h
122
IEEE80211_CHAN_NO_6GHZ_VLP_CLIENT = BIT(10),
sys/compat/linuxkpi/common/include/net/cfg80211.h
123
IEEE80211_CHAN_NO_6GHZ_AFC_CLIENT = BIT(11),
sys/compat/linuxkpi/common/include/net/cfg80211.h
124
IEEE80211_CHAN_PSD = BIT(12),
sys/compat/linuxkpi/common/include/net/cfg80211.h
125
IEEE80211_CHAN_ALLOW_6GHZ_VLP_AP = BIT(13),
sys/compat/linuxkpi/common/include/net/cfg80211.h
126
IEEE80211_CHAN_CAN_MONITOR = BIT(14),
sys/compat/linuxkpi/common/include/net/cfg80211.h
127
IEEE80211_CHAN_NO_EHT = BIT(15),
sys/compat/linuxkpi/common/include/net/cfg80211.h
2089
if (iftype_data->types_mask & BIT(iftype))
sys/compat/linuxkpi/common/include/net/cfg80211.h
68
RFKILL_HARD_BLOCK_NOT_OWNER = BIT(0),
sys/compat/linuxkpi/common/include/net/cfg80211.h
83
RATE_INFO_FLAGS_MCS = BIT(0),
sys/compat/linuxkpi/common/include/net/cfg80211.h
84
RATE_INFO_FLAGS_VHT_MCS = BIT(1),
sys/compat/linuxkpi/common/include/net/cfg80211.h
85
RATE_INFO_FLAGS_SHORT_GI = BIT(2),
sys/compat/linuxkpi/common/include/net/cfg80211.h
86
RATE_INFO_FLAGS_HE_MCS = BIT(4),
sys/compat/linuxkpi/common/include/net/cfg80211.h
87
RATE_INFO_FLAGS_EHT_MCS = BIT(7),
sys/compat/linuxkpi/common/include/net/mac80211.h
100
BSS_CHANGED_BEACON_ENABLED = BIT(4),
sys/compat/linuxkpi/common/include/net/mac80211.h
101
BSS_CHANGED_BEACON_INFO = BIT(5),
sys/compat/linuxkpi/common/include/net/mac80211.h
102
BSS_CHANGED_BEACON_INT = BIT(6),
sys/compat/linuxkpi/common/include/net/mac80211.h
103
BSS_CHANGED_BSSID = BIT(7),
sys/compat/linuxkpi/common/include/net/mac80211.h
104
BSS_CHANGED_CQM = BIT(8),
sys/compat/linuxkpi/common/include/net/mac80211.h
105
BSS_CHANGED_ERP_CTS_PROT = BIT(9),
sys/compat/linuxkpi/common/include/net/mac80211.h
106
BSS_CHANGED_ERP_SLOT = BIT(10),
sys/compat/linuxkpi/common/include/net/mac80211.h
107
BSS_CHANGED_FTM_RESPONDER = BIT(11),
sys/compat/linuxkpi/common/include/net/mac80211.h
108
BSS_CHANGED_HT = BIT(12),
sys/compat/linuxkpi/common/include/net/mac80211.h
109
BSS_CHANGED_IDLE = BIT(13),
sys/compat/linuxkpi/common/include/net/mac80211.h
110
BSS_CHANGED_MU_GROUPS = BIT(14),
sys/compat/linuxkpi/common/include/net/mac80211.h
111
BSS_CHANGED_P2P_PS = BIT(15),
sys/compat/linuxkpi/common/include/net/mac80211.h
112
BSS_CHANGED_PS = BIT(16),
sys/compat/linuxkpi/common/include/net/mac80211.h
113
BSS_CHANGED_QOS = BIT(17),
sys/compat/linuxkpi/common/include/net/mac80211.h
114
BSS_CHANGED_TXPOWER = BIT(18),
sys/compat/linuxkpi/common/include/net/mac80211.h
115
BSS_CHANGED_HE_BSS_COLOR = BIT(19),
sys/compat/linuxkpi/common/include/net/mac80211.h
116
BSS_CHANGED_AP_PROBE_RESP = BIT(20),
sys/compat/linuxkpi/common/include/net/mac80211.h
117
BSS_CHANGED_BASIC_RATES = BIT(21),
sys/compat/linuxkpi/common/include/net/mac80211.h
118
BSS_CHANGED_ERP_PREAMBLE = BIT(22),
sys/compat/linuxkpi/common/include/net/mac80211.h
119
BSS_CHANGED_IBSS = BIT(23),
sys/compat/linuxkpi/common/include/net/mac80211.h
120
BSS_CHANGED_MCAST_RATE = BIT(24),
sys/compat/linuxkpi/common/include/net/mac80211.h
121
BSS_CHANGED_SSID = BIT(25),
sys/compat/linuxkpi/common/include/net/mac80211.h
122
BSS_CHANGED_FILS_DISCOVERY = BIT(26),
sys/compat/linuxkpi/common/include/net/mac80211.h
123
BSS_CHANGED_HE_OBSS_PD = BIT(27),
sys/compat/linuxkpi/common/include/net/mac80211.h
124
BSS_CHANGED_TWT = BIT(28),
sys/compat/linuxkpi/common/include/net/mac80211.h
125
BSS_CHANGED_UNSOL_BCAST_PROBE_RESP = BIT(30),
sys/compat/linuxkpi/common/include/net/mac80211.h
126
BSS_CHANGED_EHT_PUNCTURING = BIT(31),
sys/compat/linuxkpi/common/include/net/mac80211.h
1323
((_vif)->active_links & BIT(_linkid)) != 0) && \
sys/compat/linuxkpi/common/include/net/mac80211.h
1329
((_vif)->active_links & BIT(_linkid)) != 0) && \
sys/compat/linuxkpi/common/include/net/mac80211.h
2606
return (vif->active_links & BIT(link_id));
sys/compat/linuxkpi/common/include/net/mac80211.h
519
IEEE80211_KEY_FLAG_GENERATE_IV = BIT(0),
sys/compat/linuxkpi/common/include/net/mac80211.h
520
IEEE80211_KEY_FLAG_GENERATE_MMIC = BIT(1),
sys/compat/linuxkpi/common/include/net/mac80211.h
521
IEEE80211_KEY_FLAG_PAIRWISE = BIT(2),
sys/compat/linuxkpi/common/include/net/mac80211.h
522
IEEE80211_KEY_FLAG_PUT_IV_SPACE = BIT(3),
sys/compat/linuxkpi/common/include/net/mac80211.h
523
IEEE80211_KEY_FLAG_PUT_MIC_SPACE = BIT(4),
sys/compat/linuxkpi/common/include/net/mac80211.h
524
IEEE80211_KEY_FLAG_SW_MGMT_TX = BIT(5),
sys/compat/linuxkpi/common/include/net/mac80211.h
525
IEEE80211_KEY_FLAG_GENERATE_IV_MGMT = BIT(6),
sys/compat/linuxkpi/common/include/net/mac80211.h
526
IEEE80211_KEY_FLAG_GENERATE_MMIE = BIT(7),
sys/compat/linuxkpi/common/include/net/mac80211.h
527
IEEE80211_KEY_FLAG_RESERVE_TAILROOM = BIT(8),
sys/compat/linuxkpi/common/include/net/mac80211.h
528
IEEE80211_KEY_FLAG_SPP_AMSDU = BIT(9),
sys/compat/linuxkpi/common/include/net/mac80211.h
580
RX_FLAG_ALLOW_SAME_PN = BIT(0),
sys/compat/linuxkpi/common/include/net/mac80211.h
581
RX_FLAG_AMPDU_DETAILS = BIT(1),
sys/compat/linuxkpi/common/include/net/mac80211.h
582
RX_FLAG_AMPDU_EOF_BIT = BIT(2),
sys/compat/linuxkpi/common/include/net/mac80211.h
583
RX_FLAG_AMPDU_EOF_BIT_KNOWN = BIT(3),
sys/compat/linuxkpi/common/include/net/mac80211.h
584
RX_FLAG_DECRYPTED = BIT(4),
sys/compat/linuxkpi/common/include/net/mac80211.h
585
RX_FLAG_DUP_VALIDATED = BIT(5),
sys/compat/linuxkpi/common/include/net/mac80211.h
586
RX_FLAG_FAILED_FCS_CRC = BIT(6),
sys/compat/linuxkpi/common/include/net/mac80211.h
587
RX_FLAG_ICV_STRIPPED = BIT(7),
sys/compat/linuxkpi/common/include/net/mac80211.h
588
RX_FLAG_MACTIME = BIT(8) | BIT(9),
sys/compat/linuxkpi/common/include/net/mac80211.h
592
RX_FLAG_MIC_STRIPPED = BIT(10),
sys/compat/linuxkpi/common/include/net/mac80211.h
593
RX_FLAG_MMIC_ERROR = BIT(11),
sys/compat/linuxkpi/common/include/net/mac80211.h
594
RX_FLAG_MMIC_STRIPPED = BIT(12),
sys/compat/linuxkpi/common/include/net/mac80211.h
595
RX_FLAG_NO_PSDU = BIT(13),
sys/compat/linuxkpi/common/include/net/mac80211.h
596
RX_FLAG_PN_VALIDATED = BIT(14),
sys/compat/linuxkpi/common/include/net/mac80211.h
597
RX_FLAG_RADIOTAP_HE = BIT(15),
sys/compat/linuxkpi/common/include/net/mac80211.h
598
RX_FLAG_RADIOTAP_HE_MU = BIT(16),
sys/compat/linuxkpi/common/include/net/mac80211.h
599
RX_FLAG_RADIOTAP_LSIG = BIT(17),
sys/compat/linuxkpi/common/include/net/mac80211.h
60
IEEE80211_CONF_IDLE = BIT(0),
sys/compat/linuxkpi/common/include/net/mac80211.h
600
RX_FLAG_RADIOTAP_VENDOR_DATA = BIT(18),
sys/compat/linuxkpi/common/include/net/mac80211.h
601
RX_FLAG_NO_SIGNAL_VAL = BIT(19),
sys/compat/linuxkpi/common/include/net/mac80211.h
602
RX_FLAG_IV_STRIPPED = BIT(20),
sys/compat/linuxkpi/common/include/net/mac80211.h
603
RX_FLAG_AMPDU_IS_LAST = BIT(21),
sys/compat/linuxkpi/common/include/net/mac80211.h
604
RX_FLAG_AMPDU_LAST_KNOWN = BIT(22),
sys/compat/linuxkpi/common/include/net/mac80211.h
605
RX_FLAG_AMSDU_MORE = BIT(23),
sys/compat/linuxkpi/common/include/net/mac80211.h
607
RX_FLAG_ONLY_MONITOR = BIT(25),
sys/compat/linuxkpi/common/include/net/mac80211.h
608
RX_FLAG_SKIP_MONITOR = BIT(26),
sys/compat/linuxkpi/common/include/net/mac80211.h
609
RX_FLAG_8023 = BIT(27),
sys/compat/linuxkpi/common/include/net/mac80211.h
61
IEEE80211_CONF_PS = BIT(1),
sys/compat/linuxkpi/common/include/net/mac80211.h
610
RX_FLAG_RADIOTAP_TLV_AT_END = BIT(28),
sys/compat/linuxkpi/common/include/net/mac80211.h
612
RX_FLAG_MACTIME_IS_RTAP_TS64 = BIT(30),
sys/compat/linuxkpi/common/include/net/mac80211.h
613
RX_FLAG_FAILED_PLCP_CRC = BIT(31),
sys/compat/linuxkpi/common/include/net/mac80211.h
62
IEEE80211_CONF_MONITOR = BIT(2),
sys/compat/linuxkpi/common/include/net/mac80211.h
63
IEEE80211_CONF_OFFCHANNEL = BIT(3),
sys/compat/linuxkpi/common/include/net/mac80211.h
68
IEEE80211_CONF_CHANGE_CHANNEL = BIT(0),
sys/compat/linuxkpi/common/include/net/mac80211.h
69
IEEE80211_CONF_CHANGE_IDLE = BIT(1),
sys/compat/linuxkpi/common/include/net/mac80211.h
70
IEEE80211_CONF_CHANGE_PS = BIT(2),
sys/compat/linuxkpi/common/include/net/mac80211.h
71
IEEE80211_CONF_CHANGE_MONITOR = BIT(3),
sys/compat/linuxkpi/common/include/net/mac80211.h
72
IEEE80211_CONF_CHANGE_POWER = BIT(4),
sys/compat/linuxkpi/common/include/net/mac80211.h
792
IEEE80211_TX_RC_40_MHZ_WIDTH = BIT(0),
sys/compat/linuxkpi/common/include/net/mac80211.h
793
IEEE80211_TX_RC_80_MHZ_WIDTH = BIT(1),
sys/compat/linuxkpi/common/include/net/mac80211.h
794
IEEE80211_TX_RC_160_MHZ_WIDTH = BIT(2),
sys/compat/linuxkpi/common/include/net/mac80211.h
795
IEEE80211_TX_RC_GREEN_FIELD = BIT(3),
sys/compat/linuxkpi/common/include/net/mac80211.h
796
IEEE80211_TX_RC_MCS = BIT(4),
sys/compat/linuxkpi/common/include/net/mac80211.h
797
IEEE80211_TX_RC_SHORT_GI = BIT(5),
sys/compat/linuxkpi/common/include/net/mac80211.h
798
IEEE80211_TX_RC_VHT_MCS = BIT(6),
sys/compat/linuxkpi/common/include/net/mac80211.h
799
IEEE80211_TX_RC_USE_SHORT_PREAMBLE = BIT(7),
sys/compat/linuxkpi/common/include/net/mac80211.h
809
IEEE80211_VIF_BEACON_FILTER = BIT(0),
sys/compat/linuxkpi/common/include/net/mac80211.h
810
IEEE80211_VIF_SUPPORTS_CQM_RSSI = BIT(1),
sys/compat/linuxkpi/common/include/net/mac80211.h
811
IEEE80211_VIF_SUPPORTS_UAPSD = BIT(2),
sys/compat/linuxkpi/common/include/net/mac80211.h
813
IEEE80211_VIF_DISABLE_SMPS_OVERRIDE = BIT(3), /* Renamed to IEEE80211_VIF_EML_ACTIVE. */
sys/compat/linuxkpi/common/include/net/mac80211.h
815
IEEE80211_VIF_EML_ACTIVE = BIT(4),
sys/compat/linuxkpi/common/include/net/mac80211.h
816
IEEE80211_VIF_IGNORE_OFDMA_WIDER_BW = BIT(5),
sys/compat/linuxkpi/common/include/net/mac80211.h
817
IEEE80211_VIF_REMOVE_AP_AFTER_DISASSOC = BIT(6),
sys/compat/linuxkpi/common/include/net/mac80211.h
82
FIF_ALLMULTI = BIT(0),
sys/compat/linuxkpi/common/include/net/mac80211.h
83
FIF_PROBE_REQ = BIT(1),
sys/compat/linuxkpi/common/include/net/mac80211.h
84
FIF_BCN_PRBRESP_PROMISC = BIT(2),
sys/compat/linuxkpi/common/include/net/mac80211.h
85
FIF_FCSFAIL = BIT(3),
sys/compat/linuxkpi/common/include/net/mac80211.h
86
FIF_OTHER_BSS = BIT(4),
sys/compat/linuxkpi/common/include/net/mac80211.h
87
FIF_PSPOLL = BIT(5),
sys/compat/linuxkpi/common/include/net/mac80211.h
88
FIF_CONTROL = BIT(6),
sys/compat/linuxkpi/common/include/net/mac80211.h
89
FIF_MCAST_ACTION = BIT(7),
sys/compat/linuxkpi/common/include/net/mac80211.h
92
FIF_FLAGS_MASK = BIT(8)-1,
sys/compat/linuxkpi/common/include/net/mac80211.h
925
IEEE80211_IFACE_ITER_NORMAL = BIT(0),
sys/compat/linuxkpi/common/include/net/mac80211.h
926
IEEE80211_IFACE_ITER_RESUME_ALL = BIT(1),
sys/compat/linuxkpi/common/include/net/mac80211.h
927
IEEE80211_IFACE_SKIP_SDATA_NOT_IN_DRIVER = BIT(2), /* seems to be an iter flag */
sys/compat/linuxkpi/common/include/net/mac80211.h
928
IEEE80211_IFACE_ITER_ACTIVE = BIT(3),
sys/compat/linuxkpi/common/include/net/mac80211.h
931
IEEE80211_IFACE_ITER__ATOMIC = BIT(6),
sys/compat/linuxkpi/common/include/net/mac80211.h
932
IEEE80211_IFACE_ITER__MTX = BIT(8),
sys/compat/linuxkpi/common/include/net/mac80211.h
942
RX_ENC_FLAG_SHORTPRE = BIT(0),
sys/compat/linuxkpi/common/include/net/mac80211.h
943
RX_ENC_FLAG_SHORT_GI = BIT(2),
sys/compat/linuxkpi/common/include/net/mac80211.h
944
RX_ENC_FLAG_HT_GF = BIT(3),
sys/compat/linuxkpi/common/include/net/mac80211.h
945
RX_ENC_FLAG_STBC_MASK = BIT(4) | BIT(5),
sys/compat/linuxkpi/common/include/net/mac80211.h
947
RX_ENC_FLAG_LDPC = BIT(6),
sys/compat/linuxkpi/common/include/net/mac80211.h
948
RX_ENC_FLAG_BF = BIT(7),
sys/compat/linuxkpi/common/include/net/mac80211.h
96
BSS_CHANGED_ARP_FILTER = BIT(0),
sys/compat/linuxkpi/common/include/net/mac80211.h
97
BSS_CHANGED_ASSOC = BIT(1),
sys/compat/linuxkpi/common/include/net/mac80211.h
98
BSS_CHANGED_BANDWIDTH = BIT(2),
sys/compat/linuxkpi/common/include/net/mac80211.h
99
BSS_CHANGED_BEACON = BIT(3),
sys/compat/linuxkpi/common/include/net/page_pool/types.h
32
#define PP_FLAG_DMA_MAP BIT(0)
sys/compat/linuxkpi/common/include/net/page_pool/types.h
33
#define PP_FLAG_DMA_SYNC_DEV BIT(1)
sys/compat/linuxkpi/common/include/net/page_pool/types.h
34
#define PP_FLAG_PAGE_FRAG BIT(2)
sys/compat/linuxkpi/common/src/linux_80211.c
356
if (!(sinfo.chains & BIT(i)))
sys/compat/linuxkpi/common/src/linux_80211.c
7247
if (!(rx_status->chains & BIT(i)))
sys/compat/linuxkpi/common/src/linux_80211.c
920
sta->deflink.supp_rates[band] |= BIT(i);
sys/compat/linuxkpi/common/src/linux_hdmi.c
145
ptr[0] |= BIT(4);
sys/compat/linuxkpi/common/src/linux_hdmi.c
149
ptr[0] |= BIT(3);
sys/compat/linuxkpi/common/src/linux_hdmi.c
152
ptr[0] |= BIT(2);
sys/compat/linuxkpi/common/src/linux_hdmi.c
163
ptr[2] |= BIT(7);
sys/compat/linuxkpi/common/src/linux_hdmi.c
412
buffer[4] |= BIT(7);
sys/compat/linuxkpi/common/src/linux_netdev.c
114
if ((old & BIT(LKPI_NAPI_FLAG_DISABLE_PENDING)) != 0) {
sys/compat/linuxkpi/common/src/linux_netdev.c
121
if ((old & BIT(LKPI_NAPI_FLAG_IS_SCHEDULED)) != 0)
sys/compat/linuxkpi/common/src/linux_netdev.c
122
new |= BIT(LKPI_NAPI_FLAG_LOST_RACE_TRY_AGAIN);
sys/compat/linuxkpi/common/src/linux_netdev.c
123
new |= BIT(LKPI_NAPI_FLAG_IS_SCHEDULED);
sys/compat/linuxkpi/common/src/linux_netdev.c
128
return ((old & BIT(LKPI_NAPI_FLAG_IS_SCHEDULED)) == 0);
sys/crypto/skein/skein.h
152
#define SKEIN_T1_BIT(BIT) ((BIT) - 64) /* offset 64 because it's the second word */
sys/ddb/db_lex.h
69
#ifndef BIT
sys/ddb/db_lex.h
73
DRT_WSPACE = BIT(_DRT_WSPACE),
sys/ddb/db_lex.h
74
DRT_HEX = BIT(_DRT_HEX),
sys/dev/alc/if_alcreg.h
1128
#define MT_MODE_4Q BIT(0)
sys/dev/amdgpio/amdgpio.c
233
val &= ~BIT(OUTPUT_ENABLE_OFF);
sys/dev/amdgpio/amdgpio.c
235
val |= BIT(OUTPUT_ENABLE_OFF);
sys/dev/amdgpio/amdgpio.c
237
val &= ~(BIT(PULL_DOWN_ENABLE_OFF) | BIT(PULL_UP_ENABLE_OFF));
sys/dev/amdgpio/amdgpio.c
240
val |= BIT(PULL_DOWN_ENABLE_OFF);
sys/dev/amdgpio/amdgpio.c
242
val |= BIT(PULL_UP_ENABLE_OFF);
sys/dev/amdgpio/amdgpio.c
275
if (val & BIT(OUTPUT_VALUE_OFF))
sys/dev/amdgpio/amdgpio.c
280
if (val & BIT(PIN_STS_OFF))
sys/dev/amdgpio/amdgpio.c
314
val &= ~BIT(OUTPUT_VALUE_OFF);
sys/dev/amdgpio/amdgpio.c
316
val |= BIT(OUTPUT_VALUE_OFF);
sys/dev/amdgpio/amdgpio.c
348
val = val ^ BIT(OUTPUT_VALUE_OFF);
sys/dev/amdgpio/amdgpio.c
91
if (val & BIT(OUTPUT_ENABLE_OFF))
sys/dev/aq/aq_dbg.c
55
(BIT(BIT_BEGIN - BIT_END + 1) -1))
sys/dev/aq/aq_fw.h
52
aq_fw_fc_ENABLE_RX = BIT(0),
sys/dev/aq/aq_fw.h
53
aq_fw_fc_ENABLE_TX = BIT(1),
sys/dev/aq/aq_hw.h
261
HW_ATL_RX_ENABLE_UNICAST_MNGNT_QUEUE_L2 = BIT(19),
sys/dev/aq/aq_hw.h
262
HW_ATL_RX_ENABLE_UNICAST_FLTR_L2 = BIT(31)
sys/dev/aq/aq_hw.h
283
HW_ATL_RX_ENABLE_MNGMNT_QUEUE_L3L4 = BIT(22),
sys/dev/aq/aq_hw.h
284
HW_ATL_RX_ENABLE_QUEUE_L3L4 = BIT(23),
sys/dev/aq/aq_hw.h
285
HW_ATL_RX_ENABLE_ARP_FLTR_L3 = BIT(24),
sys/dev/aq/aq_hw.h
286
HW_ATL_RX_ENABLE_CMP_PROT_L4 = BIT(25),
sys/dev/aq/aq_hw.h
287
HW_ATL_RX_ENABLE_CMP_DEST_PORT_L4 = BIT(26),
sys/dev/aq/aq_hw.h
288
HW_ATL_RX_ENABLE_CMP_SRC_PORT_L4 = BIT(27),
sys/dev/aq/aq_hw.h
289
HW_ATL_RX_ENABLE_CMP_DEST_ADDR_L3 = BIT(28),
sys/dev/aq/aq_hw.h
290
HW_ATL_RX_ENABLE_CMP_SRC_ADDR_L3 = BIT(29),
sys/dev/aq/aq_hw.h
291
HW_ATL_RX_ENABLE_L3_IPv6 = BIT(30),
sys/dev/aq/aq_hw.h
292
HW_ATL_RX_ENABLE_FLTR_L3L4 = BIT(31)
sys/dev/aq/aq_irq.c
167
itr_irq_status_clearlsw_set(hw, BIT(ring->msix));
sys/dev/aq/aq_main.c
934
itr_irq_msk_setlsw_set(hw, BIT(softc->msix + 1) - 1);
sys/dev/aq/aq_main.c
948
itr_irq_msk_clearlsw_set(hw, BIT(softc->msix + 1) - 1);
sys/dev/aq/aq_main.c
961
itr_irq_msk_setlsw_set(hw, BIT(softc->rx_rings[rxqid]->msix));
sys/dev/aq/aq_ring.c
316
if (rx_desc->wb.rx_cntl & BIT(0)) { // IPv4 csum checked
sys/dev/aq/aq_ring.c
318
if (!(rx_desc->wb.rx_stat & BIT(1)))
sys/dev/aq/aq_ring.c
322
if (rx_desc->wb.rx_cntl & BIT(1)) { // TCP/UDP csum checked
sys/dev/aq/aq_ring.c
324
if (!(rx_desc->wb.rx_stat & BIT(2)) && // L4 csum error
sys/dev/aq/aq_ring.c
325
(rx_desc->wb.rx_stat & BIT(3))) { // L4 csum valid
sys/dev/aq/aq_ring.c
364
if ((rx_desc->wb.rx_stat & BIT(0)) != 0) {
sys/dev/axgbe/xgbe-common.h
1385
#define MDIO_VEND2_CTRL1_AN_ENABLE BIT(12)
sys/dev/axgbe/xgbe-common.h
1389
#define MDIO_VEND2_CTRL1_AN_RESTART BIT(9)
sys/dev/axgbe/xgbe-common.h
1393
#define MDIO_VEND2_CTRL1_SS6 BIT(6)
sys/dev/axgbe/xgbe-common.h
1397
#define MDIO_VEND2_CTRL1_SS13 BIT(13)
sys/dev/axgbe/xgbe-common.h
1401
#define XGBE_AN_CL73_INT_CMPLT BIT(0)
sys/dev/axgbe/xgbe-common.h
1402
#define XGBE_AN_CL73_INC_LINK BIT(1)
sys/dev/axgbe/xgbe-common.h
1403
#define XGBE_AN_CL73_PG_RCV BIT(2)
sys/dev/axgbe/xgbe-common.h
1407
#define XGBE_XNP_ACK_PROCESSED BIT(12)
sys/dev/axgbe/xgbe-common.h
1408
#define XGBE_XNP_MP_FORMATTED BIT(13)
sys/dev/axgbe/xgbe-common.h
1409
#define XGBE_XNP_NP_EXCHANGE BIT(15)
sys/dev/axgbe/xgbe-common.h
1411
#define XGBE_KR_TRAINING_START BIT(0)
sys/dev/axgbe/xgbe-common.h
1412
#define XGBE_KR_TRAINING_ENABLE BIT(1)
sys/dev/axgbe/xgbe-common.h
1414
#define XGBE_PCS_CL37_BP BIT(12)
sys/dev/axgbe/xgbe-common.h
1418
#define XGBE_AN_CL37_INT_CMPLT BIT(0)
sys/dev/axgbe/xgbe-common.h
1434
#define XGBE_PMA_PLL_CTRL_MASK BIT(15)
sys/dev/axgbe/xgbe-common.h
1435
#define XGBE_PMA_PLL_CTRL_ENABLE BIT(15)
sys/dev/axgbe/xgbe-common.h
1438
#define XGBE_PMA_RX_RST_0_MASK BIT(4)
sys/dev/axgbe/xgbe-i2c.c
123
#define XGBE_INTR_RX_FULL BIT(IC_RAW_INTR_STAT_RX_FULL_INDEX)
sys/dev/axgbe/xgbe-i2c.c
124
#define XGBE_INTR_TX_EMPTY BIT(IC_RAW_INTR_STAT_TX_EMPTY_INDEX)
sys/dev/axgbe/xgbe-i2c.c
125
#define XGBE_INTR_TX_ABRT BIT(IC_RAW_INTR_STAT_TX_ABRT_INDEX)
sys/dev/axgbe/xgbe-i2c.c
126
#define XGBE_INTR_STOP_DET BIT(IC_RAW_INTR_STAT_STOP_DET_INDEX)
sys/dev/axgbe/xgbe-i2c.c
132
#define XGBE_I2C_READ BIT(8)
sys/dev/axgbe/xgbe-i2c.c
133
#define XGBE_I2C_STOP BIT(9)
sys/dev/axgbe/xgbe-phy-v2.c
120
#define XGBE_PHY_PORT_SPEED_100 BIT(0)
sys/dev/axgbe/xgbe-phy-v2.c
121
#define XGBE_PHY_PORT_SPEED_1000 BIT(1)
sys/dev/axgbe/xgbe-phy-v2.c
122
#define XGBE_PHY_PORT_SPEED_2500 BIT(2)
sys/dev/axgbe/xgbe-phy-v2.c
123
#define XGBE_PHY_PORT_SPEED_10000 BIT(3)
sys/dev/axgbe/xgbe-phy-v2.c
137
#define XGBE_GPIO_NO_TX_FAULT BIT(0)
sys/dev/axgbe/xgbe-phy-v2.c
138
#define XGBE_GPIO_NO_RATE_SELECT BIT(1)
sys/dev/axgbe/xgbe-phy-v2.c
139
#define XGBE_GPIO_NO_MOD_ABSENT BIT(2)
sys/dev/axgbe/xgbe-phy-v2.c
140
#define XGBE_GPIO_NO_RX_LOS BIT(3)
sys/dev/axgbe/xgbe-phy-v2.c
229
#define XGBE_SFP_BASE_10GBE_CC_SR BIT(4)
sys/dev/axgbe/xgbe-phy-v2.c
230
#define XGBE_SFP_BASE_10GBE_CC_LR BIT(5)
sys/dev/axgbe/xgbe-phy-v2.c
231
#define XGBE_SFP_BASE_10GBE_CC_LRM BIT(6)
sys/dev/axgbe/xgbe-phy-v2.c
232
#define XGBE_SFP_BASE_10GBE_CC_ER BIT(7)
sys/dev/axgbe/xgbe-phy-v2.c
235
#define XGBE_SFP_BASE_1GBE_CC_SX BIT(0)
sys/dev/axgbe/xgbe-phy-v2.c
236
#define XGBE_SFP_BASE_1GBE_CC_LX BIT(1)
sys/dev/axgbe/xgbe-phy-v2.c
237
#define XGBE_SFP_BASE_1GBE_CC_CX BIT(2)
sys/dev/axgbe/xgbe-phy-v2.c
238
#define XGBE_SFP_BASE_1GBE_CC_T BIT(3)
sys/dev/axgbe/xgbe-phy-v2.c
239
#define XGBE_SFP_BASE_100M_CC_LX10 BIT(4)
sys/dev/axgbe/xgbe-phy-v2.c
240
#define XGBE_SFP_BASE_100M_CC_FX BIT(5)
sys/dev/axgbe/xgbe-phy-v2.c
241
#define XGBE_SFP_BASE_CC_BX10 BIT(6)
sys/dev/axgbe/xgbe-phy-v2.c
242
#define XGBE_SFP_BASE_CC_PX BIT(7)
sys/dev/axgbe/xgbe-phy-v2.c
245
#define XGBE_SFP_BASE_CABLE_PASSIVE BIT(2)
sys/dev/axgbe/xgbe-phy-v2.c
246
#define XGBE_SFP_BASE_CABLE_ACTIVE BIT(3)
sys/dev/axgbe/xgbe-phy-v2.c
289
#define XGBE_SFP_EXTD_OPT1_RX_LOS BIT(1)
sys/dev/axgbe/xgbe-phy-v2.c
290
#define XGBE_SFP_EXTD_OPT1_TX_FAULT BIT(3)
sys/dev/axgbe/xgbe-phy-v2.c
293
#define XGBE_SFP_EXTD_DIAG_ADDR_CHANGE BIT(2)
sys/dev/axgbe/xgbe.h
300
#define XGBE_SGMII_AN_LINK_STATUS BIT(1)
sys/dev/axgbe/xgbe.h
301
#define XGBE_SGMII_AN_LINK_SPEED (BIT(2) | BIT(3))
sys/dev/axgbe/xgbe.h
304
#define XGBE_SGMII_AN_LINK_DUPLEX BIT(4)
sys/dev/axgbe/xgbe.h
314
#define XGBE_SGMII_AN_LINK_STATUS BIT(1)
sys/dev/axgbe/xgbe.h
315
#define XGBE_SGMII_AN_LINK_SPEED (BIT(2) | BIT(3))
sys/dev/axgbe/xgbe.h
318
#define XGBE_SGMII_AN_LINK_DUPLEX BIT(4)
sys/dev/bnxt/bnxt_re/bnxt_re.h
81
#define BNXT_RE_PAGE_SIZE_4K BIT(BNXT_RE_PAGE_SHIFT_4K)
sys/dev/bnxt/bnxt_re/bnxt_re.h
82
#define BNXT_RE_PAGE_SIZE_8K BIT(BNXT_RE_PAGE_SHIFT_8K)
sys/dev/bnxt/bnxt_re/bnxt_re.h
83
#define BNXT_RE_PAGE_SIZE_64K BIT(BNXT_RE_PAGE_SHIFT_64K)
sys/dev/bnxt/bnxt_re/bnxt_re.h
84
#define BNXT_RE_PAGE_SIZE_2M BIT(BNXT_RE_PAGE_SHIFT_2M)
sys/dev/bnxt/bnxt_re/bnxt_re.h
85
#define BNXT_RE_PAGE_SIZE_8M BIT(BNXT_RE_PAGE_SHIFT_8M)
sys/dev/bnxt/bnxt_re/bnxt_re.h
86
#define BNXT_RE_PAGE_SIZE_1G BIT(BNXT_RE_PAGE_SHIFT_1G)
sys/dev/bnxt/bnxt_re/bnxt_re.h
88
#define BNXT_RE_MAX_MR_SIZE_LOW BIT(BNXT_RE_PAGE_SHIFT_1G)
sys/dev/bnxt/bnxt_re/bnxt_re.h
89
#define BNXT_RE_MAX_MR_SIZE_HIGH BIT(39)
sys/dev/bnxt/bnxt_re/ib_verbs.c
5124
npages = ALIGN(length, BIT(page_shift)) / BIT(page_shift);
sys/dev/bnxt/bnxt_re/ib_verbs.c
5125
if (start % BIT(page_shift))
sys/dev/bnxt/bnxt_re/ib_verbs.c
5212
mrinfo.sg.pgsize = BIT(page_shift);
sys/dev/bnxt/bnxt_re/ib_verbs.c
5289
mrinfo.sg.pgsize = BIT(page_shift);
sys/dev/bnxt/bnxt_re/main.c
1746
BIT(HWRM_ASYNC_EVENT_CMPL_EVENT_ID_DCB_CONFIG_CHANGE) |
sys/dev/bnxt/bnxt_re/main.c
1747
BIT(HWRM_ASYNC_EVENT_CMPL_EVENT_ID_RESET_NOTIFY);
sys/dev/bnxt/bnxt_re/main.c
1750
BIT(HWRM_ASYNC_EVENT_CMPL_EVENT_ID_ERROR_REPORT - 64);
sys/dev/bnxt/bnxt_re/main.c
1752
BIT(HWRM_ASYNC_EVENT_CMPL_EVENT_ID_DOORBELL_PACING_THRESHOLD - 64) |
sys/dev/bnxt/bnxt_re/main.c
1753
BIT(HWRM_ASYNC_EVENT_CMPL_EVENT_ID_DOORBELL_PACING_NQ_UPDATE - 64);
sys/dev/bnxt/bnxt_re/qplib_rcfw.c
378
cmdq_prod |= BIT(FIRMWARE_FIRST_FLAG);
sys/dev/bnxt/bnxt_re/qplib_res.c
282
if (npages % BIT(MAX_PBL_LVL_1_PGS_SHIFT))
sys/dev/bnxt/bnxt_re/qplib_res.c
285
if(npbl % BIT(MAX_PDL_LVL_SHIFT))
sys/dev/bnxt/bnxt_re/qplib_res.c
347
if (npages % BIT(MAX_PBL_LVL_1_PGS_SHIFT))
sys/dev/dpaa2/dpaa2_ni.c
190
#define DPAA2_ETH_DIST_ETHDST BIT(0)
sys/dev/dpaa2/dpaa2_ni.c
191
#define DPAA2_ETH_DIST_ETHSRC BIT(1)
sys/dev/dpaa2/dpaa2_ni.c
192
#define DPAA2_ETH_DIST_ETHTYPE BIT(2)
sys/dev/dpaa2/dpaa2_ni.c
193
#define DPAA2_ETH_DIST_VLAN BIT(3)
sys/dev/dpaa2/dpaa2_ni.c
194
#define DPAA2_ETH_DIST_IPSRC BIT(4)
sys/dev/dpaa2/dpaa2_ni.c
195
#define DPAA2_ETH_DIST_IPDST BIT(5)
sys/dev/dpaa2/dpaa2_ni.c
196
#define DPAA2_ETH_DIST_IPPROTO BIT(6)
sys/dev/dpaa2/dpaa2_ni.c
197
#define DPAA2_ETH_DIST_L4SRC BIT(7)
sys/dev/dpaa2/dpaa2_ni.c
198
#define DPAA2_ETH_DIST_L4DST BIT(8)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
119
#define NH_FLD_ETH_DA BIT(0)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
120
#define NH_FLD_ETH_SA BIT(1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
121
#define NH_FLD_ETH_LENGTH BIT(2)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
122
#define NH_FLD_ETH_TYPE BIT(3)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
123
#define NH_FLD_ETH_FINAL_CKSUM BIT(4)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
124
#define NH_FLD_ETH_PADDING BIT(5)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
125
#define NH_FLD_ETH_ALL_FIELDS (BIT(6) - 1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
128
#define NH_FLD_VLAN_VPRI BIT(0)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
129
#define NH_FLD_VLAN_CFI BIT(1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
130
#define NH_FLD_VLAN_VID BIT(2)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
131
#define NH_FLD_VLAN_LENGTH BIT(3)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
132
#define NH_FLD_VLAN_TYPE BIT(4)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
133
#define NH_FLD_VLAN_ALL_FIELDS (BIT(5) - 1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
140
#define NH_FLD_IP_VER BIT(0)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
141
#define NH_FLD_IP_DSCP BIT(2)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
142
#define NH_FLD_IP_ECN BIT(3)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
143
#define NH_FLD_IP_PROTO BIT(4)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
144
#define NH_FLD_IP_SRC BIT(5)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
145
#define NH_FLD_IP_DST BIT(6)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
146
#define NH_FLD_IP_TOS_TC BIT(7)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
147
#define NH_FLD_IP_ID BIT(8)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
148
#define NH_FLD_IP_ALL_FIELDS (BIT(9) - 1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
151
#define NH_FLD_IPV4_VER BIT(0)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
152
#define NH_FLD_IPV4_HDR_LEN BIT(1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
153
#define NH_FLD_IPV4_TOS BIT(2)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
154
#define NH_FLD_IPV4_TOTAL_LEN BIT(3)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
155
#define NH_FLD_IPV4_ID BIT(4)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
156
#define NH_FLD_IPV4_FLAG_D BIT(5)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
157
#define NH_FLD_IPV4_FLAG_M BIT(6)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
158
#define NH_FLD_IPV4_OFFSET BIT(7)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
159
#define NH_FLD_IPV4_TTL BIT(8)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
160
#define NH_FLD_IPV4_PROTO BIT(9)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
161
#define NH_FLD_IPV4_CKSUM BIT(10)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
162
#define NH_FLD_IPV4_SRC_IP BIT(11)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
163
#define NH_FLD_IPV4_DST_IP BIT(12)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
164
#define NH_FLD_IPV4_OPTS BIT(13)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
165
#define NH_FLD_IPV4_OPTS_COUNT BIT(14)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
166
#define NH_FLD_IPV4_ALL_FIELDS (BIT(15) - 1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
169
#define NH_FLD_IPV6_VER BIT(0)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
170
#define NH_FLD_IPV6_TC BIT(1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
171
#define NH_FLD_IPV6_SRC_IP BIT(2)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
172
#define NH_FLD_IPV6_DST_IP BIT(3)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
173
#define NH_FLD_IPV6_NEXT_HDR BIT(4)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
174
#define NH_FLD_IPV6_FL BIT(5)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
175
#define NH_FLD_IPV6_HOP_LIMIT BIT(6)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
176
#define NH_FLD_IPV6_ID BIT(7)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
177
#define NH_FLD_IPV6_ALL_FIELDS (BIT(8) - 1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
180
#define NH_FLD_ICMP_TYPE BIT(0)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
181
#define NH_FLD_ICMP_CODE BIT(1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
182
#define NH_FLD_ICMP_CKSUM BIT(2)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
183
#define NH_FLD_ICMP_ID BIT(3)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
184
#define NH_FLD_ICMP_SQ_NUM BIT(4)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
185
#define NH_FLD_ICMP_ALL_FIELDS (BIT(5) - 1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
188
#define NH_FLD_IGMP_VERSION BIT(0)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
189
#define NH_FLD_IGMP_TYPE BIT(1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
190
#define NH_FLD_IGMP_CKSUM BIT(2)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
191
#define NH_FLD_IGMP_DATA BIT(3)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
192
#define NH_FLD_IGMP_ALL_FIELDS (BIT(4) - 1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
195
#define NH_FLD_TCP_PORT_SRC BIT(0)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
196
#define NH_FLD_TCP_PORT_DST BIT(1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
197
#define NH_FLD_TCP_SEQ BIT(2)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
198
#define NH_FLD_TCP_ACK BIT(3)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
199
#define NH_FLD_TCP_OFFSET BIT(4)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
200
#define NH_FLD_TCP_FLAGS BIT(5)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
201
#define NH_FLD_TCP_WINDOW BIT(6)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
202
#define NH_FLD_TCP_CKSUM BIT(7)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
203
#define NH_FLD_TCP_URGPTR BIT(8)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
204
#define NH_FLD_TCP_OPTS BIT(9)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
205
#define NH_FLD_TCP_OPTS_COUNT BIT(10)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
206
#define NH_FLD_TCP_ALL_FIELDS (BIT(11) - 1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
209
#define NH_FLD_UDP_PORT_SRC BIT(0)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
210
#define NH_FLD_UDP_PORT_DST BIT(1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
211
#define NH_FLD_UDP_LEN BIT(2)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
212
#define NH_FLD_UDP_CKSUM BIT(3)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
213
#define NH_FLD_UDP_ALL_FIELDS (BIT(4) - 1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
216
#define NH_FLD_UDP_LITE_PORT_SRC BIT(0)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
217
#define NH_FLD_UDP_LITE_PORT_DST BIT(1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
218
#define NH_FLD_UDP_LITE_ALL_FIELDS (BIT(2) - 1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
221
#define NH_FLD_UDP_ENC_ESP_PORT_SRC BIT(0)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
222
#define NH_FLD_UDP_ENC_ESP_PORT_DST BIT(1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
223
#define NH_FLD_UDP_ENC_ESP_LEN BIT(2)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
224
#define NH_FLD_UDP_ENC_ESP_CKSUM BIT(3)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
225
#define NH_FLD_UDP_ENC_ESP_SPI BIT(4)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
226
#define NH_FLD_UDP_ENC_ESP_SEQUENCE_NUM BIT(5)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
227
#define NH_FLD_UDP_ENC_ESP_ALL_FIELDS (BIT(6) - 1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
230
#define NH_FLD_SCTP_PORT_SRC BIT(0)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
231
#define NH_FLD_SCTP_PORT_DST BIT(1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
232
#define NH_FLD_SCTP_VER_TAG BIT(2)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
233
#define NH_FLD_SCTP_CKSUM BIT(3)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
234
#define NH_FLD_SCTP_ALL_FIELDS (BIT(4) - 1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
237
#define NH_FLD_DCCP_PORT_SRC BIT(0)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
238
#define NH_FLD_DCCP_PORT_DST BIT(1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
239
#define NH_FLD_DCCP_ALL_FIELDS (BIT(2) - 1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
242
#define NH_FLD_IPHC_CID BIT(0)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
243
#define NH_FLD_IPHC_CID_TYPE BIT(1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
244
#define NH_FLD_IPHC_HCINDEX BIT(2)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
245
#define NH_FLD_IPHC_GEN BIT(3)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
246
#define NH_FLD_IPHC_D_BIT BIT(4)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
247
#define NH_FLD_IPHC_ALL_FIELDS (BIT(5) - 1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
250
#define NH_FLD_SCTP_CHUNK_DATA_TYPE BIT(0)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
251
#define NH_FLD_SCTP_CHUNK_DATA_FLAGS BIT(1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
252
#define NH_FLD_SCTP_CHUNK_DATA_LENGTH BIT(2)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
253
#define NH_FLD_SCTP_CHUNK_DATA_TSN BIT(3)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
254
#define NH_FLD_SCTP_CHUNK_DATA_STREAM_ID BIT(4)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
255
#define NH_FLD_SCTP_CHUNK_DATA_STREAM_SQN BIT(5)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
256
#define NH_FLD_SCTP_CHUNK_DATA_PAYLOAD_PID BIT(6)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
257
#define NH_FLD_SCTP_CHUNK_DATA_UNORDERED BIT(7)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
258
#define NH_FLD_SCTP_CHUNK_DATA_BEGGINING BIT(8)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
259
#define NH_FLD_SCTP_CHUNK_DATA_END BIT(9)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
260
#define NH_FLD_SCTP_CHUNK_DATA_ALL_FIELDS (BIT(10) - 1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
263
#define NH_FLD_L2TPV2_TYPE_BIT BIT(0)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
264
#define NH_FLD_L2TPV2_LENGTH_BIT BIT(1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
265
#define NH_FLD_L2TPV2_SEQUENCE_BIT BIT(2)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
266
#define NH_FLD_L2TPV2_OFFSET_BIT BIT(3)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
267
#define NH_FLD_L2TPV2_PRIORITY_BIT BIT(4)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
268
#define NH_FLD_L2TPV2_VERSION BIT(5)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
269
#define NH_FLD_L2TPV2_LEN BIT(6)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
270
#define NH_FLD_L2TPV2_TUNNEL_ID BIT(7)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
271
#define NH_FLD_L2TPV2_SESSION_ID BIT(8)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
272
#define NH_FLD_L2TPV2_NS BIT(9)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
273
#define NH_FLD_L2TPV2_NR BIT(10)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
274
#define NH_FLD_L2TPV2_OFFSET_SIZE BIT(11)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
275
#define NH_FLD_L2TPV2_FIRST_BYTE BIT(12)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
276
#define NH_FLD_L2TPV2_ALL_FIELDS (BIT(13) - 1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
279
#define NH_FLD_L2TPV3_CTRL_TYPE_BIT BIT(0)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
280
#define NH_FLD_L2TPV3_CTRL_LENGTH_BIT BIT(1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
281
#define NH_FLD_L2TPV3_CTRL_SEQUENCE_BIT BIT(2)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
282
#define NH_FLD_L2TPV3_CTRL_VERSION BIT(3)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
283
#define NH_FLD_L2TPV3_CTRL_LENGTH BIT(4)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
284
#define NH_FLD_L2TPV3_CTRL_CONTROL BIT(5)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
285
#define NH_FLD_L2TPV3_CTRL_SENT BIT(6)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
286
#define NH_FLD_L2TPV3_CTRL_RECV BIT(7)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
287
#define NH_FLD_L2TPV3_CTRL_FIRST_BYTE BIT(8)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
288
#define NH_FLD_L2TPV3_CTRL_ALL_FIELDS (BIT(9) - 1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
290
#define NH_FLD_L2TPV3_SESS_TYPE_BIT BIT(0)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
291
#define NH_FLD_L2TPV3_SESS_VERSION BIT(1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
292
#define NH_FLD_L2TPV3_SESS_ID BIT(2)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
293
#define NH_FLD_L2TPV3_SESS_COOKIE BIT(3)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
294
#define NH_FLD_L2TPV3_SESS_ALL_FIELDS (BIT(4) - 1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
297
#define NH_FLD_PPP_PID BIT(0)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
298
#define NH_FLD_PPP_COMPRESSED BIT(1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
299
#define NH_FLD_PPP_ALL_FIELDS (BIT(2) - 1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
302
#define NH_FLD_PPPOE_VER BIT(0)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
303
#define NH_FLD_PPPOE_TYPE BIT(1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
304
#define NH_FLD_PPPOE_CODE BIT(2)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
305
#define NH_FLD_PPPOE_SID BIT(3)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
306
#define NH_FLD_PPPOE_LEN BIT(4)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
307
#define NH_FLD_PPPOE_SESSION BIT(5)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
308
#define NH_FLD_PPPOE_PID BIT(6)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
309
#define NH_FLD_PPPOE_ALL_FIELDS (BIT(7) - 1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
312
#define NH_FLD_PPPMUX_PID BIT(0)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
313
#define NH_FLD_PPPMUX_CKSUM BIT(1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
314
#define NH_FLD_PPPMUX_COMPRESSED BIT(2)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
315
#define NH_FLD_PPPMUX_ALL_FIELDS (BIT(3) - 1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
318
#define NH_FLD_PPPMUX_SUBFRM_PFF BIT(0)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
319
#define NH_FLD_PPPMUX_SUBFRM_LXT BIT(1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
320
#define NH_FLD_PPPMUX_SUBFRM_LEN BIT(2)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
321
#define NH_FLD_PPPMUX_SUBFRM_PID BIT(3)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
322
#define NH_FLD_PPPMUX_SUBFRM_USE_PID BIT(4)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
323
#define NH_FLD_PPPMUX_SUBFRM_ALL_FIELDS (BIT(5) - 1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
326
#define NH_FLD_LLC_DSAP BIT(0)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
327
#define NH_FLD_LLC_SSAP BIT(1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
328
#define NH_FLD_LLC_CTRL BIT(2)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
329
#define NH_FLD_LLC_ALL_FIELDS (BIT(3) - 1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
332
#define NH_FLD_NLPID_NLPID BIT(0)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
333
#define NH_FLD_NLPID_ALL_FIELDS (BIT(1) - 1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
336
#define NH_FLD_SNAP_OUI BIT(0)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
337
#define NH_FLD_SNAP_PID BIT(1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
338
#define NH_FLD_SNAP_ALL_FIELDS (BIT(2) - 1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
341
#define NH_FLD_LLC_SNAP_TYPE BIT(0)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
342
#define NH_FLD_LLC_SNAP_ALL_FIELDS (BIT(1) - 1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
345
#define NH_FLD_ARP_HTYPE BIT(0)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
346
#define NH_FLD_ARP_PTYPE BIT(1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
347
#define NH_FLD_ARP_HLEN BIT(2)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
348
#define NH_FLD_ARP_PLEN BIT(3)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
349
#define NH_FLD_ARP_OPER BIT(4)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
350
#define NH_FLD_ARP_SHA BIT(5)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
351
#define NH_FLD_ARP_SPA BIT(6)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
352
#define NH_FLD_ARP_THA BIT(7)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
353
#define NH_FLD_ARP_TPA BIT(8)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
354
#define NH_FLD_ARP_ALL_FIELDS (BIT(9) - 1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
357
#define NH_FLD_RFC2684_LLC BIT(0)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
358
#define NH_FLD_RFC2684_NLPID BIT(1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
359
#define NH_FLD_RFC2684_OUI BIT(2)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
360
#define NH_FLD_RFC2684_PID BIT(3)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
361
#define NH_FLD_RFC2684_VPN_OUI BIT(4)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
362
#define NH_FLD_RFC2684_VPN_IDX BIT(5)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
363
#define NH_FLD_RFC2684_ALL_FIELDS (BIT(6) - 1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
366
#define NH_FLD_USER_DEFINED_SRCPORT BIT(0)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
367
#define NH_FLD_USER_DEFINED_PCDID BIT(1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
368
#define NH_FLD_USER_DEFINED_ALL_FIELDS (BIT(2) - 1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
371
#define NH_FLD_PAYLOAD_BUFFER BIT(0)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
372
#define NH_FLD_PAYLOAD_SIZE BIT(1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
373
#define NH_FLD_MAX_FRM_SIZE BIT(2)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
374
#define NH_FLD_MIN_FRM_SIZE BIT(3)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
375
#define NH_FLD_PAYLOAD_TYPE BIT(4)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
376
#define NH_FLD_FRAME_SIZE BIT(5)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
377
#define NH_FLD_PAYLOAD_ALL_FIELDS (BIT(6) - 1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
380
#define NH_FLD_GRE_TYPE BIT(0)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
381
#define NH_FLD_GRE_ALL_FIELDS (BIT(1) - 1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
384
#define NH_FLD_MINENCAP_SRC_IP BIT(0)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
385
#define NH_FLD_MINENCAP_DST_IP BIT(1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
386
#define NH_FLD_MINENCAP_TYPE BIT(2)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
387
#define NH_FLD_MINENCAP_ALL_FIELDS (BIT(3) - 1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
390
#define NH_FLD_IPSEC_AH_SPI BIT(0)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
391
#define NH_FLD_IPSEC_AH_NH BIT(1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
392
#define NH_FLD_IPSEC_AH_ALL_FIELDS (BIT(2) - 1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
395
#define NH_FLD_IPSEC_ESP_SPI BIT(0)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
396
#define NH_FLD_IPSEC_ESP_SEQUENCE_NUM BIT(1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
397
#define NH_FLD_IPSEC_ESP_ALL_FIELDS (BIT(2) - 1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
400
#define NH_FLD_MPLS_LABEL_STACK BIT(0)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
401
#define NH_FLD_MPLS_LABEL_STACK_ALL_FIELDS (BIT(1) - 1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
404
#define NH_FLD_MACSEC_SECTAG BIT(0)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
405
#define NH_FLD_MACSEC_ALL_FIELDS (BIT(1) - 1)
sys/dev/dpaa2/dpaa2_ni_dpkg.h
408
#define NH_FLD_GTP_TEID BIT(0)
sys/dev/ena/ena.c
2635
if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) {
sys/dev/ena/ena.c
2811
if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) {
sys/dev/ena/ena.c
3015
aenq_groups = BIT(ENA_ADMIN_LINK_CHANGE) |
sys/dev/ena/ena.c
3016
BIT(ENA_ADMIN_FATAL_ERROR) |
sys/dev/ena/ena.c
3017
BIT(ENA_ADMIN_WARNING) |
sys/dev/ena/ena.c
3018
BIT(ENA_ADMIN_NOTIFICATION) |
sys/dev/ena/ena.c
3019
BIT(ENA_ADMIN_KEEP_ALIVE) |
sys/dev/ena/ena.c
3020
BIT(ENA_ADMIN_CONF_NOTIFICATIONS) |
sys/dev/ena/ena.c
3021
BIT(ENA_ADMIN_DEVICE_REQUEST_RESET);
sys/dev/ena/ena.c
3030
*wd_active = !!(aenq_groups & BIT(ENA_ADMIN_KEEP_ALIVE));
sys/dev/ena/ena.c
3875
BIT(ENA_ADMIN_DISABLE_META_CACHING));
sys/dev/ena/ena.h
117
#define ENA_MMIO_DISABLE_REG_READ BIT(0)
sys/dev/enetc/enetc_hw.h
109
#define ENETC_SIRSSCAPR_GET_NUM_RSS(val) (BIT((val) & 0xf) * 32)
sys/dev/enetc/enetc_hw.h
117
#define ENETC_RBMR_AL BIT(0)
sys/dev/enetc/enetc_hw.h
118
#define ENETC_RBMR_BDS BIT(2)
sys/dev/enetc/enetc_hw.h
119
#define ENETC_RBMR_VTE BIT(5)
sys/dev/enetc/enetc_hw.h
120
#define ENETC_RBMR_EN BIT(31)
sys/dev/enetc/enetc_hw.h
129
#define ENETC_RBIER_RXTIE BIT(0)
sys/dev/enetc/enetc_hw.h
132
#define ENETC_RBICR0_ICEN BIT(31)
sys/dev/enetc/enetc_hw.h
139
#define ENETC_TBSR_BUSY BIT(0)
sys/dev/enetc/enetc_hw.h
140
#define ENETC_TBMR_VIH BIT(9)
sys/dev/enetc/enetc_hw.h
143
#define ENETC_TBMR_EN BIT(31)
sys/dev/enetc/enetc_hw.h
152
#define ENETC_TBIER_TXT BIT(0)
sys/dev/enetc/enetc_hw.h
153
#define ENETC_TBIER_TXF BIT(1)
sys/dev/enetc/enetc_hw.h
156
#define ENETC_TBICR0_ICEN BIT(31)
sys/dev/enetc/enetc_hw.h
166
#define ENETC_PMR_SI0EN BIT(16)
sys/dev/enetc/enetc_hw.h
170
#define ENETC_PMR_PSPEED_100M BIT(8)
sys/dev/enetc/enetc_hw.h
171
#define ENETC_PMR_PSPEED_1000M BIT(9)
sys/dev/enetc/enetc_hw.h
172
#define ENETC_PMR_PSPEED_2500M BIT(10)
sys/dev/enetc/enetc_hw.h
175
#define ENETC_PSIPMR_SET_UP(n) BIT(n) /* n = SI index */
sys/dev/enetc/enetc_hw.h
176
#define ENETC_PSIPMR_SET_MP(n) BIT((n) + 16)
sys/dev/enetc/enetc_hw.h
186
#define ENETC_VLAN_TYPE_C BIT(0)
sys/dev/enetc/enetc_hw.h
187
#define ENETC_VLAN_TYPE_S BIT(1)
sys/dev/enetc/enetc_hw.h
190
#define ENETC_PSIVLAN_EN BIT(31)
sys/dev/enetc/enetc_hw.h
200
#define ENETC_PSICFGR0_VTE BIT(12)
sys/dev/enetc/enetc_hw.h
201
#define ENETC_PSICFGR0_SIVIE BIT(14)
sys/dev/enetc/enetc_hw.h
202
#define ENETC_PSICFGR0_ASE BIT(15)
sys/dev/enetc/enetc_hw.h
206
#define ENETC_CBSE BIT(31)
sys/dev/enetc/enetc_hw.h
211
#define ENETC_PRSSCAPR_GET_NUM_RSS(val) (BIT((val) & 0xf) * 32)
sys/dev/enetc/enetc_hw.h
214
#define ENETC_PSIVLANFMR_VS BIT(0)
sys/dev/enetc/enetc_hw.h
216
#define ENETC_PRFSMR_RFSE BIT(31)
sys/dev/enetc/enetc_hw.h
221
#define ENETC_PFPMR_PMACE BIT(1)
sys/dev/enetc/enetc_hw.h
222
#define ENETC_PFPMR_MWLM BIT(0)
sys/dev/enetc/enetc_hw.h
231
#define ENETC_MMCSR_ME BIT(16)
sys/dev/enetc/enetc_hw.h
235
#define ENETC_PAR_PORT_L4CD BIT(0)
sys/dev/enetc/enetc_hw.h
236
#define ENETC_PAR_PORT_L3CD BIT(1)
sys/dev/enetc/enetc_hw.h
240
#define ENETC_PM0_TX_EN BIT(0)
sys/dev/enetc/enetc_hw.h
241
#define ENETC_PM0_RX_EN BIT(1)
sys/dev/enetc/enetc_hw.h
242
#define ENETC_PM0_PROMISC BIT(4)
sys/dev/enetc/enetc_hw.h
243
#define ENETC_PM0_CMD_XGLP BIT(10)
sys/dev/enetc/enetc_hw.h
244
#define ENETC_PM0_CMD_TXP BIT(11)
sys/dev/enetc/enetc_hw.h
245
#define ENETC_PM0_CMD_PHY_TX_EN BIT(15)
sys/dev/enetc/enetc_hw.h
246
#define ENETC_PM0_CMD_SFD BIT(21)
sys/dev/enetc/enetc_hw.h
25
#define ENETC_SIMR_EN BIT(31)
sys/dev/enetc/enetc_hw.h
256
#define ENETC_PM0_IFM_RG BIT(2)
sys/dev/enetc/enetc_hw.h
257
#define ENETC_PM0_IFM_RLP (BIT(5) | BIT(11))
sys/dev/enetc/enetc_hw.h
258
#define ENETC_PM0_IFM_EN_AUTO BIT(15)
sys/dev/enetc/enetc_hw.h
26
#define ENETC_SIMR_DRXG BIT(16)
sys/dev/enetc/enetc_hw.h
263
#define ENETC_PM0_IFM_FULL_DPX BIT(12)
sys/dev/enetc/enetc_hw.h
27
#define ENETC_SIMR_RSSE BIT(0)
sys/dev/enetc/enetc_hw.h
31
#define ENETC_SIPCAPR0_QBV BIT(4)
sys/dev/enetc/enetc_hw.h
32
#define ENETC_SIPCAPR0_PSFP BIT(9)
sys/dev/enetc/enetc_hw.h
33
#define ENETC_SIPCAPR0_RSS BIT(8)
sys/dev/enetc/enetc_hw.h
379
ENETC_TXBD_FLAGS_RES0 = BIT(0), /* reserved */
sys/dev/enetc/enetc_hw.h
380
ENETC_TXBD_FLAGS_TSE = BIT(1),
sys/dev/enetc/enetc_hw.h
381
ENETC_TXBD_FLAGS_W = BIT(2),
sys/dev/enetc/enetc_hw.h
382
ENETC_TXBD_FLAGS_RES3 = BIT(3), /* reserved */
sys/dev/enetc/enetc_hw.h
383
ENETC_TXBD_FLAGS_TXSTART = BIT(4),
sys/dev/enetc/enetc_hw.h
384
ENETC_TXBD_FLAGS_FI = BIT(5),
sys/dev/enetc/enetc_hw.h
385
ENETC_TXBD_FLAGS_EX = BIT(6),
sys/dev/enetc/enetc_hw.h
386
ENETC_TXBD_FLAGS_F = BIT(7)
sys/dev/enetc/enetc_hw.h
397
#define ENETC_TXBD_E_FLAGS_VLAN_INS BIT(0)
sys/dev/enetc/enetc_hw.h
398
#define ENETC_TXBD_E_FLAGS_TWO_STEP_PTP BIT(2)
sys/dev/enetc/enetc_hw.h
425
#define ENETC_RXBD_PARSER_ERROR BIT(15)
sys/dev/enetc/enetc_hw.h
427
#define ENETC_RXBD_LSTATUS_R BIT(30)
sys/dev/enetc/enetc_hw.h
428
#define ENETC_RXBD_LSTATUS_F BIT(31)
sys/dev/enetc/enetc_hw.h
431
#define ENETC_RXBD_FLAG_RSSV BIT(8)
sys/dev/enetc/enetc_hw.h
432
#define ENETC_RXBD_FLAG_VLAN BIT(9)
sys/dev/enetc/enetc_hw.h
433
#define ENETC_RXBD_FLAG_TSTMP BIT(10)
sys/dev/enetc/enetc_hw.h
440
#define ENETC_CBD_FLAGS_SF BIT(7) /* short format */
sys/dev/enetc/enetc_hw.h
469
#define ENETC_RFSE_EN BIT(15)
sys/dev/enetc/enetc_hw.h
562
#define ENETC_CBDR_SID_VIDM BIT(12)
sys/dev/enetc/enetc_hw.h
57
#define ENETC_PSIMSGRR_MR(n) BIT((n) + 1) /* n = VSI index */
sys/dev/enetc/enetc_hw.h
574
#define ENETC_CBDR_SFI_PRIM BIT(3)
sys/dev/enetc/enetc_hw.h
575
#define ENETC_CBDR_SFI_BLOV BIT(4)
sys/dev/enetc/enetc_hw.h
576
#define ENETC_CBDR_SFI_BLEN BIT(5)
sys/dev/enetc/enetc_hw.h
577
#define ENETC_CBDR_SFI_MSDUEN BIT(6)
sys/dev/enetc/enetc_hw.h
578
#define ENETC_CBDR_SFI_FMITEN BIT(7)
sys/dev/enetc/enetc_hw.h
579
#define ENETC_CBDR_SFI_ENABLE BIT(7)
sys/dev/enetc/enetc_hw.h
618
#define ENETC_CBDR_SGI_OIPV_EN BIT(3)
sys/dev/enetc/enetc_hw.h
619
#define ENETC_CBDR_SGI_CGTST BIT(6)
sys/dev/enetc/enetc_hw.h
62
#define ENETC_VSIMSGSR_MB BIT(0)
sys/dev/enetc/enetc_hw.h
620
#define ENETC_CBDR_SGI_OGTST BIT(7)
sys/dev/enetc/enetc_hw.h
621
#define ENETC_CBDR_SGI_CFG_CHG BIT(1)
sys/dev/enetc/enetc_hw.h
622
#define ENETC_CBDR_SGI_CFG_PND BIT(2)
sys/dev/enetc/enetc_hw.h
623
#define ENETC_CBDR_SGI_OEX BIT(4)
sys/dev/enetc/enetc_hw.h
624
#define ENETC_CBDR_SGI_OEXEN BIT(5)
sys/dev/enetc/enetc_hw.h
625
#define ENETC_CBDR_SGI_IRX BIT(6)
sys/dev/enetc/enetc_hw.h
626
#define ENETC_CBDR_SGI_IRXEN BIT(7)
sys/dev/enetc/enetc_hw.h
629
#define ENETC_CBDR_SGI_EN BIT(7)
sys/dev/enetc/enetc_hw.h
63
#define ENETC_VSIMSGSR_MS BIT(1)
sys/dev/enetc/enetc_hw.h
647
#define ENETC_CBDR_SGI_AIPV_EN BIT(3)
sys/dev/enetc/enetc_hw.h
648
#define ENETC_CBDR_SGI_AGTST BIT(7)
sys/dev/enetc/enetc_hw.h
666
#define ENETC_CBDR_SGL_IOMEN BIT(0)
sys/dev/enetc/enetc_hw.h
667
#define ENETC_CBDR_SGL_IPVEN BIT(3)
sys/dev/enetc/enetc_hw.h
668
#define ENETC_CBDR_SGL_GTST BIT(4)
sys/dev/enetc/enetc_hw.h
686
#define ENETC_CBDR_FMI_MR BIT(0)
sys/dev/enetc/enetc_hw.h
687
#define ENETC_CBDR_FMI_MREN BIT(1)
sys/dev/enetc/enetc_hw.h
688
#define ENETC_CBDR_FMI_DOY BIT(2)
sys/dev/enetc/enetc_hw.h
689
#define ENETC_CBDR_FMI_CM BIT(3)
sys/dev/enetc/enetc_hw.h
690
#define ENETC_CBDR_FMI_CF BIT(4)
sys/dev/enetc/enetc_hw.h
691
#define ENETC_CBDR_FMI_NDOR BIT(5)
sys/dev/enetc/enetc_hw.h
692
#define ENETC_CBDR_FMI_OALEN BIT(6)
sys/dev/enetc/enetc_hw.h
736
#define ENETC_QBV_TGE BIT(31)
sys/dev/enetc/enetc_hw.h
737
#define ENETC_QBV_TGPE BIT(30)
sys/dev/enetc/enetc_hw.h
745
#define ENETC_TSDE BIT(31)
sys/dev/enetc/enetc_hw.h
749
#define ENETC_PPSFPMR_PSFPEN BIT(0)
sys/dev/enetc/enetc_hw.h
750
#define ENETC_PPSFPMR_VS BIT(1)
sys/dev/enetc/enetc_hw.h
751
#define ENETC_PPSFPMR_PVC BIT(2)
sys/dev/enetc/enetc_hw.h
752
#define ENETC_PPSFPMR_PVZC BIT(3)
sys/dev/enetc/enetc_hw.h
83
#define ENETC_SICBDRMR_EN BIT(31)
sys/dev/enetc/enetc_mdio.h
44
#define MDIO_CFG_BSY BIT(0)
sys/dev/enetc/enetc_mdio.h
45
#define MDIO_CFG_RD_ER BIT(1)
sys/dev/enetc/enetc_mdio.h
46
#define MDIO_CFG_ENC45 BIT(6)
sys/dev/enetc/enetc_mdio.h
47
#define MDIO_CFG_NEG BIT(23)
sys/dev/enetc/enetc_mdio.h
48
#define MDIO_CTL_READ BIT(15)
sys/dev/enetc/enetc_mdio.h
49
#define MII_ADDR_C45 BIT(30)
sys/dev/enetc/if_enetc.c
812
bit ^= !!(address & BIT(i + j*6));
sys/dev/enetc/if_enetc.c
852
bit = vid & BIT(i);
sys/dev/enetc/if_enetc.c
853
bit ^= !!(vid & BIT(i + 6));
sys/dev/enetc/if_enetc.c
876
bitmap |= BIT(hash);
sys/dev/enetc/if_enetc.c
897
bitmap &= ~BIT(hash);
sys/dev/etherswitch/ar40xx/ar40xx_hw_psgmii.c
181
sc->sc_psgmii.phy_t_status |= BIT(phy);
sys/dev/etherswitch/ar40xx/ar40xx_reg.h
101
#define AR40XX_MODULE_EN_MIB BIT(0)
sys/dev/etherswitch/ar40xx/ar40xx_reg.h
104
#define AR40XX_MIB_BUSY BIT(17)
sys/dev/etherswitch/ar40xx/ar40xx_reg.h
105
#define AR40XX_MIB_CPU_KEEP BIT(20)
sys/dev/etherswitch/ar40xx/ar40xx_reg.h
112
#define AR40XX_ESS_SERVICE_TAG_STAG BIT(17)
sys/dev/etherswitch/ar40xx/ar40xx_reg.h
136
#define AR40XX_PORT_TX_EN BIT(2)
sys/dev/etherswitch/ar40xx/ar40xx_reg.h
137
#define AR40XX_PORT_RX_EN BIT(3)
sys/dev/etherswitch/ar40xx/ar40xx_reg.h
138
#define AR40XX_PORT_STATUS_TXFLOW BIT(4)
sys/dev/etherswitch/ar40xx/ar40xx_reg.h
139
#define AR40XX_PORT_STATUS_RXFLOW BIT(5)
sys/dev/etherswitch/ar40xx/ar40xx_reg.h
140
#define AR40XX_PORT_DUPLEX BIT(6)
sys/dev/etherswitch/ar40xx/ar40xx_reg.h
141
#define AR40XX_PORT_TXHALF_FLOW BIT(7)
sys/dev/etherswitch/ar40xx/ar40xx_reg.h
142
#define AR40XX_PORT_STATUS_LINK_UP BIT(8)
sys/dev/etherswitch/ar40xx/ar40xx_reg.h
143
#define AR40XX_PORT_AUTO_LINK_EN BIT(9)
sys/dev/etherswitch/ar40xx/ar40xx_reg.h
144
#define AR40XX_PORT_STATUS_FLOW_CONTROL BIT(12)
sys/dev/etherswitch/ar40xx/ar40xx_reg.h
149
#define AR40XX_EEE_CTRL_DISABLE_PHY(_i) BIT(4 + (_i) * 2)
sys/dev/etherswitch/ar40xx/ar40xx_reg.h
158
#define AR40XX_PORT_VLAN1_CORE_PORT BIT(9)
sys/dev/etherswitch/ar40xx/ar40xx_reg.h
159
#define AR40XX_PORT_VLAN1_PORT_TLS_MODE BIT(7)
sys/dev/etherswitch/ar40xx/ar40xx_reg.h
160
#define AR40XX_PORT_VLAN1_PORT_VLAN_PROP BIT(6)
sys/dev/etherswitch/ar40xx/ar40xx_reg.h
185
#define AR40XX_ATU_DATA1_CROSS_PORT_STATE_EN BIT(23)
sys/dev/etherswitch/ar40xx/ar40xx_reg.h
187
#define AR40XX_ATU_DATA1_SVL_ENTRY BIT(27)
sys/dev/etherswitch/ar40xx/ar40xx_reg.h
188
#define AR40XX_ATU_DATA1_PRI_OVER_EN BIT(28)
sys/dev/etherswitch/ar40xx/ar40xx_reg.h
189
#define AR40XX_ATU_DATA1_MIRROR_EN BIT(29)
sys/dev/etherswitch/ar40xx/ar40xx_reg.h
190
#define AR40XX_ATU_DATA1_SA_DROP_EN BIT(30)
sys/dev/etherswitch/ar40xx/ar40xx_reg.h
191
#define AR40XX_ATU_DATA1_HASH_HIGH_ADDR BIT(31)
sys/dev/etherswitch/ar40xx/ar40xx_reg.h
196
#define AR40XX_ATU_FUNC_DATA2_VLAN_LEAKY_EN BIT(4)
sys/dev/etherswitch/ar40xx/ar40xx_reg.h
197
#define AR40XX_ATU_FUNC_DATA2_REDIRECT_TO_CPU BIT(5)
sys/dev/etherswitch/ar40xx/ar40xx_reg.h
198
#define AR40XX_ATU_FUNC_DATA2_COPY_TO_CPU BIT(6)
sys/dev/etherswitch/ar40xx/ar40xx_reg.h
199
#define AR40XX_ATU_FUNC_DATA2_SHORT_LOOP BIT(7)
sys/dev/etherswitch/ar40xx/ar40xx_reg.h
216
#define AR40XX_ATU_FUNC_BUSY BIT(31)
sys/dev/etherswitch/ar40xx/ar40xx_reg.h
227
#define AR40XX_VTU_FUNC0_IVL BIT(19)
sys/dev/etherswitch/ar40xx/ar40xx_reg.h
228
#define AR40XX_VTU_FUNC0_VALID BIT(20)
sys/dev/etherswitch/ar40xx/ar40xx_reg.h
239
#define AR40XX_VTU_FUNC1_FULL BIT(4)
sys/dev/etherswitch/ar40xx/ar40xx_reg.h
240
#define AR40XX_VTU_FUNC1_PORT BIT(8, 4)
sys/dev/etherswitch/ar40xx/ar40xx_reg.h
242
#define AR40XX_VTU_FUNC1_VID BIT(16, 12)
sys/dev/etherswitch/ar40xx/ar40xx_reg.h
244
#define AR40XX_VTU_FUNC1_BUSY BIT(31)
sys/dev/etherswitch/ar40xx/ar40xx_reg.h
247
#define AR40XX_FWD_CTRL0_CPU_PORT_EN BIT(10)
sys/dev/etherswitch/ar40xx/ar40xx_reg.h
267
#define AR40XX_PORT_LOOKUP_LEARN BIT(20)
sys/dev/etherswitch/ar40xx/ar40xx_reg.h
268
#define AR40XX_PORT_LOOKUP_LOOPBACK BIT(21)
sys/dev/etherswitch/ar40xx/ar40xx_reg.h
269
#define AR40XX_PORT_LOOKUP_ING_MIRROR_EN BIT(25)
sys/dev/etherswitch/ar40xx/ar40xx_reg.h
277
#define AR40XX_PORT_HOL_CTRL1_EG_MIRROR_EN BIT(16)
sys/dev/etherswitch/ar40xx/ar40xx_reg.h
284
#define AR40XX_PHY_MANU_CTRL_EN BIT(12)
sys/dev/etherswitch/ar40xx/ar40xx_reg.h
289
#define AR40XX_PHY_SPEC_STATUS_LINK BIT(10)
sys/dev/etherswitch/ar40xx/ar40xx_reg.h
290
#define AR40XX_PHY_SPEC_STATUS_DUPLEX BIT(13)
sys/dev/etherswitch/ar40xx/ar40xx_reg.h
51
#define AR40XX_PSGMII_ATHR_CSCO_MODE_25M BIT(0)
sys/dev/etherswitch/arswitch/arswitch_8327.c
1252
if ((ports & BIT(i)) == 0)
sys/dev/etherswitch/arswitch/arswitch_8327.c
1254
else if (untagged_ports & BIT(i))
sys/dev/etherswitch/arswitch/arswitchreg.h
147
#define AR8216_ATU_ACTIVE BIT(3)
sys/dev/etherswitch/arswitch/arswitchreg.h
150
#define AR8216_ATU_FULL_VIO BIT(12)
sys/dev/etherswitch/arswitch/arswitchreg.h
169
#define AR934X_ATU_CROSS_STATE_PORT_EN BIT(8)
sys/dev/etherswitch/arswitch/arswitchreg.h
170
#define AR934X_ATU_HASH_HIGH_ADDR BIT(9) /* Used for CPU_FUNC (get_next_valid) */
sys/dev/etherswitch/arswitch/arswitchreg.h
172
#define AR8216_ATU_CTRL2_AT_PRIORITY_EN BIT(12)
sys/dev/etherswitch/arswitch/arswitchreg.h
173
#define AR8216_ATU_CTRL2_MIRROR_EN BIT(13)
sys/dev/etherswitch/arswitch/arswitchreg.h
174
#define AR8216_ATU_CTRL2_SA_DROP_EN BIT(14)
sys/dev/etherswitch/arswitch/arswitchreg.h
175
#define AR934X_ATU_CTRL2_MAC_CLONE BIT(15)
sys/dev/etherswitch/arswitch/arswitchreg.h
184
#define AR8216_ATU_CTRL2_VLAN_LEAKY_EN BIT(24)
sys/dev/etherswitch/arswitch/arswitchreg.h
189
#define AR8216_ATU_CTRL2_REDIRECT2CPU BIT(25)
sys/dev/etherswitch/arswitch/arswitchreg.h
190
#define AR8216_ATU_CTRL2_COPY2CPU BIT(26)
sys/dev/etherswitch/arswitch/arswitchreg.h
195
#define AR8216_ATU_CTRL_AGE_EN BIT(17)
sys/dev/etherswitch/arswitch/arswitchreg.h
196
#define AR8216_ATU_CTRL_LEARN_CHANGE BIT(18)
sys/dev/etherswitch/arswitch/arswitchreg.h
197
#define AR8216_ATU_CTRL_ARP_EN BIT(20)
sys/dev/etherswitch/arswitch/arswitchreg.h
448
#define AR8327_EEE_CTRL_DISABLE_PHY(_i) BIT(4 + (_i) * 2)
sys/dev/etherswitch/arswitch/arswitchreg.h
482
#define AR8327_ATU_DATA1_CROSS_PORT_STATE_EN BIT(23)
sys/dev/etherswitch/arswitch/arswitchreg.h
484
#define AR8327_ATU_DATA1_SVL_ENTRY BIT(27)
sys/dev/etherswitch/arswitch/arswitchreg.h
485
#define AR8327_ATU_DATA1_PRI_OVER_EN BIT(28)
sys/dev/etherswitch/arswitch/arswitchreg.h
486
#define AR8327_ATU_DATA1_MIRROR_EN BIT(29)
sys/dev/etherswitch/arswitch/arswitchreg.h
487
#define AR8327_ATU_DATA1_SA_DROP_EN BIT(30)
sys/dev/etherswitch/arswitch/arswitchreg.h
488
#define AR8327_ATU_DATA1_HASH_HIGH_ADDR BIT(31)
sys/dev/etherswitch/arswitch/arswitchreg.h
493
#define AR8327_ATU_FUNC_DATA2_VLAN_LEAKY_EN BIT(4)
sys/dev/etherswitch/arswitch/arswitchreg.h
494
#define AR8327_ATU_FUNC_DATA2_REDIRECT_TO_CPU BIT(5)
sys/dev/etherswitch/arswitch/arswitchreg.h
495
#define AR8327_ATU_FUNC_DATA2_COPY_TO_CPU BIT(6)
sys/dev/etherswitch/arswitch/arswitchreg.h
496
#define AR8327_ATU_FUNC_DATA2_SHORT_LOOP BIT(7)
sys/dev/etherswitch/arswitch/arswitchreg.h
511
#define AR8327_ATU_FUNC_FLUSH_STATIC_EN BIT(4)
sys/dev/etherswitch/arswitch/arswitchreg.h
512
#define AR8327_ATU_FUNC_ENTRY_TYPE BIT(5)
sys/dev/etherswitch/arswitch/arswitchreg.h
515
#define AR8327_ATU_FUNC_FULL_VIOLATION BIT(12)
sys/dev/etherswitch/arswitch/arswitchreg.h
516
#define AR8327_ATU_FUNC_MULTI_EN BIT(13) /* for GET_NEXT */
sys/dev/etherswitch/arswitch/arswitchreg.h
517
#define AR8327_ATU_FUNC_PORT_EN BIT(14) /* for GET_NEXT */
sys/dev/etherswitch/arswitch/arswitchreg.h
518
#define AR8327_ATU_FUNC_VID_EN BIT(15) /* for GET_NEXT */
sys/dev/etherswitch/arswitch/arswitchreg.h
523
#define AR8327_ATU_FUNC_BUSY BIT(31)
sys/dev/etherswitch/felix/felix_reg.h
100
#define FELIX_QSYS_PORT_MODE_PORT_ENA BIT(14)
sys/dev/etherswitch/felix/felix_reg.h
37
#define FELIX_DEVCPU_GCB_RST_EN BIT(0)
sys/dev/etherswitch/felix/felix_reg.h
42
#define FELIX_ANA_VT_STS (BIT(0) | BIT(1))
sys/dev/etherswitch/felix/felix_reg.h
43
#define FELIX_ANA_VT_RESET (BIT(0) | BIT(1))
sys/dev/etherswitch/felix/felix_reg.h
44
#define FELIX_ANA_VT_WRITE BIT(1)
sys/dev/etherswitch/felix/felix_reg.h
45
#define FELIX_ANA_VT_READ BIT(0)
sys/dev/etherswitch/felix/felix_reg.h
53
#define FELIX_ANA_PORT_VLAN_CFG_POP BIT(18)
sys/dev/etherswitch/felix/felix_reg.h
54
#define FELIX_ANA_PORT_VLAN_CFG_VID_AWARE BIT(20)
sys/dev/etherswitch/felix/felix_reg.h
56
#define FELIX_ANA_PORT_DROP_CFG_MULTI BIT(0)
sys/dev/etherswitch/felix/felix_reg.h
57
#define FELIX_ANA_PORT_DROP_CFG_NULL BIT(1) /* SRC, or DST MAC == 0 */
sys/dev/etherswitch/felix/felix_reg.h
58
#define FELIX_ANA_PORT_DROP_CFG_CTAGGED_PRIO BIT(2) /* 0x8100, VID == 0 */
sys/dev/etherswitch/felix/felix_reg.h
59
#define FELIX_ANA_PORT_DROP_CFG_STAGGED_PRIO BIT(3) /* 0x88A8, VID == 0 */
sys/dev/etherswitch/felix/felix_reg.h
60
#define FELIX_ANA_PORT_DROP_CFG_CTAGGED BIT(4) /* 0x8100 */
sys/dev/etherswitch/felix/felix_reg.h
61
#define FELIX_ANA_PORT_DROP_CFG_STAGGED BIT(5) /* 0x88A8 */
sys/dev/etherswitch/felix/felix_reg.h
62
#define FELIX_ANA_PORT_DROP_CFG_UNTAGGED BIT(6)
sys/dev/etherswitch/felix/felix_reg.h
78
#define FELIX_DEVGMII_MAC_CFG_TX_ENA BIT(0)
sys/dev/etherswitch/felix/felix_reg.h
79
#define FELIX_DEVGMII_MAC_CFG_RX_ENA BIT(4)
sys/dev/etherswitch/felix/felix_reg.h
82
#define FELIX_DEVGMII_VLAN_CFG_ENA BIT(0) /* Accept 0x8100 only. */
sys/dev/etherswitch/felix/felix_reg.h
83
#define FELIX_DEVGMII_VLAN_CFG_DOUBLE_ENA BIT(1) /* Inner tag can only be 0x8100. */
sys/dev/etherswitch/felix/felix_reg.h
84
#define FELIX_DEVGMII_VLAN_CFG_LEN_ENA BIT(2) /* Enable VLANMTU. */
sys/dev/etherswitch/felix/felix_reg.h
89
#define FELIX_REW_PORT_TAG_CFG_MASK (BIT(7) | BIT(8))
sys/dev/etherswitch/felix/felix_reg.h
94
#define FELIX_SYS_RAM_CTRL_INIT BIT(1)
sys/dev/etherswitch/felix/felix_reg.h
97
#define FELIX_SYS_CFG_CORE_EN BIT(0)
sys/dev/flash/flexspi/flex_spi.h
116
#define FSPI_AHBRXBUF0CR7_PREF BIT(31)
sys/dev/flash/flexspi/flex_spi.h
140
#define FSPI_FLSHXCR1_WA BIT(10)
sys/dev/flash/flexspi/flex_spi.h
148
#define FSPI_FLSHXCR2_CLRINSP BIT(24)
sys/dev/flash/flexspi/flex_spi.h
149
#define FSPI_FLSHXCR2_AWRWAIT BIT(16)
sys/dev/flash/flexspi/flex_spi.h
158
#define FSPI_IPCR1_IPAREN BIT(31)
sys/dev/flash/flexspi/flex_spi.h
164
#define FSPI_IPCMD_TRG BIT(0)
sys/dev/flash/flexspi/flex_spi.h
169
#define FSPI_IPRXFCR_CLR BIT(0)
sys/dev/flash/flexspi/flex_spi.h
170
#define FSPI_IPRXFCR_DMA_EN BIT(1)
sys/dev/flash/flexspi/flex_spi.h
174
#define FSPI_IPTXFCR_CLR BIT(0)
sys/dev/flash/flexspi/flex_spi.h
175
#define FSPI_IPTXFCR_DMA_EN BIT(1)
sys/dev/flash/flexspi/flex_spi.h
179
#define FSPI_DLLACR_OVRDEN BIT(8)
sys/dev/flash/flexspi/flex_spi.h
182
#define FSPI_DLLBCR_OVRDEN BIT(8)
sys/dev/flash/flexspi/flex_spi.h
188
#define FSPI_STS0_ARB_IDLE BIT(1)
sys/dev/flash/flexspi/flex_spi.h
189
#define FSPI_STS0_SEQ_IDLE BIT(0)
sys/dev/flash/flexspi/flex_spi.h
200
#define FSPI_AHBSPNST_ACTIVE BIT(0)
sys/dev/flash/flexspi/flex_spi.h
320
#define FSPI_QUIRK_USE_IP_ONLY BIT(0)
sys/dev/flash/flexspi/flex_spi.h
328
#define STATUS_SRWD BIT(7)
sys/dev/flash/flexspi/flex_spi.h
329
#define STATUS_BP2 BIT(4)
sys/dev/flash/flexspi/flex_spi.h
330
#define STATUS_BP1 BIT(3)
sys/dev/flash/flexspi/flex_spi.h
331
#define STATUS_BP0 BIT(2)
sys/dev/flash/flexspi/flex_spi.h
332
#define STATUS_WEL BIT(1)
sys/dev/flash/flexspi/flex_spi.h
333
#define STATUS_WIP BIT(0)
sys/dev/flash/flexspi/flex_spi.h
35
#define FSPI_MCR0_LEARN_EN BIT(15)
sys/dev/flash/flexspi/flex_spi.h
36
#define FSPI_MCR0_SCRFRUN_EN BIT(14)
sys/dev/flash/flexspi/flex_spi.h
37
#define FSPI_MCR0_OCTCOMB_EN BIT(13)
sys/dev/flash/flexspi/flex_spi.h
38
#define FSPI_MCR0_DOZE_EN BIT(12)
sys/dev/flash/flexspi/flex_spi.h
39
#define FSPI_MCR0_HSEN BIT(11)
sys/dev/flash/flexspi/flex_spi.h
40
#define FSPI_MCR0_SERCLKDIV BIT(8)
sys/dev/flash/flexspi/flex_spi.h
41
#define FSPI_MCR0_ATDF_EN BIT(7)
sys/dev/flash/flexspi/flex_spi.h
42
#define FSPI_MCR0_ARDF_EN BIT(6)
sys/dev/flash/flexspi/flex_spi.h
45
#define FSPI_MCR0_MDIS BIT(1)
sys/dev/flash/flexspi/flex_spi.h
46
#define FSPI_MCR0_SWRST BIT(0)
sys/dev/flash/flexspi/flex_spi.h
54
#define FSPI_MCR2_SAMEDEVICEEN BIT(15)
sys/dev/flash/flexspi/flex_spi.h
55
#define FSPI_MCR2_CLRLRPHS BIT(14)
sys/dev/flash/flexspi/flex_spi.h
56
#define FSPI_MCR2_ABRDATSZ BIT(8)
sys/dev/flash/flexspi/flex_spi.h
57
#define FSPI_MCR2_ABRLEARN BIT(7)
sys/dev/flash/flexspi/flex_spi.h
58
#define FSPI_MCR2_ABR_READ BIT(6)
sys/dev/flash/flexspi/flex_spi.h
59
#define FSPI_MCR2_ABRWRITE BIT(5)
sys/dev/flash/flexspi/flex_spi.h
60
#define FSPI_MCR2_ABRDUMMY BIT(4)
sys/dev/flash/flexspi/flex_spi.h
61
#define FSPI_MCR2_ABR_MODE BIT(3)
sys/dev/flash/flexspi/flex_spi.h
62
#define FSPI_MCR2_ABRCADDR BIT(2)
sys/dev/flash/flexspi/flex_spi.h
63
#define FSPI_MCR2_ABRRADDR BIT(1)
sys/dev/flash/flexspi/flex_spi.h
64
#define FSPI_MCR2_ABR_CMD BIT(0)
sys/dev/flash/flexspi/flex_spi.h
67
#define FSPI_AHBCR_RDADDROPT BIT(6)
sys/dev/flash/flexspi/flex_spi.h
68
#define FSPI_AHBCR_PREF_EN BIT(5)
sys/dev/flash/flexspi/flex_spi.h
69
#define FSPI_AHBCR_BUFF_EN BIT(4)
sys/dev/flash/flexspi/flex_spi.h
70
#define FSPI_AHBCR_CACH_EN BIT(3)
sys/dev/flash/flexspi/flex_spi.h
71
#define FSPI_AHBCR_CLRTXBUF BIT(2)
sys/dev/flash/flexspi/flex_spi.h
72
#define FSPI_AHBCR_CLRRXBUF BIT(1)
sys/dev/flash/flexspi/flex_spi.h
73
#define FSPI_AHBCR_PAR_EN BIT(0)
sys/dev/flash/flexspi/flex_spi.h
76
#define FSPI_INTEN_SCLKSBWR BIT(9)
sys/dev/flash/flexspi/flex_spi.h
77
#define FSPI_INTEN_SCLKSBRD BIT(8)
sys/dev/flash/flexspi/flex_spi.h
78
#define FSPI_INTEN_DATALRNFL BIT(7)
sys/dev/flash/flexspi/flex_spi.h
79
#define FSPI_INTEN_IPTXWE BIT(6)
sys/dev/flash/flexspi/flex_spi.h
80
#define FSPI_INTEN_IPRXWA BIT(5)
sys/dev/flash/flexspi/flex_spi.h
81
#define FSPI_INTEN_AHBCMDERR BIT(4)
sys/dev/flash/flexspi/flex_spi.h
82
#define FSPI_INTEN_IPCMDERR BIT(3)
sys/dev/flash/flexspi/flex_spi.h
83
#define FSPI_INTEN_AHBCMDGE BIT(2)
sys/dev/flash/flexspi/flex_spi.h
84
#define FSPI_INTEN_IPCMDGE BIT(1)
sys/dev/flash/flexspi/flex_spi.h
85
#define FSPI_INTEN_IPCMDDONE BIT(0)
sys/dev/flash/flexspi/flex_spi.h
88
#define FSPI_INTR_SCLKSBWR BIT(9)
sys/dev/flash/flexspi/flex_spi.h
89
#define FSPI_INTR_SCLKSBRD BIT(8)
sys/dev/flash/flexspi/flex_spi.h
90
#define FSPI_INTR_DATALRNFL BIT(7)
sys/dev/flash/flexspi/flex_spi.h
91
#define FSPI_INTR_IPTXWE BIT(6)
sys/dev/flash/flexspi/flex_spi.h
92
#define FSPI_INTR_IPRXWA BIT(5)
sys/dev/flash/flexspi/flex_spi.h
93
#define FSPI_INTR_AHBCMDERR BIT(4)
sys/dev/flash/flexspi/flex_spi.h
94
#define FSPI_INTR_IPCMDERR BIT(3)
sys/dev/flash/flexspi/flex_spi.h
95
#define FSPI_INTR_AHBCMDGE BIT(2)
sys/dev/flash/flexspi/flex_spi.h
96
#define FSPI_INTR_IPCMDGE BIT(1)
sys/dev/flash/flexspi/flex_spi.h
97
#define FSPI_INTR_IPCMDDONE BIT(0)
sys/dev/gve/gve_adminq.h
222
#define GVE_CAP1(a) BIT((int) a)
sys/dev/gve/gve_adminq.h
223
#define GVE_CAP2(a) BIT(((int) a) - 64)
sys/dev/gve/gve_adminq.h
224
#define GVE_CAP3(a) BIT(((int) a) - 128)
sys/dev/gve/gve_adminq.h
225
#define GVE_CAP4(a) BIT(((int) a) - 192)
sys/dev/gve/gve_desc.h
147
#define GVE_IRQ_ACK BIT(31)
sys/dev/gve/gve_desc.h
148
#define GVE_IRQ_MASK BIT(30)
sys/dev/gve/gve_desc.h
149
#define GVE_IRQ_EVENT BIT(29)
sys/dev/gve/gve_desc.h
82
#define GVE_TXF_L4CSUM BIT(0) /* Need csum offload */
sys/dev/gve/gve_desc.h
83
#define GVE_TXF_TSTAMP BIT(2) /* Timestamp required */
sys/dev/gve/gve_desc.h
86
#define GVE_TXSF_IPV6 BIT(1) /* IPv6 TSO */
sys/dev/gve/gve_dqo.h
39
#define GVE_ITR_ENABLE_BIT_DQO BIT(0)
sys/dev/gve/gve_dqo.h
70
#define GVE_TX_BUF_SIZE_DQO BIT(GVE_TX_BUF_SHIFT_DQO)
sys/dev/gve/gve_register.h
50
GVE_DEVICE_STATUS_RESET_MASK = BIT(1),
sys/dev/gve/gve_register.h
51
GVE_DEVICE_STATUS_LINK_STATUS_MASK = BIT(2),
sys/dev/hyperv/vmbus/aarch64/hyperv_machdep.c
39
#define HV_HYPERCALL_FAST_BIT BIT(16)
sys/dev/hyperv/vmbus/vmbus_var.h
148
#define HV_FLUSH_ALL_PROCESSORS BIT(0)
sys/dev/hyperv/vmbus/vmbus_var.h
149
#define HV_FLUSH_ALL_VIRTUAL_ADDRESS_SPACES BIT(1)
sys/dev/hyperv/vmbus/vmbus_var.h
150
#define HV_FLUSH_NON_GLOBAL_MAPPINGS_ONLY BIT(2)
sys/dev/hyperv/vmbus/vmbus_var.h
165
#define HYPERV_X64_EX_PROCESSOR_MASKS_RECOMMENDED BIT(11)
sys/dev/iavf/iavf_lib.h
339
atomic_set_32(s, BIT(bit));
sys/dev/iavf/iavf_lib.h
353
atomic_clear_32(s, BIT(bit));
sys/dev/iavf/iavf_lib.h
402
return (*s & BIT(bit)) ? true : false;
sys/dev/iavf/iavf_type.h
273
#define IAVF_NVMUPD_FEATURE_FLAT_NVM_SUPPORT BIT(0)
sys/dev/iavf/iavf_type.h
498
#define IAVF_RXD_QW1_STATUS_MASK ((BIT(IAVF_RX_DESC_STATUS_LAST) - 1) \
sys/dev/iavf/iavf_type.h
987
#define IAVF_SR_OCP_ENABLED BIT(15)
sys/dev/iavf/virtchnl.h
100
VIRTCHNL_LINK_SPEED_2_5GB = BIT(VIRTCHNL_LINK_SPEED_2_5GB_SHIFT),
sys/dev/iavf/virtchnl.h
101
VIRTCHNL_LINK_SPEED_5GB = BIT(VIRTCHNL_LINK_SPEED_5GB_SHIFT),
sys/dev/iavf/virtchnl.h
94
VIRTCHNL_LINK_SPEED_100MB = BIT(VIRTCHNL_LINK_SPEED_100MB_SHIFT),
sys/dev/iavf/virtchnl.h
95
VIRTCHNL_LINK_SPEED_1GB = BIT(VIRTCHNL_LINK_SPEED_1000MB_SHIFT),
sys/dev/iavf/virtchnl.h
96
VIRTCHNL_LINK_SPEED_10GB = BIT(VIRTCHNL_LINK_SPEED_10GB_SHIFT),
sys/dev/iavf/virtchnl.h
97
VIRTCHNL_LINK_SPEED_40GB = BIT(VIRTCHNL_LINK_SPEED_40GB_SHIFT),
sys/dev/iavf/virtchnl.h
98
VIRTCHNL_LINK_SPEED_20GB = BIT(VIRTCHNL_LINK_SPEED_20GB_SHIFT),
sys/dev/iavf/virtchnl.h
99
VIRTCHNL_LINK_SPEED_25GB = BIT(VIRTCHNL_LINK_SPEED_25GB_SHIFT),
sys/dev/ice/ice_adminq_cmd.h
1005
#define ICE_AQC_PFC_IGNORE_SET BIT(7)
sys/dev/ice/ice_adminq_cmd.h
1027
#define ICE_AQC_LINK_UP_DCB_CFG BIT(0)
sys/dev/ice/ice_adminq_cmd.h
1028
#define ICE_AQC_PERSIST_DCB_CFG BIT(1)
sys/dev/ice/ice_adminq_cmd.h
1030
#define ICE_AQC_LINK_UP_DCB_CFG_VALID BIT(0)
sys/dev/ice/ice_adminq_cmd.h
1031
#define ICE_AQC_PERSIST_DCB_CFG_VALID BIT(1)
sys/dev/ice/ice_adminq_cmd.h
1048
#define ICE_AQC_TX_TOPO_FLAGS_CORRER BIT(0)
sys/dev/ice/ice_adminq_cmd.h
1049
#define ICE_AQC_TX_TOPO_FLAGS_SRC_RAM BIT(1)
sys/dev/ice/ice_adminq_cmd.h
1050
#define ICE_AQC_TX_TOPO_FLAGS_SET_PSM BIT(2)
sys/dev/ice/ice_adminq_cmd.h
1051
#define ICE_AQC_TX_TOPO_FLAGS_LOAD_NEW BIT(4)
sys/dev/ice/ice_adminq_cmd.h
1052
#define ICE_AQC_TX_TOPO_FLAGS_ISSUED BIT(5)
sys/dev/ice/ice_adminq_cmd.h
1107
#define ICE_AQC_ELEM_VALID_GENERIC BIT(0)
sys/dev/ice/ice_adminq_cmd.h
1108
#define ICE_AQC_ELEM_VALID_CIR BIT(1)
sys/dev/ice/ice_adminq_cmd.h
1109
#define ICE_AQC_ELEM_VALID_EIR BIT(2)
sys/dev/ice/ice_adminq_cmd.h
1110
#define ICE_AQC_ELEM_VALID_SHARED BIT(3)
sys/dev/ice/ice_adminq_cmd.h
1304
#define ICE_AQC_GET_PHY_RQM BIT(0)
sys/dev/ice/ice_adminq_cmd.h
1315
#define ICE_AQC_REPORT_TOPO_CAP_MEDIA BIT(1)
sys/dev/ice/ice_adminq_cmd.h
1316
#define ICE_AQC_REPORT_ACTIVE_CFG BIT(2)
sys/dev/ice/ice_adminq_cmd.h
1317
#define ICE_AQC_REPORT_DFLT_CFG BIT(3)
sys/dev/ice/ice_adminq_cmd.h
1414
#define ICE_AQC_PHY_EN_TX_LINK_PAUSE BIT(0)
sys/dev/ice/ice_adminq_cmd.h
1415
#define ICE_AQC_PHY_EN_RX_LINK_PAUSE BIT(1)
sys/dev/ice/ice_adminq_cmd.h
1416
#define ICE_AQC_PHY_LOW_POWER_MODE BIT(2)
sys/dev/ice/ice_adminq_cmd.h
1417
#define ICE_AQC_PHY_EN_LINK BIT(3)
sys/dev/ice/ice_adminq_cmd.h
1418
#define ICE_AQC_PHY_AN_MODE BIT(4)
sys/dev/ice/ice_adminq_cmd.h
1419
#define ICE_AQC_PHY_EN_MOD_QUAL BIT(5)
sys/dev/ice/ice_adminq_cmd.h
1420
#define ICE_AQC_PHY_EN_LESM BIT(6)
sys/dev/ice/ice_adminq_cmd.h
1421
#define ICE_AQC_PHY_EN_AUTO_FEC BIT(7)
sys/dev/ice/ice_adminq_cmd.h
1424
#define ICE_AQC_PHY_EN_D3COLD_LOW_POWER_AUTONEG BIT(0)
sys/dev/ice/ice_adminq_cmd.h
1425
#define ICE_AQC_PHY_AN_EN_CLAUSE28 BIT(1)
sys/dev/ice/ice_adminq_cmd.h
1426
#define ICE_AQC_PHY_AN_EN_CLAUSE73 BIT(2)
sys/dev/ice/ice_adminq_cmd.h
1427
#define ICE_AQC_PHY_AN_EN_CLAUSE37 BIT(3)
sys/dev/ice/ice_adminq_cmd.h
1429
#define ICE_AQC_PHY_EEE_EN_100BASE_TX BIT(0)
sys/dev/ice/ice_adminq_cmd.h
1430
#define ICE_AQC_PHY_EEE_EN_1000BASE_T BIT(1)
sys/dev/ice/ice_adminq_cmd.h
1431
#define ICE_AQC_PHY_EEE_EN_10GBASE_T BIT(2)
sys/dev/ice/ice_adminq_cmd.h
1432
#define ICE_AQC_PHY_EEE_EN_1000BASE_KX BIT(3)
sys/dev/ice/ice_adminq_cmd.h
1433
#define ICE_AQC_PHY_EEE_EN_10GBASE_KR BIT(4)
sys/dev/ice/ice_adminq_cmd.h
1434
#define ICE_AQC_PHY_EEE_EN_25GBASE_KR BIT(5)
sys/dev/ice/ice_adminq_cmd.h
1435
#define ICE_AQC_PHY_EEE_EN_40GBASE_KR4 BIT(6)
sys/dev/ice/ice_adminq_cmd.h
1436
#define ICE_AQC_PHY_EEE_EN_50GBASE_KR2 BIT(7)
sys/dev/ice/ice_adminq_cmd.h
1437
#define ICE_AQC_PHY_EEE_EN_50GBASE_KR_PAM4 BIT(8)
sys/dev/ice/ice_adminq_cmd.h
1438
#define ICE_AQC_PHY_EEE_EN_100GBASE_KR4 BIT(9)
sys/dev/ice/ice_adminq_cmd.h
1439
#define ICE_AQC_PHY_EEE_EN_100GBASE_KR2_PAM4 BIT(10)
sys/dev/ice/ice_adminq_cmd.h
1444
#define ICE_AQC_PHY_FEC_10G_KR_40G_KR4_EN BIT(0)
sys/dev/ice/ice_adminq_cmd.h
1445
#define ICE_AQC_PHY_FEC_10G_KR_40G_KR4_REQ BIT(1)
sys/dev/ice/ice_adminq_cmd.h
1446
#define ICE_AQC_PHY_FEC_25G_RS_528_REQ BIT(2)
sys/dev/ice/ice_adminq_cmd.h
1447
#define ICE_AQC_PHY_FEC_25G_KR_REQ BIT(3)
sys/dev/ice/ice_adminq_cmd.h
1448
#define ICE_AQC_PHY_FEC_25G_RS_544_REQ BIT(4)
sys/dev/ice/ice_adminq_cmd.h
1449
#define ICE_AQC_PHY_FEC_DIS BIT(5)
sys/dev/ice/ice_adminq_cmd.h
1450
#define ICE_AQC_PHY_FEC_25G_RS_CLAUSE91_EN BIT(6)
sys/dev/ice/ice_adminq_cmd.h
1451
#define ICE_AQC_PHY_FEC_25G_KR_CLAUSE74_EN BIT(7)
sys/dev/ice/ice_adminq_cmd.h
1454
#define ICE_AQC_MOD_ENFORCE_STRICT_MODE BIT(0)
sys/dev/ice/ice_adminq_cmd.h
1461
#define ICE_AQC_MOD_TYPE_BYTE1_SFP_PLUS_CU_PASSIVE BIT(0)
sys/dev/ice/ice_adminq_cmd.h
1462
#define ICE_AQC_MOD_TYPE_BYTE1_SFP_PLUS_CU_ACTIVE BIT(1)
sys/dev/ice/ice_adminq_cmd.h
1463
#define ICE_AQC_MOD_TYPE_BYTE1_10G_BASE_SR BIT(4)
sys/dev/ice/ice_adminq_cmd.h
1464
#define ICE_AQC_MOD_TYPE_BYTE1_10G_BASE_LR BIT(5)
sys/dev/ice/ice_adminq_cmd.h
1465
#define ICE_AQC_MOD_TYPE_BYTE1_10G_BASE_LRM BIT(6)
sys/dev/ice/ice_adminq_cmd.h
1466
#define ICE_AQC_MOD_TYPE_BYTE1_10G_BASE_ER BIT(7)
sys/dev/ice/ice_adminq_cmd.h
1497
#define ICE_AQ_PHY_ENA_TX_PAUSE_ABILITY BIT(0)
sys/dev/ice/ice_adminq_cmd.h
1498
#define ICE_AQ_PHY_ENA_RX_PAUSE_ABILITY BIT(1)
sys/dev/ice/ice_adminq_cmd.h
1499
#define ICE_AQ_PHY_ENA_LOW_POWER BIT(2)
sys/dev/ice/ice_adminq_cmd.h
1500
#define ICE_AQ_PHY_ENA_LINK BIT(3)
sys/dev/ice/ice_adminq_cmd.h
1501
#define ICE_AQ_PHY_ENA_AUTO_LINK_UPDT BIT(5)
sys/dev/ice/ice_adminq_cmd.h
1502
#define ICE_AQ_PHY_ENA_LESM BIT(6)
sys/dev/ice/ice_adminq_cmd.h
1503
#define ICE_AQ_PHY_ENA_AUTO_FEC BIT(7)
sys/dev/ice/ice_adminq_cmd.h
1517
#define ICE_AQ_SET_MAC_PACE_TYPE_M BIT(7)
sys/dev/ice/ice_adminq_cmd.h
1524
#define ICE_AQ_SET_MAC_AUTO_DROP_MASK BIT(0)
sys/dev/ice/ice_adminq_cmd.h
1526
#define ICE_AQ_SET_MAC_AUTO_DROP_BLOCKING_PKTS BIT(0)
sys/dev/ice/ice_adminq_cmd.h
1537
#define ICE_AQC_RESTART_AN_LINK_RESTART BIT(1)
sys/dev/ice/ice_adminq_cmd.h
1538
#define ICE_AQC_RESTART_AN_LINK_ENABLE BIT(2)
sys/dev/ice/ice_adminq_cmd.h
1570
#define ICE_AQ_LINK_TOPO_CONFLICT BIT(0)
sys/dev/ice/ice_adminq_cmd.h
1571
#define ICE_AQ_LINK_MEDIA_CONFLICT BIT(1)
sys/dev/ice/ice_adminq_cmd.h
1572
#define ICE_AQ_LINK_TOPO_CORRUPT BIT(2)
sys/dev/ice/ice_adminq_cmd.h
1573
#define ICE_AQ_LINK_TOPO_UNREACH_PRT BIT(4)
sys/dev/ice/ice_adminq_cmd.h
1574
#define ICE_AQ_LINK_TOPO_UNDRUTIL_PRT BIT(5)
sys/dev/ice/ice_adminq_cmd.h
1575
#define ICE_AQ_LINK_TOPO_UNDRUTIL_MEDIA BIT(6)
sys/dev/ice/ice_adminq_cmd.h
1576
#define ICE_AQ_LINK_TOPO_UNSUPP_MEDIA BIT(7)
sys/dev/ice/ice_adminq_cmd.h
1578
#define ICE_AQ_LINK_CFG_ERR BIT(0)
sys/dev/ice/ice_adminq_cmd.h
1579
#define ICE_AQ_LINK_ACT_PORT_OPT_INVAL BIT(2)
sys/dev/ice/ice_adminq_cmd.h
1580
#define ICE_AQ_LINK_FEAT_ID_OR_CONFIG_ID_INVAL BIT(3)
sys/dev/ice/ice_adminq_cmd.h
1581
#define ICE_AQ_LINK_TOPO_CRITICAL_SDP_ERR BIT(4)
sys/dev/ice/ice_adminq_cmd.h
1582
#define ICE_AQ_LINK_MODULE_POWER_UNSUPPORTED BIT(5)
sys/dev/ice/ice_adminq_cmd.h
1583
#define ICE_AQ_LINK_EXTERNAL_PHY_LOAD_FAILURE BIT(6)
sys/dev/ice/ice_adminq_cmd.h
1584
#define ICE_AQ_LINK_INVAL_MAX_POWER_LIMIT BIT(7)
sys/dev/ice/ice_adminq_cmd.h
1586
#define ICE_AQ_LINK_UP BIT(0) /* Link Status */
sys/dev/ice/ice_adminq_cmd.h
1587
#define ICE_AQ_LINK_FAULT BIT(1)
sys/dev/ice/ice_adminq_cmd.h
1588
#define ICE_AQ_LINK_FAULT_TX BIT(2)
sys/dev/ice/ice_adminq_cmd.h
1589
#define ICE_AQ_LINK_FAULT_RX BIT(3)
sys/dev/ice/ice_adminq_cmd.h
1590
#define ICE_AQ_LINK_FAULT_REMOTE BIT(4)
sys/dev/ice/ice_adminq_cmd.h
1591
#define ICE_AQ_LINK_UP_PORT BIT(5) /* External Port Link Status */
sys/dev/ice/ice_adminq_cmd.h
1592
#define ICE_AQ_MEDIA_AVAILABLE BIT(6)
sys/dev/ice/ice_adminq_cmd.h
1593
#define ICE_AQ_SIGNAL_DETECT BIT(7)
sys/dev/ice/ice_adminq_cmd.h
1595
#define ICE_AQ_AN_COMPLETED BIT(0)
sys/dev/ice/ice_adminq_cmd.h
1596
#define ICE_AQ_LP_AN_ABILITY BIT(1)
sys/dev/ice/ice_adminq_cmd.h
1597
#define ICE_AQ_PD_FAULT BIT(2) /* Parallel Detection Fault */
sys/dev/ice/ice_adminq_cmd.h
1598
#define ICE_AQ_FEC_EN BIT(3)
sys/dev/ice/ice_adminq_cmd.h
1599
#define ICE_AQ_PHY_LOW_POWER BIT(4) /* Low Power State */
sys/dev/ice/ice_adminq_cmd.h
1600
#define ICE_AQ_LINK_PAUSE_TX BIT(5)
sys/dev/ice/ice_adminq_cmd.h
1601
#define ICE_AQ_LINK_PAUSE_RX BIT(6)
sys/dev/ice/ice_adminq_cmd.h
1602
#define ICE_AQ_QUALIFIED_MODULE BIT(7)
sys/dev/ice/ice_adminq_cmd.h
1604
#define ICE_AQ_LINK_PHY_TEMP_ALARM BIT(0)
sys/dev/ice/ice_adminq_cmd.h
1605
#define ICE_AQ_LINK_EXCESSIVE_ERRORS BIT(1) /* Excessive Link Errors */
sys/dev/ice/ice_adminq_cmd.h
1613
#define ICE_AQ_LINK_LB_PHY_LCL BIT(0)
sys/dev/ice/ice_adminq_cmd.h
1614
#define ICE_AQ_LINK_LB_PHY_RMT BIT(1)
sys/dev/ice/ice_adminq_cmd.h
1615
#define ICE_AQ_LINK_LB_MAC_LCL BIT(2)
sys/dev/ice/ice_adminq_cmd.h
1620
#define ICE_AQ_LINK_25G_KR_FEC_EN BIT(0)
sys/dev/ice/ice_adminq_cmd.h
1621
#define ICE_AQ_LINK_25G_RS_528_FEC_EN BIT(1)
sys/dev/ice/ice_adminq_cmd.h
1622
#define ICE_AQ_LINK_25G_RS_544_FEC_EN BIT(2)
sys/dev/ice/ice_adminq_cmd.h
1627
#define ICE_AQ_CFG_PACING_TYPE_M BIT(7)
sys/dev/ice/ice_adminq_cmd.h
1641
#define ICE_AQ_LINK_SPEED_10MB BIT(0)
sys/dev/ice/ice_adminq_cmd.h
1642
#define ICE_AQ_LINK_SPEED_100MB BIT(1)
sys/dev/ice/ice_adminq_cmd.h
1643
#define ICE_AQ_LINK_SPEED_1000MB BIT(2)
sys/dev/ice/ice_adminq_cmd.h
1644
#define ICE_AQ_LINK_SPEED_2500MB BIT(3)
sys/dev/ice/ice_adminq_cmd.h
1645
#define ICE_AQ_LINK_SPEED_5GB BIT(4)
sys/dev/ice/ice_adminq_cmd.h
1646
#define ICE_AQ_LINK_SPEED_10GB BIT(5)
sys/dev/ice/ice_adminq_cmd.h
1647
#define ICE_AQ_LINK_SPEED_20GB BIT(6)
sys/dev/ice/ice_adminq_cmd.h
1648
#define ICE_AQ_LINK_SPEED_25GB BIT(7)
sys/dev/ice/ice_adminq_cmd.h
1649
#define ICE_AQ_LINK_SPEED_40GB BIT(8)
sys/dev/ice/ice_adminq_cmd.h
1650
#define ICE_AQ_LINK_SPEED_50GB BIT(9)
sys/dev/ice/ice_adminq_cmd.h
1651
#define ICE_AQ_LINK_SPEED_100GB BIT(10)
sys/dev/ice/ice_adminq_cmd.h
1652
#define ICE_AQ_LINK_SPEED_200GB BIT(11)
sys/dev/ice/ice_adminq_cmd.h
1653
#define ICE_AQ_LINK_SPEED_UNKNOWN BIT(15)
sys/dev/ice/ice_adminq_cmd.h
1656
#define ICE_AQ_LINK_RS_272_FEC_EN BIT(0) /* RS 272 FEC enabled */
sys/dev/ice/ice_adminq_cmd.h
1664
#define ICE_AQ_LINK_LP_10G_KR_FEC_CAP BIT(0)
sys/dev/ice/ice_adminq_cmd.h
1665
#define ICE_AQ_LINK_LP_25G_KR_FEC_CAP BIT(1)
sys/dev/ice/ice_adminq_cmd.h
1666
#define ICE_AQ_LINK_LP_RS_528_FEC_CAP BIT(2)
sys/dev/ice/ice_adminq_cmd.h
1667
#define ICE_AQ_LINK_LP_50G_KR_272_FEC_CAP BIT(3)
sys/dev/ice/ice_adminq_cmd.h
1668
#define ICE_AQ_LINK_LP_100G_KR_272_FEC_CAP BIT(4)
sys/dev/ice/ice_adminq_cmd.h
1669
#define ICE_AQ_LINK_LP_200G_KR_272_FEC_CAP BIT(5)
sys/dev/ice/ice_adminq_cmd.h
1671
#define ICE_AQ_LINK_LP_10G_KR_FEC_REQ BIT(0)
sys/dev/ice/ice_adminq_cmd.h
1672
#define ICE_AQ_LINK_LP_25G_KR_FEC_REQ BIT(1)
sys/dev/ice/ice_adminq_cmd.h
1673
#define ICE_AQ_LINK_LP_RS_528_FEC_REQ BIT(2)
sys/dev/ice/ice_adminq_cmd.h
1674
#define ICE_AQ_LINK_LP_KR_272_FEC_REQ BIT(3)
sys/dev/ice/ice_adminq_cmd.h
1676
#define ICE_AQ_LINK_LP_PAUSE_ADV BIT(0)
sys/dev/ice/ice_adminq_cmd.h
1677
#define ICE_AQ_LINK_LP_ASM_DIR_ADV BIT(1)
sys/dev/ice/ice_adminq_cmd.h
1688
#define ICE_AQ_LINK_EVENT_UPDOWN BIT(1)
sys/dev/ice/ice_adminq_cmd.h
1689
#define ICE_AQ_LINK_EVENT_MEDIA_NA BIT(2)
sys/dev/ice/ice_adminq_cmd.h
1690
#define ICE_AQ_LINK_EVENT_LINK_FAULT BIT(3)
sys/dev/ice/ice_adminq_cmd.h
1691
#define ICE_AQ_LINK_EVENT_PHY_TEMP_ALARM BIT(4)
sys/dev/ice/ice_adminq_cmd.h
1692
#define ICE_AQ_LINK_EVENT_EXCESSIVE_ERRORS BIT(5)
sys/dev/ice/ice_adminq_cmd.h
1693
#define ICE_AQ_LINK_EVENT_SIGNAL_DETECT BIT(6)
sys/dev/ice/ice_adminq_cmd.h
1694
#define ICE_AQ_LINK_EVENT_AN_COMPLETED BIT(7)
sys/dev/ice/ice_adminq_cmd.h
1695
#define ICE_AQ_LINK_EVENT_MODULE_QUAL_FAIL BIT(8)
sys/dev/ice/ice_adminq_cmd.h
1696
#define ICE_AQ_LINK_EVENT_PORT_TX_SUSPENDED BIT(9)
sys/dev/ice/ice_adminq_cmd.h
1697
#define ICE_AQ_LINK_EVENT_TOPO_CONFLICT BIT(10)
sys/dev/ice/ice_adminq_cmd.h
1698
#define ICE_AQ_LINK_EVENT_MEDIA_CONFLICT BIT(11)
sys/dev/ice/ice_adminq_cmd.h
1699
#define ICE_AQ_LINK_EVENT_PHY_FW_LOAD_FAIL BIT(12)
sys/dev/ice/ice_adminq_cmd.h
1707
#define ICE_AQ_PHY_LB_PORT_NUM_VALID BIT(0)
sys/dev/ice/ice_adminq_cmd.h
1710
#define ICE_AQ_PHY_LB_EN BIT(0)
sys/dev/ice/ice_adminq_cmd.h
1711
#define ICE_AQ_PHY_LB_TYPE_M BIT(1)
sys/dev/ice/ice_adminq_cmd.h
1714
#define ICE_AQ_PHY_LB_LEVEL_M BIT(2)
sys/dev/ice/ice_adminq_cmd.h
1723
#define ICE_AQ_MAC_LB_EN BIT(0)
sys/dev/ice/ice_adminq_cmd.h
1724
#define ICE_AQ_MAC_LB_OSC_CLK BIT(1)
sys/dev/ice/ice_adminq_cmd.h
1773
#define ICE_AQ_DNL_FLAGS_ERROR BIT(2)
sys/dev/ice/ice_adminq_cmd.h
1774
#define ICE_AQ_DNL_FLAGS_NEGATIVE BIT(3)
sys/dev/ice/ice_adminq_cmd.h
1775
#define ICE_AQ_DNL_FLAGS_OVERFLOW BIT(4)
sys/dev/ice/ice_adminq_cmd.h
1776
#define ICE_AQ_DNL_FLAGS_ZERO BIT(5)
sys/dev/ice/ice_adminq_cmd.h
1777
#define ICE_AQ_DNL_FLAGS_CARRY BIT(6)
sys/dev/ice/ice_adminq_cmd.h
1778
#define ICE_AQ_DNL_FLAGS_JUMP BIT(7)
sys/dev/ice/ice_adminq_cmd.h
1949
#define ICE_AQC_LINK_TOPO_PORT_NUM_VALID BIT(0)
sys/dev/ice/ice_adminq_cmd.h
1980
#define ICE_AQC_LINK_TOPO_HANDLE_BRD_TYPE_M BIT(9)
sys/dev/ice/ice_adminq_cmd.h
1982
#define ICE_AQC_LINK_TOPO_HANDLE_BRD_TYPE_MEZZ BIT(9)
sys/dev/ice/ice_adminq_cmd.h
2009
#define ICE_AQC_I2C_ADDR_TYPE_M BIT(4)
sys/dev/ice/ice_adminq_cmd.h
2014
#define ICE_AQC_I2C_USE_REPEATED_START BIT(7)
sys/dev/ice/ice_adminq_cmd.h
2033
#define ICE_AQC_MDIO_CLAUSE_22 BIT(5)
sys/dev/ice/ice_adminq_cmd.h
2034
#define ICE_AQC_MDIO_CLAUSE_45 BIT(6)
sys/dev/ice/ice_adminq_cmd.h
2050
#define ICE_AQC_GPIO_ON BIT(0)
sys/dev/ice/ice_adminq_cmd.h
208
#define ICE_AQC_MAN_MAC_LAN_ADDR_VALID BIT(4)
sys/dev/ice/ice_adminq_cmd.h
2084
#define ICE_AQC_PORT_ID_PORT_NUM_VALID BIT(0)
sys/dev/ice/ice_adminq_cmd.h
2086
#define ICE_AQC_PORT_IDENT_LED_BLINK BIT(0)
sys/dev/ice/ice_adminq_cmd.h
209
#define ICE_AQC_MAN_MAC_SAN_ADDR_VALID BIT(5)
sys/dev/ice/ice_adminq_cmd.h
2095
#define ICE_AQC_PORT_OPT_PORT_NUM_VALID BIT(0)
sys/dev/ice/ice_adminq_cmd.h
210
#define ICE_AQC_MAN_MAC_PORT_ADDR_VALID BIT(6)
sys/dev/ice/ice_adminq_cmd.h
2104
#define ICE_AQC_PORT_OPT_FORCED BIT(6)
sys/dev/ice/ice_adminq_cmd.h
2105
#define ICE_AQC_PORT_OPT_VALID BIT(7)
sys/dev/ice/ice_adminq_cmd.h
2109
#define ICE_AQC_PENDING_PORT_OPT_VALID BIT(7)
sys/dev/ice/ice_adminq_cmd.h
211
#define ICE_AQC_MAN_MAC_WOL_ADDR_VALID BIT(7)
sys/dev/ice/ice_adminq_cmd.h
212
#define ICE_AQC_MAN_MAC_MC_MAG_EN BIT(8)
sys/dev/ice/ice_adminq_cmd.h
213
#define ICE_AQC_MAN_MAC_WOL_PRESERVE_ON_PFR BIT(9)
sys/dev/ice/ice_adminq_cmd.h
2144
#define ICE_AQC_SET_PORT_OPT_PORT_NUM_VALID BIT(0)
sys/dev/ice/ice_adminq_cmd.h
2163
#define ICE_AQC_SFF_PORT_NUM_VALID BIT(0)
sys/dev/ice/ice_adminq_cmd.h
2167
#define ICE_AQC_SFF_I2CBUS_TYPE_M BIT(10)
sys/dev/ice/ice_adminq_cmd.h
2175
#define ICE_AQC_SFF_IS_WRITE BIT(15)
sys/dev/ice/ice_adminq_cmd.h
2197
#define ICE_AQC_SW_GPIO_PARAMS_DIRECTION BIT(1)
sys/dev/ice/ice_adminq_cmd.h
2198
#define ICE_AQC_SW_GPIO_PARAMS_VALUE BIT(0)
sys/dev/ice/ice_adminq_cmd.h
2227
#define ICE_AQC_NVM_LAST_CMD BIT(0)
sys/dev/ice/ice_adminq_cmd.h
2228
#define ICE_AQC_NVM_PCIR_REQ BIT(0) /* Used by NVM Write reply */
sys/dev/ice/ice_adminq_cmd.h
2232
#define ICE_AQC_NVM_PRESERVE_ALL BIT(1)
sys/dev/ice/ice_adminq_cmd.h
2235
#define ICE_AQC_NVM_ACTIV_SEL_NVM BIT(3) /* Write Activate/SR Dump only */
sys/dev/ice/ice_adminq_cmd.h
2236
#define ICE_AQC_NVM_ACTIV_SEL_OROM BIT(4)
sys/dev/ice/ice_adminq_cmd.h
2237
#define ICE_AQC_NVM_ACTIV_SEL_NETLIST BIT(5)
sys/dev/ice/ice_adminq_cmd.h
2238
#define ICE_AQC_NVM_SPECIAL_UPDATE BIT(6)
sys/dev/ice/ice_adminq_cmd.h
2239
#define ICE_AQC_NVM_REVERT_LAST_ACTIV BIT(6) /* Write Activate only */
sys/dev/ice/ice_adminq_cmd.h
2241
#define ICE_AQC_NVM_FLASH_ONLY BIT(7)
sys/dev/ice/ice_adminq_cmd.h
2246
#define ICE_AQC_NVM_EMPR_ENA BIT(0) /* Write Activate reply only */
sys/dev/ice/ice_adminq_cmd.h
2252
#define ICE_AQC_NVM_ACTIV_REQ_EMPR BIT(8) /* NVM Write Activate only */
sys/dev/ice/ice_adminq_cmd.h
2269
#define ICE_AQC_NVM_EMP_SR_PTR_TYPE_M BIT(15)
sys/dev/ice/ice_adminq_cmd.h
2285
#define ICE_AQC_NVM_SDP_CFG_PTR_TYPE_M BIT(15)
sys/dev/ice/ice_adminq_cmd.h
2312
#define ICE_AQC_NVM_CMPO_ENABLE BIT(8)
sys/dev/ice/ice_adminq_cmd.h
2323
#define ICE_AQC_NVM_MINSREV_NVM_VALID BIT(0)
sys/dev/ice/ice_adminq_cmd.h
2324
#define ICE_AQC_NVM_MINSREV_OROM_VALID BIT(1)
sys/dev/ice/ice_adminq_cmd.h
2334
#define ICE_AQC_NVM_TX_TOPO_USER_SEL BIT(4)
sys/dev/ice/ice_adminq_cmd.h
2341
#define ICE_AQC_ANVM_MULTIPLE_ELEMS BIT(0)
sys/dev/ice/ice_adminq_cmd.h
2342
#define ICE_AQC_ANVM_IMMEDIATE_FIELD BIT(1)
sys/dev/ice/ice_adminq_cmd.h
2343
#define ICE_AQC_ANVM_NEW_CFG BIT(2)
sys/dev/ice/ice_adminq_cmd.h
236
#define ICE_AQC_MAN_MAC_WR_MC_MAG_EN BIT(0)
sys/dev/ice/ice_adminq_cmd.h
2361
#define ICE_AQC_NVM_CHECKSUM_VERIFY BIT(0)
sys/dev/ice/ice_adminq_cmd.h
2362
#define ICE_AQC_NVM_CHECKSUM_RECALC BIT(1)
sys/dev/ice/ice_adminq_cmd.h
237
#define ICE_AQC_MAN_MAC_WR_WOL_LAA_PFR_KEEP BIT(1)
sys/dev/ice/ice_adminq_cmd.h
2373
#define ICE_AQ_NVM_SANITIZE_REQ_OPERATE BIT(0)
sys/dev/ice/ice_adminq_cmd.h
2376
#define ICE_AQ_NVM_SANITIZE_READ_SUBJECT_NVM_STATE BIT(1)
sys/dev/ice/ice_adminq_cmd.h
2379
#define ICE_AQ_NVM_SANITIZE_NVM_BITS_HOST_CLEAN_SUPPORT BIT(0)
sys/dev/ice/ice_adminq_cmd.h
2380
#define ICE_AQ_NVM_SANITIZE_NVM_BITS_BMC_CLEAN_SUPPORT BIT(2)
sys/dev/ice/ice_adminq_cmd.h
2381
#define ICE_AQ_NVM_SANITIZE_NVM_STATE_HOST_CLEAN_DONE BIT(0)
sys/dev/ice/ice_adminq_cmd.h
2382
#define ICE_AQ_NVM_SANITIZE_NVM_STATE_HOST_CLEAN_SUCCESS BIT(1)
sys/dev/ice/ice_adminq_cmd.h
2383
#define ICE_AQ_NVM_SANITIZE_NVM_STATE_BMC_CLEAN_DONE BIT(2)
sys/dev/ice/ice_adminq_cmd.h
2384
#define ICE_AQ_NVM_SANITIZE_NVM_STATE_BMC_CLEAN_SUCCESS BIT(3)
sys/dev/ice/ice_adminq_cmd.h
2385
#define ICE_AQ_NVM_SANITIZE_OPERATE_HOST_CLEAN_DONE BIT(0)
sys/dev/ice/ice_adminq_cmd.h
2386
#define ICE_AQ_NVM_SANITIZE_OPERATE_HOST_CLEAN_SUCCESS BIT(1)
sys/dev/ice/ice_adminq_cmd.h
2387
#define ICE_AQ_NVM_SANITIZE_OPERATE_BMC_CLEAN_DONE BIT(2)
sys/dev/ice/ice_adminq_cmd.h
2388
#define ICE_AQ_NVM_SANITIZE_OPERATE_BMC_CLEAN_SUCCESS BIT(3)
sys/dev/ice/ice_adminq_cmd.h
241
#define ICE_AQC_MAN_MAC_UPDATE_LAA_WOL BIT(ICE_AQC_MAN_MAC_WR_S)
sys/dev/ice/ice_adminq_cmd.h
2424
#define ICE_AQC_CMD_UEFI_BIOS_MODE BIT(0)
sys/dev/ice/ice_adminq_cmd.h
2425
#define ICE_AQC_RESP_RESET_NEEDED BIT(1)
sys/dev/ice/ice_adminq_cmd.h
2518
#define ICE_AQ_LLDP_AGENT_STATE_MASK BIT(0)
sys/dev/ice/ice_adminq_cmd.h
2521
#define ICE_AQ_LLDP_AGENT_PERSIST_DIS BIT(1)
sys/dev/ice/ice_adminq_cmd.h
2528
#define ICE_AQ_LLDP_AGENT_START BIT(0)
sys/dev/ice/ice_adminq_cmd.h
2529
#define ICE_AQ_LLDP_AGENT_PERSIST_ENA BIT(1)
sys/dev/ice/ice_adminq_cmd.h
2568
#define SET_LOCAL_MIB_TYPE_DCBX_M BIT(0)
sys/dev/ice/ice_adminq_cmd.h
2570
#define SET_LOCAL_MIB_TYPE_CEE_M BIT(1)
sys/dev/ice/ice_adminq_cmd.h
258
#define ICE_AQC_FORCE_NO_DROP BIT(0)
sys/dev/ice/ice_adminq_cmd.h
2582
#define SET_LOCAL_MIB_RESP_EVENT_M BIT(0)
sys/dev/ice/ice_adminq_cmd.h
2595
#define ICE_AQC_START_STOP_AGENT_M BIT(0)
sys/dev/ice/ice_adminq_cmd.h
2615
#define ICE_AQC_GSET_RSS_KEY_VSI_VALID BIT(15)
sys/dev/ice/ice_adminq_cmd.h
2662
#define ICE_AQC_GSET_RSS_LUT_VSI_VALID BIT(15)
sys/dev/ice/ice_adminq_cmd.h
2735
#define ICE_AQC_Q_DIS_CMD_VM_RESET BIT(ICE_AQC_Q_DIS_CMD_S)
sys/dev/ice/ice_adminq_cmd.h
2738
#define ICE_AQC_Q_DIS_CMD_SUBSEQ_CALL BIT(2)
sys/dev/ice/ice_adminq_cmd.h
2739
#define ICE_AQC_Q_DIS_CMD_FLUSH_PIPE BIT(3)
sys/dev/ice/ice_adminq_cmd.h
2789
#define ICE_AQC_Q_CMD_SUBSEQ_CALL BIT(2)
sys/dev/ice/ice_adminq_cmd.h
2790
#define ICE_AQC_Q_CMD_FLUSH_PIPE BIT(3)
sys/dev/ice/ice_adminq_cmd.h
2927
#define ICE_AQC_DRIVER_PARAM_OP_MASK BIT(0)
sys/dev/ice/ice_adminq_cmd.h
302
#define ICE_AQC_GET_SW_CONF_RESP_IS_VF BIT(15)
sys/dev/ice/ice_adminq_cmd.h
3020
#define ICE_AQC_HEALTH_STATUS_SET_PF_SPECIFIC_MASK BIT(0)
sys/dev/ice/ice_adminq_cmd.h
3021
#define ICE_AQC_HEALTH_STATUS_SET_ALL_PF_MASK BIT(1)
sys/dev/ice/ice_adminq_cmd.h
3022
#define ICE_AQC_HEALTH_STATUS_SET_GLOBAL_MASK BIT(2)
sys/dev/ice/ice_adminq_cmd.h
308
#define ICE_AQC_SET_P_PARAMS_SAVE_BAD_PACKETS BIT(0)
sys/dev/ice/ice_adminq_cmd.h
309
#define ICE_AQC_SET_P_PARAMS_PAD_SHORT_PACKETS BIT(1)
sys/dev/ice/ice_adminq_cmd.h
310
#define ICE_AQC_SET_P_PARAMS_DOUBLE_VLAN_ENA BIT(2)
sys/dev/ice/ice_adminq_cmd.h
3111
#define ICE_AQC_FW_LOG_CONF_UART_EN BIT(0)
sys/dev/ice/ice_adminq_cmd.h
3112
#define ICE_AQC_FW_LOG_CONF_AQ_EN BIT(1)
sys/dev/ice/ice_adminq_cmd.h
3113
#define ICE_AQC_FW_LOG_QUERY_REGISTERED BIT(2)
sys/dev/ice/ice_adminq_cmd.h
3114
#define ICE_AQC_FW_LOG_CONF_SET_VALID BIT(3)
sys/dev/ice/ice_adminq_cmd.h
3115
#define ICE_AQC_FW_LOG_AQ_REGISTER BIT(0)
sys/dev/ice/ice_adminq_cmd.h
3116
#define ICE_AQC_FW_LOG_AQ_QUERY BIT(2)
sys/dev/ice/ice_adminq_cmd.h
3117
#define ICE_AQC_FW_LOG_PERSISTENT BIT(0)
sys/dev/ice/ice_adminq_cmd.h
3119
#define ICE_AQC_FW_LOG_MORE_DATA BIT(1)
sys/dev/ice/ice_adminq_cmd.h
314
#define ICE_AQC_SET_P_PARAMS_VSI_VALID BIT(15)
sys/dev/ice/ice_adminq_cmd.h
321
#define ICE_AQC_SET_P_PARAMS_IS_LOGI_PORT BIT(14)
sys/dev/ice/ice_adminq_cmd.h
322
#define ICE_AQC_SET_P_PARAMS_SWID_VALID BIT(15)
sys/dev/ice/ice_adminq_cmd.h
324
#define ICE_AQC_SET_P_PARAMS_LOOPBACK_MODE_VALID BIT(2)
sys/dev/ice/ice_adminq_cmd.h
3303
#define ICE_AQ_FLAG_DD BIT(ICE_AQ_FLAG_DD_S) /* 0x1 */
sys/dev/ice/ice_adminq_cmd.h
3304
#define ICE_AQ_FLAG_CMP BIT(ICE_AQ_FLAG_CMP_S) /* 0x2 */
sys/dev/ice/ice_adminq_cmd.h
3305
#define ICE_AQ_FLAG_ERR BIT(ICE_AQ_FLAG_ERR_S) /* 0x4 */
sys/dev/ice/ice_adminq_cmd.h
3306
#define ICE_AQ_FLAG_VFE BIT(ICE_AQ_FLAG_VFE_S) /* 0x8 */
sys/dev/ice/ice_adminq_cmd.h
3307
#define ICE_AQ_FLAG_LB BIT(ICE_AQ_FLAG_LB_S) /* 0x200 */
sys/dev/ice/ice_adminq_cmd.h
3308
#define ICE_AQ_FLAG_RD BIT(ICE_AQ_FLAG_RD_S) /* 0x400 */
sys/dev/ice/ice_adminq_cmd.h
3309
#define ICE_AQ_FLAG_VFC BIT(ICE_AQ_FLAG_VFC_S) /* 0x800 */
sys/dev/ice/ice_adminq_cmd.h
3310
#define ICE_AQ_FLAG_BUF BIT(ICE_AQ_FLAG_BUF_S) /* 0x1000 */
sys/dev/ice/ice_adminq_cmd.h
3311
#define ICE_AQ_FLAG_SI BIT(ICE_AQ_FLAG_SI_S) /* 0x2000 */
sys/dev/ice/ice_adminq_cmd.h
3312
#define ICE_AQ_FLAG_EI BIT(ICE_AQ_FLAG_EI_S) /* 0x4000 */
sys/dev/ice/ice_adminq_cmd.h
3313
#define ICE_AQ_FLAG_FE BIT(ICE_AQ_FLAG_FE_S) /* 0x8000 */
sys/dev/ice/ice_adminq_cmd.h
366
#define ICE_AQC_RES_TYPE_FLAG_SHARED BIT(7)
sys/dev/ice/ice_adminq_cmd.h
367
#define ICE_AQC_RES_TYPE_FLAG_SCAN_BOTTOM BIT(12)
sys/dev/ice/ice_adminq_cmd.h
368
#define ICE_AQC_RES_TYPE_FLAG_IGNORE_INDEX BIT(13)
sys/dev/ice/ice_adminq_cmd.h
369
#define ICE_AQC_RES_TYPE_FLAG_SUBSCRIBE_SHARED BIT(14)
sys/dev/ice/ice_adminq_cmd.h
370
#define ICE_AQC_RES_TYPE_FLAG_SUBSCRIBE_CTL BIT(15)
sys/dev/ice/ice_adminq_cmd.h
470
#define ICE_AQ_VLAN_MODE_DVM_ENA BIT(0)
sys/dev/ice/ice_adminq_cmd.h
484
#define ICE_AQ_VSI_IS_VALID BIT(15)
sys/dev/ice/ice_adminq_cmd.h
529
#define ICE_AQ_VSI_PROP_SW_VALID BIT(0)
sys/dev/ice/ice_adminq_cmd.h
530
#define ICE_AQ_VSI_PROP_SECURITY_VALID BIT(1)
sys/dev/ice/ice_adminq_cmd.h
531
#define ICE_AQ_VSI_PROP_VLAN_VALID BIT(2)
sys/dev/ice/ice_adminq_cmd.h
532
#define ICE_AQ_VSI_PROP_OUTER_TAG_VALID BIT(3)
sys/dev/ice/ice_adminq_cmd.h
533
#define ICE_AQ_VSI_PROP_INGRESS_UP_VALID BIT(4)
sys/dev/ice/ice_adminq_cmd.h
534
#define ICE_AQ_VSI_PROP_EGRESS_UP_VALID BIT(5)
sys/dev/ice/ice_adminq_cmd.h
535
#define ICE_AQ_VSI_PROP_RXQ_MAP_VALID BIT(6)
sys/dev/ice/ice_adminq_cmd.h
536
#define ICE_AQ_VSI_PROP_Q_OPT_VALID BIT(7)
sys/dev/ice/ice_adminq_cmd.h
537
#define ICE_AQ_VSI_PROP_OUTER_UP_VALID BIT(8)
sys/dev/ice/ice_adminq_cmd.h
538
#define ICE_AQ_VSI_PROP_FLOW_DIR_VALID BIT(11)
sys/dev/ice/ice_adminq_cmd.h
539
#define ICE_AQ_VSI_PROP_PASID_VALID BIT(12)
sys/dev/ice/ice_adminq_cmd.h
543
#define ICE_AQ_VSI_SW_FLAG_ALLOW_LB BIT(5)
sys/dev/ice/ice_adminq_cmd.h
544
#define ICE_AQ_VSI_SW_FLAG_LOCAL_LB BIT(6)
sys/dev/ice/ice_adminq_cmd.h
545
#define ICE_AQ_VSI_SW_FLAG_SRC_PRUNE BIT(7)
sys/dev/ice/ice_adminq_cmd.h
549
#define ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA BIT(0)
sys/dev/ice/ice_adminq_cmd.h
550
#define ICE_AQ_VSI_SW_FLAG_RX_PASS_PRUNE_ENA BIT(3)
sys/dev/ice/ice_adminq_cmd.h
551
#define ICE_AQ_VSI_SW_FLAG_LAN_ENA BIT(4)
sys/dev/ice/ice_adminq_cmd.h
555
#define ICE_AQ_VSI_SW_VEB_STAT_ID_VALID BIT(5)
sys/dev/ice/ice_adminq_cmd.h
558
#define ICE_AQ_VSI_SEC_FLAG_ALLOW_DEST_OVRD BIT(0)
sys/dev/ice/ice_adminq_cmd.h
559
#define ICE_AQ_VSI_SEC_FLAG_ENA_MAC_ANTI_SPOOF BIT(2)
sys/dev/ice/ice_adminq_cmd.h
562
#define ICE_AQ_VSI_SEC_TX_VLAN_PRUNE_ENA BIT(0)
sys/dev/ice/ice_adminq_cmd.h
573
#define ICE_AQ_VSI_INNER_VLAN_INSERT_PVID BIT(2)
sys/dev/ice/ice_adminq_cmd.h
580
#define ICE_AQ_VSI_INNER_VLAN_BLOCK_TX_DESC BIT(5)
sys/dev/ice/ice_adminq_cmd.h
616
#define ICE_AQ_VSI_OUTER_VLAN_PORT_BASED_INSERT BIT(4)
sys/dev/ice/ice_adminq_cmd.h
622
#define ICE_AQ_VSI_OUTER_VLAN_BLOCK_TX_DESC BIT(7)
sys/dev/ice/ice_adminq_cmd.h
627
#define ICE_AQ_VSI_Q_MAP_NONCONTIG BIT(0)
sys/dev/ice/ice_adminq_cmd.h
654
#define ICE_AQ_VSI_Q_OPT_PROF_TC_OVR BIT(7)
sys/dev/ice/ice_adminq_cmd.h
656
#define ICE_AQ_VSI_Q_OPT_PE_FLTR_EN BIT(0)
sys/dev/ice/ice_adminq_cmd.h
664
#define ICE_AQ_VSI_FD_ENABLE BIT(0)
sys/dev/ice/ice_adminq_cmd.h
665
#define ICE_AQ_VSI_FD_TX_AUTO_ENABLE BIT(1)
sys/dev/ice/ice_adminq_cmd.h
666
#define ICE_AQ_VSI_FD_PROG_ENABLE BIT(3)
sys/dev/ice/ice_adminq_cmd.h
679
#define ICE_AQ_VSI_FD_DEF_DROP BIT(15)
sys/dev/ice/ice_adminq_cmd.h
684
#define ICE_AQ_VSI_PASID_ID_VALID BIT(31)
sys/dev/ice/ice_adminq_cmd.h
777
#define ICE_AQ_STORM_CTRL_MDIPW_DROP_MULTICAST BIT(0)
sys/dev/ice/ice_adminq_cmd.h
778
#define ICE_AQ_STORM_CTRL_MDICW_DROP_MULTICAST BIT(1)
sys/dev/ice/ice_adminq_cmd.h
779
#define ICE_AQ_STORM_CTRL_BDIPW_DROP_MULTICAST BIT(2)
sys/dev/ice/ice_adminq_cmd.h
780
#define ICE_AQ_STORM_CTRL_BDICW_DROP_MULTICAST BIT(3)
sys/dev/ice/ice_adminq_cmd.h
845
#define ICE_SINGLE_ACT_LB_ENABLE BIT(2)
sys/dev/ice/ice_adminq_cmd.h
846
#define ICE_SINGLE_ACT_LAN_ENABLE BIT(3)
sys/dev/ice/ice_adminq_cmd.h
856
#define ICE_SINGLE_ACT_VSI_LIST BIT(14)
sys/dev/ice/ice_adminq_cmd.h
857
#define ICE_SINGLE_ACT_VALID_BIT BIT(17)
sys/dev/ice/ice_adminq_cmd.h
858
#define ICE_SINGLE_ACT_DROP BIT(18)
sys/dev/ice/ice_adminq_cmd.h
866
#define ICE_SINGLE_ACT_Q_PRIORITY BIT(18)
sys/dev/ice/ice_adminq_cmd.h
87
#define ICE_AQC_DRIVER_UNLOADING BIT(0)
sys/dev/ice/ice_adminq_cmd.h
870
#define ICE_SINGLE_ACT_EGRESS BIT(15)
sys/dev/ice/ice_adminq_cmd.h
871
#define ICE_SINGLE_ACT_INGRESS BIT(16)
sys/dev/ice/ice_adminq_cmd.h
872
#define ICE_SINGLE_ACT_PRUNET BIT(17)
sys/dev/ice/ice_adminq_cmd.h
880
#define ICE_SINGLE_ACT_PTR_HAS_FWD BIT(17)
sys/dev/ice/ice_adminq_cmd.h
882
#define ICE_SINGLE_ACT_PTR_BIT BIT(18)
sys/dev/ice/ice_adminq_cmd.h
936
#define ICE_LG_ACT_VSI_LIST BIT(13)
sys/dev/ice/ice_adminq_cmd.h
938
#define ICE_LG_ACT_VALID_BIT BIT(16)
sys/dev/ice/ice_adminq_cmd.h
946
#define ICE_LG_ACT_Q_PRIORITY_SET BIT(17)
sys/dev/ice/ice_adminq_cmd.h
950
#define ICE_LG_ACT_EGRESS BIT(14)
sys/dev/ice/ice_adminq_cmd.h
951
#define ICE_LG_ACT_INGRESS BIT(15)
sys/dev/ice/ice_adminq_cmd.h
952
#define ICE_LG_ACT_PRUNET BIT(16)
sys/dev/ice/ice_bitops.h
513
if (entry & BIT(j))
sys/dev/ice/ice_bitops.h
528
if (entry & BIT(j))
sys/dev/ice/ice_bitops.h
67
return !!(*bitmap & BIT(nr));
sys/dev/ice/ice_bitops.h
85
*bitmap &= ~BIT(nr);
sys/dev/ice/ice_bitops.h
90
*bitmap |= BIT(nr);
sys/dev/ice/ice_common.c
4870
mask = (u8)(BIT(ce_info->width) - 1);
sys/dev/ice/ice_common.c
4910
mask = BIT(ce_info->width) - 1;
sys/dev/ice/ice_common.c
4959
mask = BIT(ce_info->width) - 1;
sys/dev/ice/ice_common.c
5148
mask = (u8)(BIT(ce_info->width) - 1);
sys/dev/ice/ice_common.c
5185
mask = BIT(ce_info->width) - 1;
sys/dev/ice/ice_common.c
5234
mask = BIT(ce_info->width) - 1;
sys/dev/ice/ice_common.c
6175
#define ICE_FW_MODE_DBG_M BIT(0)
sys/dev/ice/ice_common.c
6176
#define ICE_FW_MODE_REC_M BIT(1)
sys/dev/ice/ice_common.c
6177
#define ICE_FW_MODE_ROLLBACK_M BIT(2)
sys/dev/ice/ice_common_txrx.h
275
const u16 l3_error = (BIT(ICE_RX_FLEX_DESC_STATUS0_XSUM_IPE_S) |
sys/dev/ice/ice_common_txrx.h
276
BIT(ICE_RX_FLEX_DESC_STATUS0_XSUM_EIPE_S));
sys/dev/ice/ice_common_txrx.h
277
const u16 l4_error = (BIT(ICE_RX_FLEX_DESC_STATUS0_XSUM_L4E_S) |
sys/dev/ice/ice_common_txrx.h
278
BIT(ICE_RX_FLEX_DESC_STATUS0_XSUM_EUDPE_S));
sys/dev/ice/ice_common_txrx.h
280
BIT(ICE_RX_FLEX_DESC_STATUS0_IPV6EXADD_S));
sys/dev/ice/ice_common_txrx.h
285
if (!(status0 & BIT(ICE_RX_FLEX_DESC_STATUS0_L3L4P_S))) {
sys/dev/ice/ice_common_txrx.h
325
if (is_ipv6 && (status0 & BIT(ICE_RX_FLEX_DESC_STATUS0_IPV6EXADD_S))) {
sys/dev/ice/ice_dcb.c
1381
maxtcwilling = BIT(ICE_IEEE_ETS_WILLING_S);
sys/dev/ice/ice_dcb.c
1449
buf[0] = BIT(ICE_IEEE_PFC_WILLING_S);
sys/dev/ice/ice_dcb.c
1452
buf[0] |= BIT(ICE_IEEE_PFC_MBC_S);
sys/dev/ice/ice_dcb.c
613
if (app->prio_map & BIT(up))
sys/dev/ice/ice_dcb.h
114
#define ICE_IEEE_PFC_MBC_M BIT(ICE_IEEE_PFC_MBC_S)
sys/dev/ice/ice_dcb.h
116
#define ICE_IEEE_PFC_WILLING_M BIT(ICE_IEEE_PFC_WILLING_S)
sys/dev/ice/ice_dcb.h
91
#define ICE_IEEE_ETS_CBS_M BIT(ICE_IEEE_ETS_CBS_S)
sys/dev/ice/ice_dcb.h
93
#define ICE_IEEE_ETS_WILLING_M BIT(ICE_IEEE_ETS_WILLING_S)
sys/dev/ice/ice_flex_pipe.c
2165
inkey.xlt2_cdid |= CPU_TO_LE16(BIT(cdid) << ICE_CD_2_S);
sys/dev/ice/ice_flex_pipe.c
2171
inkey.xlt2_cdid |= CPU_TO_LE16(BIT(cdid) << ICE_CD_4_S);
sys/dev/ice/ice_flex_pipe.c
2177
inkey.xlt2_cdid |= CPU_TO_LE16(BIT(cdid) << ICE_CD_8_S);
sys/dev/ice/ice_fwlog.h
61
#define ICE_FWLOG_OPTION_ARQ_ENA BIT(0)
sys/dev/ice/ice_fwlog.h
62
#define ICE_FWLOG_OPTION_UART_ENA BIT(1)
sys/dev/ice/ice_fwlog.h
66
#define ICE_FWLOG_OPTION_REGISTER_ON_INIT BIT(2)
sys/dev/ice/ice_fwlog.h
70
#define ICE_FWLOG_OPTION_IS_REGISTERED BIT(3)
sys/dev/ice/ice_hw_autogen.h
1001
#define GLTCLAN_CQ_CNTX3_GENERATION_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
10029
#define E830_GL_RPRS_VALIDATE_CHECKS_CTL_VALIDATE_UDP_LEN_0_EN_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
10031
#define E830_GL_RPRS_VALIDATE_CHECKS_CTL_VALIDATE_UDP_LEN_1_EN_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
10033
#define E830_GL_RPRS_VALIDATE_CHECKS_CTL_VALIDATE_L3_LEN_0_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
10035
#define E830_GL_RPRS_VALIDATE_CHECKS_CTL_VALIDATE_L3_LEN_1_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
10037
#define E830_GL_RPRS_VALIDATE_CHECKS_CTL_VALIDATE_L3_L4_COHERENT_0_M BIT(4)
sys/dev/ice/ice_hw_autogen.h
10039
#define E830_GL_RPRS_VALIDATE_CHECKS_CTL_VALIDATE_L3_L4_COHERENT_1_M BIT(5)
sys/dev/ice/ice_hw_autogen.h
10104
#define E830_GL_TPRS_VALIDATE_CHECKS_CTL_VALIDATE_UDP_LEN_0_EN_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
10106
#define E830_GL_TPRS_VALIDATE_CHECKS_CTL_VALIDATE_UDP_LEN_1_EN_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
10108
#define E830_GL_TPRS_VALIDATE_CHECKS_CTL_VALIDATE_L3_LEN_0_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
10110
#define E830_GL_TPRS_VALIDATE_CHECKS_CTL_VALIDATE_L3_LEN_1_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
10112
#define E830_GL_TPRS_VALIDATE_CHECKS_CTL_VALIDATE_L3_L4_COHERENT_0_M BIT(4)
sys/dev/ice/ice_hw_autogen.h
10114
#define E830_GL_TPRS_VALIDATE_CHECKS_CTL_VALIDATE_L3_L4_COHERENT_1_M BIT(5)
sys/dev/ice/ice_hw_autogen.h
10130
#define E830_PF0INT_OICR_PSM_PAGE_PTM_COMP_M BIT(8)
sys/dev/ice/ice_hw_autogen.h
10132
#define E830_PF0INT_OICR_PSM_PAGE_PQM_DBL_TO_M BIT(9)
sys/dev/ice/ice_hw_autogen.h
10134
#define E830_PF0INT_OICR_PSM_PAGE_RSV5_M BIT(10)
sys/dev/ice/ice_hw_autogen.h
10141
#define E830_GL_HICR_C_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
10143
#define E830_GL_HICR_SV_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
10145
#define E830_GL_HICR_EV_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
10148
#define E830_GL_HICR_EN_EN_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
1015
#define GLTCLAN_CQ_CNTX5_TPH_EN_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
10172
#define E830_GLFLXP_RXDID_FLX_WRD_6_L2TAG_OVRD_EN_M BIT(18)
sys/dev/ice/ice_hw_autogen.h
10184
#define E830_GLFLXP_RXDID_FLX_WRD_7_L2TAG_OVRD_EN_M BIT(18)
sys/dev/ice/ice_hw_autogen.h
1019
#define GLTCLAN_CQ_CNTX5_FLUSH_ON_ITR_DIS_M BIT(9)
sys/dev/ice/ice_hw_autogen.h
10196
#define E830_GLFLXP_RXDID_FLX_WRD_8_L2TAG_OVRD_EN_M BIT(18)
sys/dev/ice/ice_hw_autogen.h
10208
#define E830_GL_FWSTS_FW_FAILOVER_TRIG_M BIT(12)
sys/dev/ice/ice_hw_autogen.h
10212
#define E830_GLGEN_RSTAT_EMPR_TYPE_M BIT(21)
sys/dev/ice/ice_hw_autogen.h
10217
#define E830_GL_MDCK_TDAT_TCLAN_TSYN_PKT_FROM_Q_NOT_ALLOWED_M BIT(21)
sys/dev/ice/ice_hw_autogen.h
10219
#define E830_GL_MDCK_TDAT_TCLAN_TSYN_PKT_RANGE_VIOLATION_M BIT(22)
sys/dev/ice/ice_hw_autogen.h
10221
#define E830_GL_MDCK_TDAT_TCLAN_DESC_TYPE_ACL_DTYPE_NOT_ALLOWED_M BIT(23)
sys/dev/ice/ice_hw_autogen.h
10224
#define E830_GL_TPB_LOCAL_TOPO_ALLOW_TOPO_OVERRIDE_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
10229
#define E830_GL_TPB_PM_RESET_MAC_PM_RESET_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
10231
#define E830_GL_TPB_PM_RESET_RPB_PM_RESET_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
10250
#define E830_PF0INT_OICR_PSM_PTM_COMP_M BIT(8)
sys/dev/ice/ice_hw_autogen.h
10252
#define E830_PF0INT_OICR_PSM_PQM_DBL_TO_M BIT(9)
sys/dev/ice/ice_hw_autogen.h
10254
#define E830_PF0INT_OICR_PSM_RSV5_M BIT(10)
sys/dev/ice/ice_hw_autogen.h
10256
#define E830_PFINT_OICR_PTM_COMP_M BIT(8)
sys/dev/ice/ice_hw_autogen.h
10258
#define E830_PFINT_OICR_PQM_DBL_TO_M BIT(9)
sys/dev/ice/ice_hw_autogen.h
10260
#define E830_PFINT_OICR_RSV5_M BIT(10)
sys/dev/ice/ice_hw_autogen.h
10262
#define E830_QRX_CTRL_IDE_M BIT(27)
sys/dev/ice/ice_hw_autogen.h
10305
#define E830_PRTMAC_200G_COMMAND_CONFIG_TX_ENA_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
10307
#define E830_PRTMAC_200G_COMMAND_CONFIG_RX_ENA_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
10309
#define E830_PRTMAC_200G_COMMAND_CONFIG_PROMIS_EN_M BIT(4)
sys/dev/ice/ice_hw_autogen.h
10311
#define E830_PRTMAC_200G_COMMAND_CONFIG_PAD_EN_M BIT(5)
sys/dev/ice/ice_hw_autogen.h
10313
#define E830_PRTMAC_200G_COMMAND_CONFIG_CRC_FWD_M BIT(6)
sys/dev/ice/ice_hw_autogen.h
10315
#define E830_PRTMAC_200G_COMMAND_CONFIG_PAUSE_FWD_M BIT(7)
sys/dev/ice/ice_hw_autogen.h
10317
#define E830_PRTMAC_200G_COMMAND_CONFIG_PAUSE_IGNORE_M BIT(8)
sys/dev/ice/ice_hw_autogen.h
10319
#define E830_PRTMAC_200G_COMMAND_CONFIG_TX_ADDR_INS_M BIT(9)
sys/dev/ice/ice_hw_autogen.h
10321
#define E830_PRTMAC_200G_COMMAND_CONFIG_LOOPBACK_EN_M BIT(10)
sys/dev/ice/ice_hw_autogen.h
10323
#define E830_PRTMAC_200G_COMMAND_CONFIG_TX_PAD_EN_M BIT(11)
sys/dev/ice/ice_hw_autogen.h
10325
#define E830_PRTMAC_200G_COMMAND_CONFIG_SW_RESET_M BIT(12)
sys/dev/ice/ice_hw_autogen.h
10327
#define E830_PRTMAC_200G_COMMAND_CONFIG_CNTL_FRM_ENA_M BIT(13)
sys/dev/ice/ice_hw_autogen.h
10329
#define E830_PRTMAC_200G_COMMAND_CONFIG_RX_ERR_DISC_M BIT(14)
sys/dev/ice/ice_hw_autogen.h
10331
#define E830_PRTMAC_200G_COMMAND_CONFIG_PHY_TXENA_M BIT(15)
sys/dev/ice/ice_hw_autogen.h
10333
#define E830_PRTMAC_200G_COMMAND_CONFIG_SEND_IDLE_M BIT(16)
sys/dev/ice/ice_hw_autogen.h
10335
#define E830_PRTMAC_200G_COMMAND_CONFIG_NO_LGTH_CHECK_M BIT(17)
sys/dev/ice/ice_hw_autogen.h
10337
#define E830_PRTMAC_200G_COMMAND_CONFIG_PFC_MODE_M BIT(19)
sys/dev/ice/ice_hw_autogen.h
10339
#define E830_PRTMAC_200G_COMMAND_CONFIG_PAUSE_PFC_COMP_M BIT(20)
sys/dev/ice/ice_hw_autogen.h
10341
#define E830_PRTMAC_200G_COMMAND_CONFIG_RX_SFD_ANY_M BIT(21)
sys/dev/ice/ice_hw_autogen.h
10343
#define E830_PRTMAC_200G_COMMAND_CONFIG_TX_FLUSH_M BIT(22)
sys/dev/ice/ice_hw_autogen.h
10345
#define E830_PRTMAC_200G_COMMAND_CONFIG_FLT_TX_STOP_M BIT(25)
sys/dev/ice/ice_hw_autogen.h
10347
#define E830_PRTMAC_200G_COMMAND_CONFIG_TX_FIFO_RESET_M BIT(26)
sys/dev/ice/ice_hw_autogen.h
10349
#define E830_PRTMAC_200G_COMMAND_CONFIG_FLT_HDL_DIS_M BIT(27)
sys/dev/ice/ice_hw_autogen.h
10351
#define E830_PRTMAC_200G_COMMAND_CONFIG_INV_LOOP_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
10364
#define E830_PRTMAC_200G_HASHTABLE_LOAD_MCAST_EN_M BIT(8)
sys/dev/ice/ice_hw_autogen.h
10373
#define E830_PRTMAC_200G_MDIO_CFG_STATUS_MDIO_BUSY_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
10375
#define E830_PRTMAC_200G_MDIO_CFG_STATUS_MDIO_RD_ERR_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
10379
#define E830_PRTMAC_200G_MDIO_CFG_STATUS_MDIO_DIS_PREAMBLE_M BIT(5)
sys/dev/ice/ice_hw_autogen.h
10381
#define E830_PRTMAC_200G_MDIO_CFG_STATUS_MDIO_CLS_45_EN_M BIT(6)
sys/dev/ice/ice_hw_autogen.h
10390
#define E830_PRTMAC_200G_MDIO_COMMAND_MDIO_BUSY_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
10397
#define E830_PRTMAC_200G_MDIO_DATA_MDIO_BUSY_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
10416
#define E830_PRTMAC_200G_STATUS_RX_LOC_FAULT_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
10418
#define E830_PRTMAC_200G_STATUS_RX_REM_FAULT_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
10420
#define E830_PRTMAC_200G_STATUS_PHY_LOS_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
10422
#define E830_PRTMAC_200G_STATUS_TS_AVAIL_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
10424
#define E830_PRTMAC_200G_STATUS_RESERVED_5_M BIT(4)
sys/dev/ice/ice_hw_autogen.h
10426
#define E830_PRTMAC_200G_STATUS_TX_EMPTY_M BIT(5)
sys/dev/ice/ice_hw_autogen.h
10428
#define E830_PRTMAC_200G_STATUS_RX_EMPTY_M BIT(6)
sys/dev/ice/ice_hw_autogen.h
10430
#define E830_PRTMAC_200G_STATUS_RESERVED1_M BIT(7)
sys/dev/ice/ice_hw_autogen.h
10432
#define E830_PRTMAC_200G_STATUS_TX_ISIDLE_M BIT(8)
sys/dev/ice/ice_hw_autogen.h
10452
#define E830_PRTMAC_200G_XIF_MODE_ONE_STEP_ENA_M BIT(5)
sys/dev/ice/ice_hw_autogen.h
10454
#define E830_PRTMAC_200G_XIF_MODE_PFC_PULSE_MODE_M BIT(17)
sys/dev/ice/ice_hw_autogen.h
10456
#define E830_PRTMAC_200G_XIF_MODE_PFC_LP_MODE_M BIT(18)
sys/dev/ice/ice_hw_autogen.h
10458
#define E830_PRTMAC_200G_XIF_MODE_PFC_LP_16PRI_M BIT(19)
sys/dev/ice/ice_hw_autogen.h
10485
#define E830_PRTMAC_CF_GEN_STATUS_CF_GEN_SENT_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
10528
#define E830_PRTMAC_COMMAND_CONFIG_TX_ENA_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
1053
#define QTX_COMM_HEAD_RS_PENDING_M BIT(16)
sys/dev/ice/ice_hw_autogen.h
10530
#define E830_PRTMAC_COMMAND_CONFIG_RX_ENA_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
10532
#define E830_PRTMAC_COMMAND_CONFIG_RESERVED1_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
10534
#define E830_PRTMAC_COMMAND_CONFIG_PROMIS_EN_M BIT(4)
sys/dev/ice/ice_hw_autogen.h
10536
#define E830_PRTMAC_COMMAND_CONFIG_RESERVED2_M BIT(5)
sys/dev/ice/ice_hw_autogen.h
10538
#define E830_PRTMAC_COMMAND_CONFIG_CRC_FWD_M BIT(6)
sys/dev/ice/ice_hw_autogen.h
10540
#define E830_PRTMAC_COMMAND_CONFIG_PAUSE_FWD_M BIT(7)
sys/dev/ice/ice_hw_autogen.h
10542
#define E830_PRTMAC_COMMAND_CONFIG_PAUSE_IGNORE_M BIT(8)
sys/dev/ice/ice_hw_autogen.h
10544
#define E830_PRTMAC_COMMAND_CONFIG_TX_ADDR_INS_M BIT(9)
sys/dev/ice/ice_hw_autogen.h
10546
#define E830_PRTMAC_COMMAND_CONFIG_LOOP_ENA_M BIT(10)
sys/dev/ice/ice_hw_autogen.h
10548
#define E830_PRTMAC_COMMAND_CONFIG_TX_PAD_EN_M BIT(11)
sys/dev/ice/ice_hw_autogen.h
10550
#define E830_PRTMAC_COMMAND_CONFIG_SW_RESET_M BIT(12)
sys/dev/ice/ice_hw_autogen.h
10552
#define E830_PRTMAC_COMMAND_CONFIG_CNTL_FRM_ENA_M BIT(13)
sys/dev/ice/ice_hw_autogen.h
10554
#define E830_PRTMAC_COMMAND_CONFIG_RESERVED3_M BIT(14)
sys/dev/ice/ice_hw_autogen.h
10556
#define E830_PRTMAC_COMMAND_CONFIG_PHY_TXENA_M BIT(15)
sys/dev/ice/ice_hw_autogen.h
10558
#define E830_PRTMAC_COMMAND_CONFIG_FORCE_SEND__M BIT(16)
sys/dev/ice/ice_hw_autogen.h
10560
#define E830_PRTMAC_COMMAND_CONFIG_RESERVED4_M BIT(17)
sys/dev/ice/ice_hw_autogen.h
10562
#define E830_PRTMAC_COMMAND_CONFIG_RESERVED5_M BIT(18)
sys/dev/ice/ice_hw_autogen.h
10564
#define E830_PRTMAC_COMMAND_CONFIG_PFC_MODE_M BIT(19)
sys/dev/ice/ice_hw_autogen.h
10566
#define E830_PRTMAC_COMMAND_CONFIG_PAUSE_PFC_COMP_M BIT(20)
sys/dev/ice/ice_hw_autogen.h
10568
#define E830_PRTMAC_COMMAND_CONFIG_RX_SFD_ANY_M BIT(21)
sys/dev/ice/ice_hw_autogen.h
10570
#define E830_PRTMAC_COMMAND_CONFIG_TX_FLUSH_M BIT(22)
sys/dev/ice/ice_hw_autogen.h
10572
#define E830_PRTMAC_COMMAND_CONFIG_TX_LOWP_ENA_M BIT(23)
sys/dev/ice/ice_hw_autogen.h
10574
#define E830_PRTMAC_COMMAND_CONFIG_REG_LOWP_RXEMPTY_M BIT(24)
sys/dev/ice/ice_hw_autogen.h
10576
#define E830_PRTMAC_COMMAND_CONFIG_FLT_TX_STOP_M BIT(25)
sys/dev/ice/ice_hw_autogen.h
10578
#define E830_PRTMAC_COMMAND_CONFIG_TX_FIFO_RESET_M BIT(26)
sys/dev/ice/ice_hw_autogen.h
10580
#define E830_PRTMAC_COMMAND_CONFIG_FLT_HDL_DIS_M BIT(27)
sys/dev/ice/ice_hw_autogen.h
10582
#define E830_PRTMAC_COMMAND_CONFIG_TX_PAUSE_DIS_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
10584
#define E830_PRTMAC_COMMAND_CONFIG_RX_PAUSE_DIS_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
10586
#define E830_PRTMAC_COMMAND_CONFIG_SHORT_PREAM_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
10588
#define E830_PRTMAC_COMMAND_CONFIG_NO_PREAM_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
10594
#define E830_PRTMAC_CRC_MODE_DISABLE_RX_CRC_CHECKING_M BIT(16)
sys/dev/ice/ice_hw_autogen.h
10596
#define E830_PRTMAC_CRC_MODE_ONE_BYTE_CRC_M BIT(18)
sys/dev/ice/ice_hw_autogen.h
10598
#define E830_PRTMAC_CRC_MODE_TWO_BYTES_CRC_M BIT(19)
sys/dev/ice/ice_hw_autogen.h
10600
#define E830_PRTMAC_CRC_MODE_ZERO_BYTE_CRC_M BIT(20)
sys/dev/ice/ice_hw_autogen.h
10603
#define E830_PRTMAC_CSR_TIMEOUT_CFG_CSR_TIMEOUT_EN_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
10606
#define E830_PRTMAC_CTL_RX_CFG_SUB_CRC_STAT_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
10630
#define E830_PRTMAC_MDIO_CFG_STATUS_MDIO_BUSY_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
10632
#define E830_PRTMAC_MDIO_CFG_STATUS_MDIO_RD_ERR_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
10636
#define E830_PRTMAC_MDIO_CFG_STATUS_MDIO_DIS_PREAMBLE_M BIT(5)
sys/dev/ice/ice_hw_autogen.h
10638
#define E830_PRTMAC_MDIO_CFG_STATUS_MDIO_CLS_45_EN_M BIT(6)
sys/dev/ice/ice_hw_autogen.h
10647
#define E830_PRTMAC_MDIO_COMMAND_MDIO_BUSY_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
10654
#define E830_PRTMAC_MDIO_DATA_MDIO_BUSY_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
10678
#define E830_PRTMAC_STATUS_RX_LOC_FAULT_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
10680
#define E830_PRTMAC_STATUS_RX_REM_FAULT_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
10682
#define E830_PRTMAC_STATUS_PHY_LOS_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
10684
#define E830_PRTMAC_STATUS_TS_AVAIL_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
10686
#define E830_PRTMAC_STATUS_RX_LOWP_M BIT(4)
sys/dev/ice/ice_hw_autogen.h
10688
#define E830_PRTMAC_STATUS_TX_EMPTY_M BIT(5)
sys/dev/ice/ice_hw_autogen.h
1069
#define GL_FW_TOOL_ARQLEN_ARQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
10690
#define E830_PRTMAC_STATUS_RX_EMPTY_M BIT(6)
sys/dev/ice/ice_hw_autogen.h
10692
#define E830_PRTMAC_STATUS_RX_LINT_FAULT_M BIT(7)
sys/dev/ice/ice_hw_autogen.h
10694
#define E830_PRTMAC_STATUS_TX_ISIDLE_M BIT(8)
sys/dev/ice/ice_hw_autogen.h
107
#define MSIX_TVCTRL_MASK_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
1071
#define GL_FW_TOOL_ARQLEN_ARQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
1073
#define GL_FW_TOOL_ARQLEN_ARQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
10732
#define E830_PRTMAC_XIF_MODE_XGMII_ENA_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
10736
#define E830_PRTMAC_XIF_MODE_PAUSETIMERX8_M BIT(4)
sys/dev/ice/ice_hw_autogen.h
10738
#define E830_PRTMAC_XIF_MODE_ONE_STEP_ENA_M BIT(5)
sys/dev/ice/ice_hw_autogen.h
10740
#define E830_PRTMAC_XIF_MODE_RX_PAUSE_BYPASS_M BIT(6)
sys/dev/ice/ice_hw_autogen.h
10742
#define E830_PRTMAC_XIF_MODE_RESERVED1_M BIT(7)
sys/dev/ice/ice_hw_autogen.h
10744
#define E830_PRTMAC_XIF_MODE_TX_MAC_RS_ERR_M BIT(8)
sys/dev/ice/ice_hw_autogen.h
10746
#define E830_PRTMAC_XIF_MODE_TS_DELTA_MODE_M BIT(9)
sys/dev/ice/ice_hw_autogen.h
10748
#define E830_PRTMAC_XIF_MODE_TS_DELAY_MODE_M BIT(10)
sys/dev/ice/ice_hw_autogen.h
1075
#define GL_FW_TOOL_ARQLEN_ARQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
10750
#define E830_PRTMAC_XIF_MODE_TS_BINARY_MODE_M BIT(11)
sys/dev/ice/ice_hw_autogen.h
10752
#define E830_PRTMAC_XIF_MODE_TS_UPD64_MODE_M BIT(12)
sys/dev/ice/ice_hw_autogen.h
10756
#define E830_PRTMAC_XIF_MODE_RX_CNT_MODE_M BIT(16)
sys/dev/ice/ice_hw_autogen.h
10758
#define E830_PRTMAC_XIF_MODE_PFC_PULSE_MODE_M BIT(17)
sys/dev/ice/ice_hw_autogen.h
10760
#define E830_PRTMAC_XIF_MODE_PFC_LP_MODE_M BIT(18)
sys/dev/ice/ice_hw_autogen.h
10762
#define E830_PRTMAC_XIF_MODE_PFC_LP_16PRI_M BIT(19)
sys/dev/ice/ice_hw_autogen.h
10764
#define E830_PRTMAC_XIF_MODE_TS_SFD_ENA_M BIT(20)
sys/dev/ice/ice_hw_autogen.h
10785
#define E830_GL_MDCK_EN_TX_PQM_TXT_MAL_SW_ABOVE_HW_TAIL_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
10787
#define E830_GL_MDCK_EN_TX_PQM_TXT_MAL_SAME_TAIL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
10789
#define E830_GL_MDCK_EN_TX_PQM_TXT_MAL_TAIL_GE_QLEN_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
10791
#define E830_GL_MDCK_EN_TX_PQM_TXT_MAL_UR_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
10802
#define E830_GL_MDET_HIF_UR_FIFO_FIFO_FULL_M BIT(20)
sys/dev/ice/ice_hw_autogen.h
10804
#define E830_GL_MDET_HIF_UR_FIFO_VALID_M BIT(21)
sys/dev/ice/ice_hw_autogen.h
10817
#define E830_PF_MDET_HIF_UR_VALID_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
10821
#define E830_VM_MDET_TX_TCLAN_VALID_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
10825
#define E830_VP_MDET_HIF_UR_VALID_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
10827
#define E830_GLNVM_FLA_GLOBAL_LOCKED_M BIT(7)
sys/dev/ice/ice_hw_autogen.h
10887
#define E830_GLPCI_CAPSUP_DOE_EN_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
10889
#define E830_GLPCI_CAPSUP_GEN5_EXT_EN_M BIT(12)
sys/dev/ice/ice_hw_autogen.h
10891
#define E830_GLPCI_CAPSUP_PTM_EN_M BIT(13)
sys/dev/ice/ice_hw_autogen.h
10893
#define E830_GLPCI_CAPSUP_SNPS_RAS_EN_M BIT(14)
sys/dev/ice/ice_hw_autogen.h
10895
#define E830_GLPCI_CAPSUP_SIOV_EN_M BIT(15)
sys/dev/ice/ice_hw_autogen.h
10897
#define E830_GLPCI_CAPSUP_PTM_VSEC_EN_M BIT(22)
sys/dev/ice/ice_hw_autogen.h
10899
#define E830_GLPCI_CAPSUP_SNPS_RAS_PROT_EN_M BIT(23)
sys/dev/ice/ice_hw_autogen.h
10902
#define E830_GLPCI_DOE_BUSY_STATUS_BUSY_REQ_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
10904
#define E830_GLPCI_DOE_BUSY_STATUS_BUSY_EMPR_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
10906
#define E830_GLPCI_DOE_BUSY_STATUS_BUSY_PCIER_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
10908
#define E830_GLPCI_DOE_BUSY_STATUS_BUSY_FLR_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
10910
#define E830_GLPCI_DOE_BUSY_STATUS_BUSY_CFG_ABORT_M BIT(4)
sys/dev/ice/ice_hw_autogen.h
10912
#define E830_GLPCI_DOE_BUSY_STATUS_BUSY_FW_M BIT(5)
sys/dev/ice/ice_hw_autogen.h
10915
#define E830_GLPCI_DOE_CFG_ENABLE_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
10917
#define E830_GLPCI_DOE_CFG_ITR_SUPPORT_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
10919
#define E830_GLPCI_DOE_CFG_POISON_CFGWR_PIOSF_EP_BIT_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
10921
#define E830_GLPCI_DOE_CFG_POISON_CFGWR_SBIOSF_AER_MSG_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
10926
#define E830_GLPCI_DOE_CTRL_BUSY_FW_SET_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
10928
#define E830_GLPCI_DOE_CTRL_DOE_CFG_ERR_SET_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
10931
#define E830_GLPCI_DOE_DBG_CFG_BUSY_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
10933
#define E830_GLPCI_DOE_DBG_CFG_DATA_OBJECT_READY_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
10935
#define E830_GLPCI_DOE_DBG_CFG_ERROR_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
10937
#define E830_GLPCI_DOE_DBG_CFG_INTERRUPT_ENABLE_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
10939
#define E830_GLPCI_DOE_DBG_CFG_INTERRUPT_STATUS_M BIT(4)
sys/dev/ice/ice_hw_autogen.h
1094
#define GL_FW_TOOL_ATQLEN_ATQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
10946
#define E830_GLPCI_DOE_ERR_EN_RD_REQ_BUF_ECC_ERR_EN_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
10948
#define E830_GLPCI_DOE_ERR_EN_RD_RESP_BUF_ECC_ERR_EN_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
10950
#define E830_GLPCI_DOE_ERR_EN_SW_WR_CFG_POISONED_EN_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
10952
#define E830_GLPCI_DOE_ERR_EN_SW_WR_REQ_BUF_ON_BUSY_DUE_REQ_EN_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
10954
#define E830_GLPCI_DOE_ERR_EN_SW_GO_ON_BUSY_DUE_REQ_EN_M BIT(4)
sys/dev/ice/ice_hw_autogen.h
10956
#define E830_GLPCI_DOE_ERR_EN_SW_WR_REQ_BUF_ON_BUSY_DUE_FW_EN_M BIT(5)
sys/dev/ice/ice_hw_autogen.h
10958
#define E830_GLPCI_DOE_ERR_EN_SW_GO_ON_BUSY_DUE_FW_EN_M BIT(6)
sys/dev/ice/ice_hw_autogen.h
1096
#define GL_FW_TOOL_ATQLEN_ATQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
10960
#define E830_GLPCI_DOE_ERR_EN_SW_WR_REQ_BUF_OVERFLOW_EN_M BIT(7)
sys/dev/ice/ice_hw_autogen.h
10962
#define E830_GLPCI_DOE_ERR_EN_SW_GO_REQ_BUF_EMPTY_EN_M BIT(8)
sys/dev/ice/ice_hw_autogen.h
10964
#define E830_GLPCI_DOE_ERR_EN_SW_RD_RESP_BUF_ON_READY_LOW_EN_M BIT(9)
sys/dev/ice/ice_hw_autogen.h
10966
#define E830_GLPCI_DOE_ERR_EN_SW_REQ_DURING_MNG_RST_EN_M BIT(10)
sys/dev/ice/ice_hw_autogen.h
10968
#define E830_GLPCI_DOE_ERR_EN_FW_SET_ERROR_EN_M BIT(11)
sys/dev/ice/ice_hw_autogen.h
10970
#define E830_GLPCI_DOE_ERR_EN_SW_WR_REQ_BUF_ON_BUSY_DUE_ABORT_EN_M BIT(12)
sys/dev/ice/ice_hw_autogen.h
10972
#define E830_GLPCI_DOE_ERR_EN_SW_GO_ON_BUSY_DUE_ABORT_EN_M BIT(13)
sys/dev/ice/ice_hw_autogen.h
10974
#define E830_GLPCI_DOE_ERR_EN_SW_RD_RESP_BUF_ON_BUSY_DUE_ABORT_EN_M BIT(14)
sys/dev/ice/ice_hw_autogen.h
10977
#define E830_GLPCI_DOE_ERR_STATUS_RD_REQ_BUF_ECC_ERR_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
10979
#define E830_GLPCI_DOE_ERR_STATUS_RD_RESP_BUF_ECC_ERR_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
1098
#define GL_FW_TOOL_ATQLEN_ATQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
10981
#define E830_GLPCI_DOE_ERR_STATUS_SW_WR_CFG_POISONED_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
10983
#define E830_GLPCI_DOE_ERR_STATUS_SW_WR_REQ_BUF_ON_BUSY_DUE_REQ_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
10985
#define E830_GLPCI_DOE_ERR_STATUS_SW_GO_ON_BUSY_DUE_REQ_M BIT(4)
sys/dev/ice/ice_hw_autogen.h
10987
#define E830_GLPCI_DOE_ERR_STATUS_SW_WR_REQ_BUF_ON_BUSY_DUE_FW_M BIT(5)
sys/dev/ice/ice_hw_autogen.h
10989
#define E830_GLPCI_DOE_ERR_STATUS_SW_GO_ON_BUSY_DUE_FW_M BIT(6)
sys/dev/ice/ice_hw_autogen.h
10991
#define E830_GLPCI_DOE_ERR_STATUS_SW_WR_REQ_BUF_OVERFLOW_M BIT(7)
sys/dev/ice/ice_hw_autogen.h
10993
#define E830_GLPCI_DOE_ERR_STATUS_SW_GO_REQ_BUF_EMPTY_M BIT(8)
sys/dev/ice/ice_hw_autogen.h
10995
#define E830_GLPCI_DOE_ERR_STATUS_SW_RD_RESP_BUF_ON_READY_LOW_M BIT(9)
sys/dev/ice/ice_hw_autogen.h
10997
#define E830_GLPCI_DOE_ERR_STATUS_SW_REQ_DURING_MNG_RST_M BIT(10)
sys/dev/ice/ice_hw_autogen.h
10999
#define E830_GLPCI_DOE_ERR_STATUS_FW_SET_ERROR_M BIT(11)
sys/dev/ice/ice_hw_autogen.h
1100
#define GL_FW_TOOL_ATQLEN_ATQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
11001
#define E830_GLPCI_DOE_ERR_STATUS_SW_WR_REQ_BUF_ON_BUSY_DUE_ABORT_M BIT(12)
sys/dev/ice/ice_hw_autogen.h
11003
#define E830_GLPCI_DOE_ERR_STATUS_SW_GO_ON_BUSY_DUE_ABORT_M BIT(13)
sys/dev/ice/ice_hw_autogen.h
11005
#define E830_GLPCI_DOE_ERR_STATUS_SW_RD_RESP_BUF_ON_BUSY_DUE_ABORT_M BIT(14)
sys/dev/ice/ice_hw_autogen.h
11015
#define E830_GLPCI_DOE_RESP_READY_SET_M BIT(16)
sys/dev/ice/ice_hw_autogen.h
11020
#define E830_GLPCI_ERR_DBG_PCIE2SB_AER_MSG_SM_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
11026
#define E830_GLPCI_NPQ_CFG_HIGH_TO_M BIT(20)
sys/dev/ice/ice_hw_autogen.h
11028
#define E830_GLPCI_NPQ_CFG_INC_150MS_TO_M BIT(21)
sys/dev/ice/ice_hw_autogen.h
11031
#define E830_GLPCI_PUSH_PQM_CTRL_PF_LEGACY_RANGE_EN_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
11033
#define E830_GLPCI_PUSH_PQM_CTRL_PF_TXTIME_RANGE_EN_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
11035
#define E830_GLPCI_PUSH_PQM_CTRL_PF_4K_RANGE_EN_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
11037
#define E830_GLPCI_PUSH_PQM_CTRL_VF_LEGACY_RANGE_EN_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
11039
#define E830_GLPCI_PUSH_PQM_CTRL_VF_TXTIME_RANGE_EN_M BIT(4)
sys/dev/ice/ice_hw_autogen.h
11043
#define E830_GLPCI_PUSH_PQM_CTRL_PUSH_PQM_IF_TO_DIS_M BIT(12)
sys/dev/ice/ice_hw_autogen.h
11045
#define E830_GLPCI_PUSH_PQM_CTRL_RD_COMP_LEN_2DWS_ONE_CHUNK_EN_M BIT(16)
sys/dev/ice/ice_hw_autogen.h
11047
#define E830_GLPCI_PUSH_PQM_CTRL_RD_COMP_LEN_1DW_ON_XLR_M BIT(17)
sys/dev/ice/ice_hw_autogen.h
11058
#define E830_GLPCI_PUSH_PQM_DBG_CDT_FIFO_PUSH_WHEN_FULL_ERR_M BIT(25)
sys/dev/ice/ice_hw_autogen.h
1106
#define GL_MBX_PASID_PASID_MODE_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
11061
#define E830_GLPCI_PUSH_PQM_IF_TO_STATUS_GLPCI_PUSH_PQM_IF_TO_STATUS_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
1108
#define GL_MBX_PASID_PASID_MODE_VALID_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
11088
#define E830_GLPCI_SB_AER_MSG_OUT_EN_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
11090
#define E830_GLPCI_SB_AER_MSG_OUT_ANF_SET_EN_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
11156
#define E830_GLPTM_ART_CTL_ACTIVE_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
11158
#define E830_GLPTM_ART_CTL_TIME_OUT_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
11160
#define E830_GLPTM_ART_CTL_PTM_READY_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
11162
#define E830_GLPTM_ART_CTL_PTM_AUTO_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
11164
#define E830_GLPTM_ART_CTL_PTM_AUTO_LATCH_M BIT(4)
sys/dev/ice/ice_hw_autogen.h
11166
#define E830_GLPTM_ART_CTL_LATCH_PTP_T1_M BIT(5)
sys/dev/ice/ice_hw_autogen.h
11168
#define E830_GLPTM_ART_CTL_AUTO_POURSE_M BIT(6)
sys/dev/ice/ice_hw_autogen.h
11197
#define E830_PFPTM_SEM_BUSY_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
11205
#define E830_VSI_PASID_1_EN_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
11211
#define E830_VSI_PASID_2_EN_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
11220
#define E830_VSIQF_QGRP_CFG_VSI_QGRP_ENABLE_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
11237
#define E830_GLDCB_RTCTQ_PD_IS_PF_Q_M BIT(16)
sys/dev/ice/ice_hw_autogen.h
1124
#define PF_FW_ARQLEN_ARQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
11243
#define E830_GLDCB_RTCTQ_STICKY_EN_EN_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
1126
#define PF_FW_ARQLEN_ARQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
1128
#define PF_FW_ARQLEN_ARQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
11297
#define E830_VSI_VSI2F_LEM_VSI_ENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
1130
#define PF_FW_ARQLEN_ARQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
1149
#define PF_FW_ATQLEN_ATQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
1151
#define PF_FW_ATQLEN_ATQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
1153
#define PF_FW_ATQLEN_ATQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
1155
#define PF_FW_ATQLEN_ATQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
1174
#define PF_MBX_ARQLEN_ARQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
1176
#define PF_MBX_ARQLEN_ARQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
1178
#define PF_MBX_ARQLEN_ARQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
1180
#define PF_MBX_ARQLEN_ARQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
1197
#define PF_MBX_ATQLEN_ATQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
1199
#define PF_MBX_ATQLEN_ATQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
1201
#define PF_MBX_ATQLEN_ATQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
1203
#define PF_MBX_ATQLEN_ATQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
1222
#define PF_SB_ARQLEN_ARQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
1224
#define PF_SB_ARQLEN_ARQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
1226
#define PF_SB_ARQLEN_ARQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
1228
#define PF_SB_ARQLEN_ARQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
123
#define PF0_FW_HLP_ARQLEN_PAGE_ARQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
1245
#define PF_SB_ATQLEN_ATQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
1247
#define PF_SB_ATQLEN_ATQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
1249
#define PF_SB_ATQLEN_ATQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
125
#define PF0_FW_HLP_ARQLEN_PAGE_ARQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
1251
#define PF_SB_ATQLEN_ATQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
127
#define PF0_FW_HLP_ARQLEN_PAGE_ARQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
1273
#define PF0_FW_HLP_ARQLEN_ARQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
1275
#define PF0_FW_HLP_ARQLEN_ARQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
1277
#define PF0_FW_HLP_ARQLEN_ARQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
1279
#define PF0_FW_HLP_ARQLEN_ARQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
129
#define PF0_FW_HLP_ARQLEN_PAGE_ARQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
1298
#define PF0_FW_HLP_ATQLEN_ATQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
1300
#define PF0_FW_HLP_ATQLEN_ATQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
1302
#define PF0_FW_HLP_ATQLEN_ATQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
1304
#define PF0_FW_HLP_ATQLEN_ATQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
1323
#define PF0_FW_PSM_ARQLEN_ARQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
1325
#define PF0_FW_PSM_ARQLEN_ARQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
1327
#define PF0_FW_PSM_ARQLEN_ARQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
1329
#define PF0_FW_PSM_ARQLEN_ARQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
1348
#define PF0_FW_PSM_ATQLEN_ATQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
1350
#define PF0_FW_PSM_ATQLEN_ATQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
1352
#define PF0_FW_PSM_ATQLEN_ATQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
1354
#define PF0_FW_PSM_ATQLEN_ATQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
1373
#define PF0_MBX_CPM_ARQLEN_ARQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
1375
#define PF0_MBX_CPM_ARQLEN_ARQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
1377
#define PF0_MBX_CPM_ARQLEN_ARQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
1379
#define PF0_MBX_CPM_ARQLEN_ARQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
1396
#define PF0_MBX_CPM_ATQLEN_ATQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
1398
#define PF0_MBX_CPM_ATQLEN_ATQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
1400
#define PF0_MBX_CPM_ATQLEN_ATQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
1402
#define PF0_MBX_CPM_ATQLEN_ATQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
1421
#define PF0_MBX_HLP_ARQLEN_ARQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
1423
#define PF0_MBX_HLP_ARQLEN_ARQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
1425
#define PF0_MBX_HLP_ARQLEN_ARQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
1427
#define PF0_MBX_HLP_ARQLEN_ARQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
1444
#define PF0_MBX_HLP_ATQLEN_ATQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
1446
#define PF0_MBX_HLP_ATQLEN_ATQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
1448
#define PF0_MBX_HLP_ATQLEN_ATQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
1450
#define PF0_MBX_HLP_ATQLEN_ATQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
1469
#define PF0_MBX_PSM_ARQLEN_ARQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
1471
#define PF0_MBX_PSM_ARQLEN_ARQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
1473
#define PF0_MBX_PSM_ARQLEN_ARQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
1475
#define PF0_MBX_PSM_ARQLEN_ARQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
148
#define PF0_FW_HLP_ATQLEN_PAGE_ATQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
1492
#define PF0_MBX_PSM_ATQLEN_ATQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
1494
#define PF0_MBX_PSM_ATQLEN_ATQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
1496
#define PF0_MBX_PSM_ATQLEN_ATQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
1498
#define PF0_MBX_PSM_ATQLEN_ATQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
150
#define PF0_FW_HLP_ATQLEN_PAGE_ATQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
1517
#define PF0_SB_CPM_ARQLEN_ARQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
1519
#define PF0_SB_CPM_ARQLEN_ARQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
152
#define PF0_FW_HLP_ATQLEN_PAGE_ATQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
1521
#define PF0_SB_CPM_ARQLEN_ARQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
1523
#define PF0_SB_CPM_ARQLEN_ARQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
154
#define PF0_FW_HLP_ATQLEN_PAGE_ATQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
1540
#define PF0_SB_CPM_ATQLEN_ATQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
1542
#define PF0_SB_CPM_ATQLEN_ATQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
1544
#define PF0_SB_CPM_ATQLEN_ATQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
1546
#define PF0_SB_CPM_ATQLEN_ATQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
1568
#define PF0_SB_HLP_ARQLEN_ARQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
1570
#define PF0_SB_HLP_ARQLEN_ARQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
1572
#define PF0_SB_HLP_ARQLEN_ARQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
1574
#define PF0_SB_HLP_ARQLEN_ARQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
1591
#define PF0_SB_HLP_ATQLEN_ATQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
1593
#define PF0_SB_HLP_ATQLEN_ATQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
1595
#define PF0_SB_HLP_ATQLEN_ATQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
1597
#define PF0_SB_HLP_ATQLEN_ATQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
1609
#define SB_REM_DEV_DEST_DEST_VALID_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
1629
#define VF_MBX_ARQLEN_ARQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
1631
#define VF_MBX_ARQLEN_ARQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
1633
#define VF_MBX_ARQLEN_ARQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
1635
#define VF_MBX_ARQLEN_ARQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
1657
#define VF_MBX_ATQLEN_ATQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
1659
#define VF_MBX_ATQLEN_ATQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
1661
#define VF_MBX_ATQLEN_ATQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
1663
#define VF_MBX_ATQLEN_ATQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
1687
#define VF_MBX_CPM_ARQLEN_ARQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
1689
#define VF_MBX_CPM_ARQLEN_ARQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
1691
#define VF_MBX_CPM_ARQLEN_ARQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
1693
#define VF_MBX_CPM_ARQLEN_ARQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
1715
#define VF_MBX_CPM_ATQLEN_ATQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
1717
#define VF_MBX_CPM_ATQLEN_ATQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
1719
#define VF_MBX_CPM_ATQLEN_ATQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
1721
#define VF_MBX_CPM_ATQLEN_ATQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
173
#define PF0_FW_PSM_ARQLEN_PAGE_ARQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
1745
#define VF_MBX_HLP_ARQLEN_ARQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
1747
#define VF_MBX_HLP_ARQLEN_ARQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
1749
#define VF_MBX_HLP_ARQLEN_ARQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
175
#define PF0_FW_PSM_ARQLEN_PAGE_ARQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
1751
#define VF_MBX_HLP_ARQLEN_ARQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
177
#define PF0_FW_PSM_ARQLEN_PAGE_ARQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
1773
#define VF_MBX_HLP_ATQLEN_ATQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
1775
#define VF_MBX_HLP_ATQLEN_ATQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
1777
#define VF_MBX_HLP_ATQLEN_ATQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
1779
#define VF_MBX_HLP_ATQLEN_ATQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
179
#define PF0_FW_PSM_ARQLEN_PAGE_ARQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
1803
#define VF_MBX_PSM_ARQLEN_ARQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
1805
#define VF_MBX_PSM_ARQLEN_ARQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
1807
#define VF_MBX_PSM_ARQLEN_ARQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
1809
#define VF_MBX_PSM_ARQLEN_ARQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
1831
#define VF_MBX_PSM_ATQLEN_ATQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
1833
#define VF_MBX_PSM_ATQLEN_ATQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
1835
#define VF_MBX_PSM_ATQLEN_ATQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
1837
#define VF_MBX_PSM_ATQLEN_ATQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
1861
#define VF_SB_CPM_ARQLEN_ARQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
1863
#define VF_SB_CPM_ARQLEN_ARQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
1865
#define VF_SB_CPM_ARQLEN_ARQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
1867
#define VF_SB_CPM_ARQLEN_ARQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
1889
#define VF_SB_CPM_ATQLEN_ATQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
1891
#define VF_SB_CPM_ATQLEN_ATQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
1893
#define VF_SB_CPM_ATQLEN_ATQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
1895
#define VF_SB_CPM_ATQLEN_ATQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
1906
#define VP_MBX_CPM_PF_VF_CTRL_QUEUE_EN_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
1910
#define VP_MBX_HLP_PF_VF_CTRL_QUEUE_EN_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
1914
#define VP_MBX_PF_VF_CTRL_QUEUE_EN_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
1918
#define VP_MBX_PSM_PF_VF_CTRL_QUEUE_EN_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
1922
#define VP_SB_CPM_PF_VF_CTRL_QUEUE_EN_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
1925
#define GL_DCB_TDSCP2TC_BLOCK_DIS_DSCP2TC_BLOCK_DIS_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
1942
#define GLDCB_PRS_RETSTCC_ETSTC_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
1953
#define GLDCB_PRS_RSPMC_RPM_DIS_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
1959
#define GLDCB_RETSTCC_ETSTC_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
1972
#define GLDCB_SWT_RETSTCC_ETSTC_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
1978
#define GLDCB_TCB_MNG_SP_MNG_SP_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
198
#define PF0_FW_PSM_ATQLEN_PAGE_ATQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
1984
#define GLDCB_TCB_WB_SP_WB_SP_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
1993
#define GLDCB_TCUPM_NO_EXCEED_DIS_NON_EXCEED_DIS_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
1996
#define GLDCB_TCUPM_WB_DIS_PORT_DISABLE_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
1998
#define GLDCB_TCUPM_WB_DIS_TC_DISABLE_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
200
#define PF0_FW_PSM_ATQLEN_PAGE_ATQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
202
#define PF0_FW_PSM_ATQLEN_PAGE_ATQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
2037
#define GLTCB_CREDIT_EXP_CTL_EN_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
204
#define PF0_FW_PSM_ATQLEN_PAGE_ATQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
2056
#define GLTCB_WB_RL_EN_M BIT(16)
sys/dev/ice/ice_hw_autogen.h
2061
#define GLTPB_WB_RL_EN_M BIT(16)
sys/dev/ice/ice_hw_autogen.h
2080
#define PRTDCB_GENC_FCOEUP_VALID_M BIT(9)
sys/dev/ice/ice_hw_autogen.h
2088
#define PRTDCB_PRS_RETSC_ETS_MODE_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
2090
#define PRTDCB_PRS_RETSC_NON_ETS_MODE_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
2097
#define PRTDCB_PRS_RPRRC_BWSHARE_DIS_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
2100
#define PRTDCB_RETSC_ETS_MODE_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
2102
#define PRTDCB_RETSC_NON_ETS_MODE_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
2109
#define PRTDCB_RPRRC_BWSHARE_DIS_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
2135
#define PRTDCB_SWT_RETSC_ETS_MODE_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
2137
#define PRTDCB_SWT_RETSC_NON_ETS_MODE_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
2198
#define PRTDCB_TDPUC_MAL_LENGTH_M BIT(16)
sys/dev/ice/ice_hw_autogen.h
2200
#define PRTDCB_TDPUC_MAL_CMD_M BIT(17)
sys/dev/ice/ice_hw_autogen.h
2202
#define PRTDCB_TDPUC_TTL_DROP_M BIT(18)
sys/dev/ice/ice_hw_autogen.h
2204
#define PRTDCB_TDPUC_UR_DROP_M BIT(19)
sys/dev/ice/ice_hw_autogen.h
2206
#define PRTDCB_TDPUC_DUMMY_M BIT(20)
sys/dev/ice/ice_hw_autogen.h
2208
#define PRTDCB_TDPUC_BIG_PKT_SIZE_M BIT(21)
sys/dev/ice/ice_hw_autogen.h
2210
#define PRTDCB_TDPUC_L2_ACCEPT_FAIL_M BIT(22)
sys/dev/ice/ice_hw_autogen.h
2212
#define PRTDCB_TDPUC_DSCP_CHECK_FAIL_M BIT(23)
sys/dev/ice/ice_hw_autogen.h
2214
#define PRTDCB_TDPUC_RCU_ANTISPOOF_M BIT(24)
sys/dev/ice/ice_hw_autogen.h
2216
#define PRTDCB_TDPUC_NIC_DSI_M BIT(25)
sys/dev/ice/ice_hw_autogen.h
2218
#define PRTDCB_TDPUC_NIC_IPSEC_M BIT(26)
sys/dev/ice/ice_hw_autogen.h
2220
#define PRTDCB_TDPUC_CLEAR_DROP_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
2223
#define PRTDCB_TFCS_TXOFF_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
2225
#define PRTDCB_TFCS_TXOFF0_M BIT(8)
sys/dev/ice/ice_hw_autogen.h
2227
#define PRTDCB_TFCS_TXOFF1_M BIT(9)
sys/dev/ice/ice_hw_autogen.h
2229
#define PRTDCB_TFCS_TXOFF2_M BIT(10)
sys/dev/ice/ice_hw_autogen.h
223
#define PF0_MBX_CPM_ARQLEN_PAGE_ARQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
2231
#define PRTDCB_TFCS_TXOFF3_M BIT(11)
sys/dev/ice/ice_hw_autogen.h
2233
#define PRTDCB_TFCS_TXOFF4_M BIT(12)
sys/dev/ice/ice_hw_autogen.h
2235
#define PRTDCB_TFCS_TXOFF5_M BIT(13)
sys/dev/ice/ice_hw_autogen.h
2237
#define PRTDCB_TFCS_TXOFF6_M BIT(14)
sys/dev/ice/ice_hw_autogen.h
2239
#define PRTDCB_TFCS_TXOFF7_M BIT(15)
sys/dev/ice/ice_hw_autogen.h
225
#define PF0_MBX_CPM_ARQLEN_PAGE_ARQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
227
#define PF0_MBX_CPM_ARQLEN_PAGE_ARQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
2277
#define PRTDCB_TX_DSCP2UP_CTL_DSCP2UP_ENA_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
229
#define PF0_MBX_CPM_ARQLEN_PAGE_ARQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
2387
#define TPB_GLDCB_TCB_WB_SP_WB_SP_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
2390
#define TPB_GLTCB_CREDIT_EXP_CTL_EN_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
2458
#define E800_GL_ACLEXT_CTLTBL_L2ADDR_AUTO_INC_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
246
#define PF0_MBX_CPM_ATQLEN_PAGE_ATQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
248
#define PF0_MBX_CPM_ATQLEN_PAGE_ATQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
2494
#define E800_GL_ACLEXT_FORCE_L1CDID_STATIC_CDID_EN_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
250
#define PF0_MBX_CPM_ATQLEN_PAGE_ATQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
2500
#define E800_GL_ACLEXT_FORCE_PID_STATIC_PID_EN_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
2506
#define E800_GL_ACLEXT_K2N_L2ADDR_AUTO_INC_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
252
#define PF0_MBX_CPM_ATQLEN_PAGE_ATQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
2564
#define E800_GL_ACLEXT_N2N_L2ADDR_AUTO_INC_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
2578
#define E800_GL_ACLEXT_P2P_L1ADDR_LINE_IDX_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
2580
#define E800_GL_ACLEXT_P2P_L1ADDR_AUTO_INC_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
2592
#define E800_GL_ACLEXT_PLVL_SEL_PLVL_SEL_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
2598
#define E800_GL_ACLEXT_TCAM_L2ADDR_AUTO_INC_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
2612
#define E800_GL_ACLEXT_XLT0_L1ADDR_AUTO_INC_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
2622
#define E800_GL_ACLEXT_XLT1_L2ADDR_AUTO_INC_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
2632
#define E800_GL_ACLEXT_XLT2_L2ADDR_AUTO_INC_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
2664
#define GL_PREEXT_CTLTBL_L2ADDR_AUTO_INC_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
2704
#define GL_PREEXT_FORCE_L1CDID_STATIC_CDID_EN_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
271
#define PF0_MBX_HLP_ARQLEN_PAGE_ARQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
2710
#define GL_PREEXT_FORCE_PID_STATIC_PID_EN_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
2716
#define GL_PREEXT_K2N_L2ADDR_AUTO_INC_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
273
#define PF0_MBX_HLP_ARQLEN_PAGE_ARQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
275
#define PF0_MBX_HLP_ARQLEN_PAGE_ARQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
277
#define PF0_MBX_HLP_ARQLEN_PAGE_ARQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
2774
#define GL_PREEXT_N2N_L2ADDR_AUTO_INC_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
2788
#define GL_PREEXT_P2P_L1ADDR_LINE_IDX_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
2790
#define GL_PREEXT_P2P_L1ADDR_AUTO_INC_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
2802
#define GL_PREEXT_PLVL_SEL_PLVL_SEL_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
2808
#define GL_PREEXT_TCAM_L2ADDR_AUTO_INC_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
2822
#define GL_PREEXT_XLT0_L1ADDR_AUTO_INC_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
2832
#define GL_PREEXT_XLT1_L2ADDR_AUTO_INC_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
2842
#define GL_PREEXT_XLT2_L2ADDR_AUTO_INC_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
2874
#define GL_PSTEXT_CTLTBL_L2ADDR_AUTO_INC_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
2922
#define GL_PSTEXT_FORCE_L1CDID_STATIC_CDID_EN_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
2928
#define GL_PSTEXT_FORCE_PID_STATIC_PID_EN_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
2934
#define GL_PSTEXT_K2N_L2ADDR_AUTO_INC_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
294
#define PF0_MBX_HLP_ATQLEN_PAGE_ATQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
296
#define PF0_MBX_HLP_ATQLEN_PAGE_ATQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
2972
#define GL_PSTEXT_N2N_L2ADDR_AUTO_INC_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
298
#define PF0_MBX_HLP_ATQLEN_PAGE_ATQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
2986
#define GL_PSTEXT_P2P_L1ADDR_LINE_IDX_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
2988
#define GL_PSTEXT_P2P_L1ADDR_AUTO_INC_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
300
#define PF0_MBX_HLP_ATQLEN_PAGE_ATQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
3000
#define GL_PSTEXT_PLVL_SEL_PLVL_SEL_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
3006
#define GL_PSTEXT_PRFLM_CTRL_RD_REQ_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
3008
#define GL_PSTEXT_PRFLM_CTRL_WR_REQ_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
3032
#define GL_PSTEXT_TCAM_L2ADDR_AUTO_INC_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
3046
#define GL_PSTEXT_XLT0_L1ADDR_AUTO_INC_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
3056
#define GL_PSTEXT_XLT1_L2ADDR_AUTO_INC_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
3066
#define GL_PSTEXT_XLT2_L2ADDR_AUTO_INC_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
3182
#define QRXFLXP_CNTXT_TS_M BIT(11)
sys/dev/ice/ice_hw_autogen.h
3187
#define GL_FWSTS_FWROWD_M BIT(8)
sys/dev/ice/ice_hw_autogen.h
3189
#define GL_FWSTS_FWRI_M BIT(9)
sys/dev/ice/ice_hw_autogen.h
319
#define PF0_MBX_PSM_ARQLEN_PAGE_ARQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
3194
#define GL_TCVMLR_DRAIN_CNTR_CTL_OP_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
3201
#define GL_TCVMLR_DRAIN_DONE_DEC_TARGET_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
321
#define PF0_MBX_PSM_ARQLEN_PAGE_ARQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
3221
#define GL_TCVMLR_ERR_STAT_ERROR_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
3223
#define GL_TCVMLR_ERR_STAT_FW_REQ_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
323
#define PF0_MBX_PSM_ARQLEN_PAGE_ARQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
3234
#define GL_TCVMLR_QCFG_OP_M BIT(14)
sys/dev/ice/ice_hw_autogen.h
325
#define PF0_MBX_PSM_ARQLEN_PAGE_ARQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
3253
#define GL_TCVMLR_QCTL_OP_M BIT(14)
sys/dev/ice/ice_hw_autogen.h
3260
#define GL_TCVMLR_REQ_STAT_OP_M BIT(17)
sys/dev/ice/ice_hw_autogen.h
3305
#define GLGEN_ANA_CFG_HTBL_LU_RESULT_HIT_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
3320
#define GLGEN_ANA_CFG_SPLBUF_LU_RESULT_HIT_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
3337
#define GLGEN_ANA_FLAG_MAP_FLAG_EN_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
3349
#define GLGEN_ANA_LAST_PROT_ID_EN_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
3390
#define GLGEN_ANA_PROFIL_CTRL_SEL_DEF_PROF_ID_M BIT(20)
sys/dev/ice/ice_hw_autogen.h
3408
#define GLGEN_ANA_TX_CFG_HTBL_LU_RESULT_HIT_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
342
#define PF0_MBX_PSM_ATQLEN_PAGE_ATQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
3423
#define GLGEN_ANA_TX_CFG_SPLBUF_LU_RESULT_HIT_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
3436
#define GLGEN_ANA_TX_DFD_PACE_OUT_PUSH_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
344
#define PF0_MBX_PSM_ATQLEN_PAGE_ATQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
3443
#define GLGEN_ANA_TX_FLAG_MAP_FLAG_EN_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
346
#define PF0_MBX_PSM_ATQLEN_PAGE_ATQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
348
#define PF0_MBX_PSM_ATQLEN_PAGE_ATQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
3490
#define GLGEN_ANA_TX_PROFIL_CTRL_SEL_DEF_PROF_ID_M BIT(20)
sys/dev/ice/ice_hw_autogen.h
3493
#define GLGEN_ASSERT_HLP_CORE_ON_RST_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
3495
#define GLGEN_ASSERT_HLP_FULL_ON_RST_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
3535
#define GLGEN_GPIO_CTL_IN_VALUE_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
3537
#define GLGEN_GPIO_CTL_IN_TRANSIT_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
3539
#define GLGEN_GPIO_CTL_OUT_VALUE_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
3541
#define GLGEN_GPIO_CTL_NO_P_UP_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
3543
#define GLGEN_GPIO_CTL_PIN_DIR_M BIT(4)
sys/dev/ice/ice_hw_autogen.h
3545
#define GLGEN_GPIO_CTL_TRI_CTL_M BIT(5)
sys/dev/ice/ice_hw_autogen.h
3554
#define GLGEN_MARKER_COUNT_MARKER_COUNT_EN_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
3569
#define GLGEN_RSTAT_RTRIG_FLR_M BIT(16)
sys/dev/ice/ice_hw_autogen.h
3571
#define GLGEN_RSTAT_RTRIG_ECC_M BIT(17)
sys/dev/ice/ice_hw_autogen.h
3573
#define GLGEN_RSTAT_RTRIG_FW_AUX_M BIT(18)
sys/dev/ice/ice_hw_autogen.h
3578
#define GLGEN_RSTCTL_ECC_RST_ENA_M BIT(8)
sys/dev/ice/ice_hw_autogen.h
3580
#define GLGEN_RSTCTL_ECC_RT_EN_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
3582
#define GLGEN_RSTCTL_FLR_RT_EN_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
3585
#define GLGEN_RTRIG_CORER_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
3587
#define GLGEN_RTRIG_GLOBR_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
3589
#define GLGEN_RTRIG_EMPFWR_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
3599
#define GLGEN_XLR_MSK2HLP_RDY_GLGEN_XLR_MSK2HLP_RDY_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
3610
#define PFGEN_CTRL_PFSWR_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
3613
#define PFGEN_DRUN_DRVUNLD_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
3616
#define PFGEN_PFRSTAT_PFRD_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
3622
#define PFGEN_STATE_PFPEEN_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
3624
#define PFGEN_STATE_RSVD_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
3626
#define PFGEN_STATE_PFLINKEN_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
3628
#define PFGEN_STATE_PFSCEN_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
3634
#define PRTGEN_CNF_PORT_DIS_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
3636
#define PRTGEN_CNF_ALLOW_PORT_DIS_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
3638
#define PRTGEN_CNF_EMP_PORT_DIS_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
3641
#define PRTGEN_CNF2_ACTIVATE_PORT_LINK_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
3644
#define PRTGEN_CNF3_PORT_STAGERING_EN_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
3647
#define PRTGEN_STATUS_PORT_VALID_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
3649
#define PRTGEN_STATUS_PORT_ACTIVE_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
3657
#define VPGEN_VFRSTAT_VFRD_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
3661
#define VPGEN_VFRTRIG_VFSWR_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
3665
#define VSIGEN_RSTAT_VMRD_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
3669
#define VSIGEN_RTRIG_VMSWR_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
367
#define PF0_SB_CPM_ARQLEN_PAGE_ARQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
369
#define PF0_SB_CPM_ARQLEN_PAGE_ARQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
371
#define PF0_SB_CPM_ARQLEN_PAGE_ARQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
373
#define PF0_SB_CPM_ARQLEN_PAGE_ARQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
3730
#define GLHMC_FWPDINV_PMSDPARTSEL_M BIT(15)
sys/dev/ice/ice_hw_autogen.h
3737
#define GLHMC_FWPDINV_FPMAT_PMSDPARTSEL_M BIT(15)
sys/dev/ice/ice_hw_autogen.h
3748
#define GLHMC_FWSDDATALOW_PMSDVALID_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
3750
#define GLHMC_FWSDDATALOW_PMSDTYPE_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
3757
#define GLHMC_FWSDDATALOW_FPMAT_PMSDVALID_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
3759
#define GLHMC_FWSDDATALOW_FPMAT_PMSDTYPE_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
390
#define PF0_SB_CPM_ATQLEN_PAGE_ATQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
392
#define PF0_SB_CPM_ATQLEN_PAGE_ATQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
394
#define PF0_SB_CPM_ATQLEN_PAGE_ATQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
396
#define PF0_SB_CPM_ATQLEN_PAGE_ATQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
4074
#define GLHMC_VFPDINV_PMSDPARTSEL_M BIT(15)
sys/dev/ice/ice_hw_autogen.h
4082
#define GLHMC_VFPDINV_FPMAT_PMSDPARTSEL_M BIT(15)
sys/dev/ice/ice_hw_autogen.h
415
#define PF0_SB_HLP_ARQLEN_PAGE_ARQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
417
#define PF0_SB_HLP_ARQLEN_PAGE_ARQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
419
#define PF0_SB_HLP_ARQLEN_PAGE_ARQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
421
#define PF0_SB_HLP_ARQLEN_PAGE_ARQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
4224
#define GLHMC_VFSDDATALOW_PMSDVALID_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
4226
#define GLHMC_VFSDDATALOW_PMSDTYPE_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
4234
#define GLHMC_VFSDDATALOW_FPMAT_PMSDVALID_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
4236
#define GLHMC_VFSDDATALOW_FPMAT_PMSDTYPE_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
4312
#define PFHMC_ERRORINFO_PMF_ISVF_M BIT(7)
sys/dev/ice/ice_hw_autogen.h
4318
#define PFHMC_ERRORINFO_ERROR_DETECTED_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
4323
#define PFHMC_ERRORINFO_FPMAT_PMF_ISVF_M BIT(7)
sys/dev/ice/ice_hw_autogen.h
4329
#define PFHMC_ERRORINFO_FPMAT_ERROR_DETECTED_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
4334
#define PFHMC_PDINV_PMSDPARTSEL_M BIT(15)
sys/dev/ice/ice_hw_autogen.h
4341
#define PFHMC_PDINV_FPMAT_PMSDPARTSEL_M BIT(15)
sys/dev/ice/ice_hw_autogen.h
4348
#define PFHMC_SDCMD_PMSDPARTSEL_M BIT(15)
sys/dev/ice/ice_hw_autogen.h
4350
#define PFHMC_SDCMD_PMSDWR_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
4355
#define PFHMC_SDCMD_FPMAT_PMSDPARTSEL_M BIT(15)
sys/dev/ice/ice_hw_autogen.h
4357
#define PFHMC_SDCMD_FPMAT_PMSDWR_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
4366
#define PFHMC_SDDATALOW_PMSDVALID_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
4368
#define PFHMC_SDDATALOW_PMSDTYPE_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
4375
#define PFHMC_SDDATALOW_FPMAT_PMSDVALID_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
4377
#define PFHMC_SDDATALOW_FPMAT_PMSDTYPE_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
438
#define PF0_SB_HLP_ATQLEN_PAGE_ATQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
4389
#define GL_MDCK_TDAT_TCLAN_WRONG_ORDER_FORMAT_DESC_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
4391
#define GL_MDCK_TDAT_TCLAN_UR_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
4393
#define GL_MDCK_TDAT_TCLAN_TAIL_DESC_NOT_DDESC_EOP_NOP_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
4395
#define GL_MDCK_TDAT_TCLAN_FALSE_SCHEDULING_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
4397
#define GL_MDCK_TDAT_TCLAN_TAIL_VALUE_BIGGER_THAN_RING_LEN_M BIT(4)
sys/dev/ice/ice_hw_autogen.h
4399
#define GL_MDCK_TDAT_TCLAN_MORE_THAN_8_DCMDS_IN_PKT_M BIT(5)
sys/dev/ice/ice_hw_autogen.h
440
#define PF0_SB_HLP_ATQLEN_PAGE_ATQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
4401
#define GL_MDCK_TDAT_TCLAN_NO_HEAD_UPDATE_IN_QUANTA_M BIT(6)
sys/dev/ice/ice_hw_autogen.h
4403
#define GL_MDCK_TDAT_TCLAN_PKT_LEN_NOT_LEGAL_M BIT(7)
sys/dev/ice/ice_hw_autogen.h
4405
#define GL_MDCK_TDAT_TCLAN_TSO_TLEN_NOT_COHERENT_WITH_SUM_BUFS_M BIT(8)
sys/dev/ice/ice_hw_autogen.h
4407
#define GL_MDCK_TDAT_TCLAN_TSO_TAIL_REACHED_BEFORE_TLEN_END_M BIT(9)
sys/dev/ice/ice_hw_autogen.h
4409
#define GL_MDCK_TDAT_TCLAN_TSO_MORE_THAN_3_HDRS_M BIT(10)
sys/dev/ice/ice_hw_autogen.h
4411
#define GL_MDCK_TDAT_TCLAN_TSO_SUM_BUFFS_LT_SUM_HDRS_M BIT(11)
sys/dev/ice/ice_hw_autogen.h
4413
#define GL_MDCK_TDAT_TCLAN_TSO_ZERO_MSS_TLEN_HDRS_M BIT(12)
sys/dev/ice/ice_hw_autogen.h
4415
#define GL_MDCK_TDAT_TCLAN_TSO_CTX_DESC_IPSEC_M BIT(13)
sys/dev/ice/ice_hw_autogen.h
4417
#define GL_MDCK_TDAT_TCLAN_SSO_COMS_NOT_WHOLE_PKT_NUM_IN_QUANTA_M BIT(14)
sys/dev/ice/ice_hw_autogen.h
4419
#define GL_MDCK_TDAT_TCLAN_COMS_QUANTA_BYTES_EXCEED_PKTLEN_X_64_M BIT(15)
sys/dev/ice/ice_hw_autogen.h
442
#define PF0_SB_HLP_ATQLEN_PAGE_ATQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
4421
#define GL_MDCK_TDAT_TCLAN_COMS_QUANTA_CMDS_EXCEED_M BIT(16)
sys/dev/ice/ice_hw_autogen.h
4423
#define GL_MDCK_TDAT_TCLAN_TSO_COMS_TSO_DESCS_LAST_LSO_QUANTA_M BIT(17)
sys/dev/ice/ice_hw_autogen.h
4425
#define GL_MDCK_TDAT_TCLAN_TSO_COMS_TSO_DESCS_TLEN_M BIT(18)
sys/dev/ice/ice_hw_autogen.h
4427
#define GL_MDCK_TDAT_TCLAN_TSO_COMS_QUANTA_FINISHED_TOO_EARLY_M BIT(19)
sys/dev/ice/ice_hw_autogen.h
4429
#define GL_MDCK_TDAT_TCLAN_COMS_NUM_PKTS_IN_QUANTA_M BIT(20)
sys/dev/ice/ice_hw_autogen.h
444
#define PF0_SB_HLP_ATQLEN_PAGE_ATQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
451
#define PF0INT_DYN_CTL_INTENA_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
4513
#define GLTPB_PORT_PACING_SPEED_PORT0_SPEED_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
4515
#define GLTPB_PORT_PACING_SPEED_PORT1_SPEED_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
4517
#define GLTPB_PORT_PACING_SPEED_PORT2_SPEED_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
4519
#define GLTPB_PORT_PACING_SPEED_PORT3_SPEED_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
4521
#define GLTPB_PORT_PACING_SPEED_PORT4_SPEED_M BIT(4)
sys/dev/ice/ice_hw_autogen.h
4523
#define GLTPB_PORT_PACING_SPEED_PORT5_SPEED_M BIT(5)
sys/dev/ice/ice_hw_autogen.h
4525
#define GLTPB_PORT_PACING_SPEED_PORT6_SPEED_M BIT(6)
sys/dev/ice/ice_hw_autogen.h
4527
#define GLTPB_PORT_PACING_SPEED_PORT7_SPEED_M BIT(7)
sys/dev/ice/ice_hw_autogen.h
453
#define PF0INT_DYN_CTL_CLEARPBA_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
4537
#define GL_UFUSE_SOC_PE_DISABLE_M BIT(4)
sys/dev/ice/ice_hw_autogen.h
4539
#define GL_UFUSE_SOC_SWITCH_MODE_M BIT(5)
sys/dev/ice/ice_hw_autogen.h
4541
#define GL_UFUSE_SOC_CSR_PROTECTION_ENABLE_M BIT(6)
sys/dev/ice/ice_hw_autogen.h
4543
#define GL_UFUSE_SOC_SERIAL_50G_M BIT(7)
sys/dev/ice/ice_hw_autogen.h
4545
#define GL_UFUSE_SOC_NIC_ID_M BIT(8)
sys/dev/ice/ice_hw_autogen.h
4547
#define GL_UFUSE_SOC_BLOCK_BME_TO_FW_M BIT(9)
sys/dev/ice/ice_hw_autogen.h
4549
#define GL_UFUSE_SOC_SOC_TYPE_M BIT(10)
sys/dev/ice/ice_hw_autogen.h
455
#define PF0INT_DYN_CTL_SWINT_TRIG_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
4551
#define GL_UFUSE_SOC_BTS_MODE_M BIT(11)
sys/dev/ice/ice_hw_autogen.h
4556
#define EMPINT_GPIO_ENA_GPIO0_ENA_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
4558
#define EMPINT_GPIO_ENA_GPIO1_ENA_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
4560
#define EMPINT_GPIO_ENA_GPIO2_ENA_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
4562
#define EMPINT_GPIO_ENA_GPIO3_ENA_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
4564
#define EMPINT_GPIO_ENA_GPIO4_ENA_M BIT(4)
sys/dev/ice/ice_hw_autogen.h
4566
#define EMPINT_GPIO_ENA_GPIO5_ENA_M BIT(5)
sys/dev/ice/ice_hw_autogen.h
4568
#define EMPINT_GPIO_ENA_GPIO6_ENA_M BIT(6)
sys/dev/ice/ice_hw_autogen.h
4579
#define GLINT_CEQCTL_CAUSE_ENA_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
4581
#define GLINT_CEQCTL_INTEVENT_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
4584
#define GLINT_CTL_DIS_AUTOMASK_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
4598
#define GLINT_DYN_CTL_INTENA_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
4600
#define GLINT_DYN_CTL_CLEARPBA_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
4602
#define GLINT_DYN_CTL_SWINT_TRIG_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
4608
#define GLINT_DYN_CTL_SW_ITR_INDX_ENA_M BIT(24)
sys/dev/ice/ice_hw_autogen.h
461
#define PF0INT_DYN_CTL_SW_ITR_INDX_ENA_M BIT(24)
sys/dev/ice/ice_hw_autogen.h
4612
#define GLINT_DYN_CTL_WB_ON_ITR_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
4614
#define GLINT_DYN_CTL_INTENA_MSK_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
4621
#define GLINT_FW_TOOL_CTL_CAUSE_ENA_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
4623
#define GLINT_FW_TOOL_CTL_INTEVENT_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
4633
#define GLINT_RATE_INTRL_ENA_M BIT(6)
sys/dev/ice/ice_hw_autogen.h
465
#define PF0INT_DYN_CTL_WB_ON_ITR_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
4650
#define GLINT_VECT2FUNC_IS_PF_M BIT(16)
sys/dev/ice/ice_hw_autogen.h
4657
#define PF0INT_FW_HLP_CTL_CAUSE_ENA_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
4659
#define PF0INT_FW_HLP_CTL_INTEVENT_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
4666
#define PF0INT_FW_PSM_CTL_CAUSE_ENA_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
4668
#define PF0INT_FW_PSM_CTL_INTEVENT_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
467
#define PF0INT_DYN_CTL_INTENA_MSK_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
4675
#define PF0INT_MBX_CPM_CTL_CAUSE_ENA_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
4677
#define PF0INT_MBX_CPM_CTL_INTEVENT_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
4684
#define PF0INT_MBX_HLP_CTL_CAUSE_ENA_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
4686
#define PF0INT_MBX_HLP_CTL_INTEVENT_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
4693
#define PF0INT_MBX_PSM_CTL_CAUSE_ENA_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
4695
#define PF0INT_MBX_PSM_CTL_INTEVENT_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
4698
#define PF0INT_OICR_CPM_INTEVENT_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
4700
#define PF0INT_OICR_CPM_QUEUE_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
4706
#define E800_PF0INT_OICR_CPM_HH_COMP_M BIT(10)
sys/dev/ice/ice_hw_autogen.h
4708
#define PF0INT_OICR_CPM_TSYN_TX_M BIT(11)
sys/dev/ice/ice_hw_autogen.h
4710
#define PF0INT_OICR_CPM_TSYN_EVNT_M BIT(12)
sys/dev/ice/ice_hw_autogen.h
4712
#define PF0INT_OICR_CPM_TSYN_TGT_M BIT(13)
sys/dev/ice/ice_hw_autogen.h
4714
#define PF0INT_OICR_CPM_HLP_RDY_M BIT(14)
sys/dev/ice/ice_hw_autogen.h
4716
#define PF0INT_OICR_CPM_CPM_RDY_M BIT(15)
sys/dev/ice/ice_hw_autogen.h
4718
#define PF0INT_OICR_CPM_ECC_ERR_M BIT(16)
sys/dev/ice/ice_hw_autogen.h
4722
#define PF0INT_OICR_CPM_MAL_DETECT_M BIT(19)
sys/dev/ice/ice_hw_autogen.h
4724
#define PF0INT_OICR_CPM_GRST_M BIT(20)
sys/dev/ice/ice_hw_autogen.h
4726
#define PF0INT_OICR_CPM_PCI_EXCEPTION_M BIT(21)
sys/dev/ice/ice_hw_autogen.h
4728
#define PF0INT_OICR_CPM_GPIO_M BIT(22)
sys/dev/ice/ice_hw_autogen.h
4730
#define PF0INT_OICR_CPM_RSV3_M BIT(23)
sys/dev/ice/ice_hw_autogen.h
4732
#define PF0INT_OICR_CPM_STORM_DETECT_M BIT(24)
sys/dev/ice/ice_hw_autogen.h
4734
#define PF0INT_OICR_CPM_LINK_STAT_CHANGE_M BIT(25)
sys/dev/ice/ice_hw_autogen.h
4736
#define PF0INT_OICR_CPM_HMC_ERR_M BIT(26)
sys/dev/ice/ice_hw_autogen.h
4738
#define PF0INT_OICR_CPM_PE_PUSH_M BIT(27)
sys/dev/ice/ice_hw_autogen.h
4740
#define PF0INT_OICR_CPM_PE_CRITERR_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
4742
#define PF0INT_OICR_CPM_VFLR_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
4744
#define PF0INT_OICR_CPM_XLR_HW_DONE_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
4746
#define PF0INT_OICR_CPM_SWINT_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
4753
#define PF0INT_OICR_CTL_CPM_CAUSE_ENA_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
4755
#define PF0INT_OICR_CTL_CPM_INTEVENT_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
4762
#define PF0INT_OICR_CTL_HLP_CAUSE_ENA_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
4764
#define PF0INT_OICR_CTL_HLP_INTEVENT_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
4771
#define PF0INT_OICR_CTL_PSM_CAUSE_ENA_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
4773
#define PF0INT_OICR_CTL_PSM_INTEVENT_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
4776
#define PF0INT_OICR_ENA_CPM_RSV0_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
4781
#define PF0INT_OICR_ENA_HLP_RSV0_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
4786
#define PF0INT_OICR_ENA_PSM_RSV0_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
4791
#define PF0INT_OICR_HLP_INTEVENT_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
4793
#define PF0INT_OICR_HLP_QUEUE_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
4799
#define E800_PF0INT_OICR_HLP_HH_COMP_M BIT(10)
sys/dev/ice/ice_hw_autogen.h
4801
#define PF0INT_OICR_HLP_TSYN_TX_M BIT(11)
sys/dev/ice/ice_hw_autogen.h
4803
#define PF0INT_OICR_HLP_TSYN_EVNT_M BIT(12)
sys/dev/ice/ice_hw_autogen.h
4805
#define PF0INT_OICR_HLP_TSYN_TGT_M BIT(13)
sys/dev/ice/ice_hw_autogen.h
4807
#define PF0INT_OICR_HLP_HLP_RDY_M BIT(14)
sys/dev/ice/ice_hw_autogen.h
4809
#define PF0INT_OICR_HLP_CPM_RDY_M BIT(15)
sys/dev/ice/ice_hw_autogen.h
4811
#define PF0INT_OICR_HLP_ECC_ERR_M BIT(16)
sys/dev/ice/ice_hw_autogen.h
4815
#define PF0INT_OICR_HLP_MAL_DETECT_M BIT(19)
sys/dev/ice/ice_hw_autogen.h
4817
#define PF0INT_OICR_HLP_GRST_M BIT(20)
sys/dev/ice/ice_hw_autogen.h
4819
#define PF0INT_OICR_HLP_PCI_EXCEPTION_M BIT(21)
sys/dev/ice/ice_hw_autogen.h
482
#define PF0INT_OICR_CPM_PAGE_INTEVENT_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
4821
#define PF0INT_OICR_HLP_GPIO_M BIT(22)
sys/dev/ice/ice_hw_autogen.h
4823
#define PF0INT_OICR_HLP_RSV3_M BIT(23)
sys/dev/ice/ice_hw_autogen.h
4825
#define PF0INT_OICR_HLP_STORM_DETECT_M BIT(24)
sys/dev/ice/ice_hw_autogen.h
4827
#define PF0INT_OICR_HLP_LINK_STAT_CHANGE_M BIT(25)
sys/dev/ice/ice_hw_autogen.h
4829
#define PF0INT_OICR_HLP_HMC_ERR_M BIT(26)
sys/dev/ice/ice_hw_autogen.h
4831
#define PF0INT_OICR_HLP_PE_PUSH_M BIT(27)
sys/dev/ice/ice_hw_autogen.h
4833
#define PF0INT_OICR_HLP_PE_CRITERR_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
4835
#define PF0INT_OICR_HLP_VFLR_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
4837
#define PF0INT_OICR_HLP_XLR_HW_DONE_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
4839
#define PF0INT_OICR_HLP_SWINT_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
484
#define PF0INT_OICR_CPM_PAGE_QUEUE_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
4842
#define PF0INT_OICR_PSM_INTEVENT_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
4844
#define PF0INT_OICR_PSM_QUEUE_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
4850
#define E800_PF0INT_OICR_PSM_HH_COMP_M BIT(10)
sys/dev/ice/ice_hw_autogen.h
4852
#define PF0INT_OICR_PSM_TSYN_TX_M BIT(11)
sys/dev/ice/ice_hw_autogen.h
4854
#define PF0INT_OICR_PSM_TSYN_EVNT_M BIT(12)
sys/dev/ice/ice_hw_autogen.h
4856
#define PF0INT_OICR_PSM_TSYN_TGT_M BIT(13)
sys/dev/ice/ice_hw_autogen.h
4858
#define PF0INT_OICR_PSM_HLP_RDY_M BIT(14)
sys/dev/ice/ice_hw_autogen.h
4860
#define PF0INT_OICR_PSM_CPM_RDY_M BIT(15)
sys/dev/ice/ice_hw_autogen.h
4862
#define PF0INT_OICR_PSM_ECC_ERR_M BIT(16)
sys/dev/ice/ice_hw_autogen.h
4866
#define PF0INT_OICR_PSM_MAL_DETECT_M BIT(19)
sys/dev/ice/ice_hw_autogen.h
4868
#define PF0INT_OICR_PSM_GRST_M BIT(20)
sys/dev/ice/ice_hw_autogen.h
4870
#define PF0INT_OICR_PSM_PCI_EXCEPTION_M BIT(21)
sys/dev/ice/ice_hw_autogen.h
4872
#define PF0INT_OICR_PSM_GPIO_M BIT(22)
sys/dev/ice/ice_hw_autogen.h
4874
#define PF0INT_OICR_PSM_RSV3_M BIT(23)
sys/dev/ice/ice_hw_autogen.h
4876
#define PF0INT_OICR_PSM_STORM_DETECT_M BIT(24)
sys/dev/ice/ice_hw_autogen.h
4878
#define PF0INT_OICR_PSM_LINK_STAT_CHANGE_M BIT(25)
sys/dev/ice/ice_hw_autogen.h
4880
#define PF0INT_OICR_PSM_HMC_ERR_M BIT(26)
sys/dev/ice/ice_hw_autogen.h
4882
#define PF0INT_OICR_PSM_PE_PUSH_M BIT(27)
sys/dev/ice/ice_hw_autogen.h
4884
#define PF0INT_OICR_PSM_PE_CRITERR_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
4886
#define PF0INT_OICR_PSM_VFLR_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
4888
#define PF0INT_OICR_PSM_XLR_HW_DONE_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
4890
#define PF0INT_OICR_PSM_SWINT_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
4897
#define PF0INT_SB_CPM_CTL_CAUSE_ENA_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
4899
#define PF0INT_SB_CPM_CTL_INTEVENT_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
490
#define E800_PF0INT_OICR_CPM_PAGE_HH_COMP_M BIT(10)
sys/dev/ice/ice_hw_autogen.h
4906
#define PF0INT_SB_HLP_CTL_CAUSE_ENA_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
4908
#define PF0INT_SB_HLP_CTL_INTEVENT_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
4915
#define PFINT_AEQCTL_CAUSE_ENA_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
4917
#define PFINT_AEQCTL_INTEVENT_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
492
#define PF0INT_OICR_CPM_PAGE_TSYN_TX_M BIT(11)
sys/dev/ice/ice_hw_autogen.h
4924
#define PFINT_ALLOC_VALID_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
4931
#define PFINT_ALLOC_PCI_VALID_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
4938
#define PFINT_FW_CTL_CAUSE_ENA_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
494
#define PF0INT_OICR_CPM_PAGE_TSYN_EVNT_M BIT(12)
sys/dev/ice/ice_hw_autogen.h
4940
#define PFINT_FW_CTL_INTEVENT_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
4943
#define PFINT_GPIO_ENA_GPIO0_ENA_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
4945
#define PFINT_GPIO_ENA_GPIO1_ENA_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
4947
#define PFINT_GPIO_ENA_GPIO2_ENA_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
4949
#define PFINT_GPIO_ENA_GPIO3_ENA_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
4951
#define PFINT_GPIO_ENA_GPIO4_ENA_M BIT(4)
sys/dev/ice/ice_hw_autogen.h
4953
#define PFINT_GPIO_ENA_GPIO5_ENA_M BIT(5)
sys/dev/ice/ice_hw_autogen.h
4955
#define PFINT_GPIO_ENA_GPIO6_ENA_M BIT(6)
sys/dev/ice/ice_hw_autogen.h
496
#define PF0INT_OICR_CPM_PAGE_TSYN_TGT_M BIT(13)
sys/dev/ice/ice_hw_autogen.h
4962
#define PFINT_MBX_CTL_CAUSE_ENA_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
4964
#define PFINT_MBX_CTL_INTEVENT_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
4967
#define PFINT_OICR_INTEVENT_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
4969
#define PFINT_OICR_QUEUE_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
4975
#define E800_PFINT_OICR_HH_COMP_M BIT(10)
sys/dev/ice/ice_hw_autogen.h
4977
#define PFINT_OICR_TSYN_TX_M BIT(11)
sys/dev/ice/ice_hw_autogen.h
4979
#define PFINT_OICR_TSYN_EVNT_M BIT(12)
sys/dev/ice/ice_hw_autogen.h
498
#define PF0INT_OICR_CPM_PAGE_HLP_RDY_M BIT(14)
sys/dev/ice/ice_hw_autogen.h
4981
#define PFINT_OICR_TSYN_TGT_M BIT(13)
sys/dev/ice/ice_hw_autogen.h
4983
#define PFINT_OICR_HLP_RDY_M BIT(14)
sys/dev/ice/ice_hw_autogen.h
4985
#define PFINT_OICR_CPM_RDY_M BIT(15)
sys/dev/ice/ice_hw_autogen.h
4987
#define PFINT_OICR_ECC_ERR_M BIT(16)
sys/dev/ice/ice_hw_autogen.h
4991
#define PFINT_OICR_MAL_DETECT_M BIT(19)
sys/dev/ice/ice_hw_autogen.h
4993
#define PFINT_OICR_GRST_M BIT(20)
sys/dev/ice/ice_hw_autogen.h
4995
#define PFINT_OICR_PCI_EXCEPTION_M BIT(21)
sys/dev/ice/ice_hw_autogen.h
4997
#define PFINT_OICR_GPIO_M BIT(22)
sys/dev/ice/ice_hw_autogen.h
4999
#define PFINT_OICR_RSV3_M BIT(23)
sys/dev/ice/ice_hw_autogen.h
500
#define PF0INT_OICR_CPM_PAGE_CPM_RDY_M BIT(15)
sys/dev/ice/ice_hw_autogen.h
5001
#define PFINT_OICR_STORM_DETECT_M BIT(24)
sys/dev/ice/ice_hw_autogen.h
5003
#define PFINT_OICR_LINK_STAT_CHANGE_M BIT(25)
sys/dev/ice/ice_hw_autogen.h
5005
#define PFINT_OICR_HMC_ERR_M BIT(26)
sys/dev/ice/ice_hw_autogen.h
5007
#define PFINT_OICR_PE_PUSH_M BIT(27)
sys/dev/ice/ice_hw_autogen.h
5009
#define PFINT_OICR_PE_CRITERR_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
5011
#define PFINT_OICR_VFLR_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
5013
#define PFINT_OICR_XLR_HW_DONE_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
5015
#define PFINT_OICR_SWINT_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
502
#define PF0INT_OICR_CPM_PAGE_ECC_ERR_M BIT(16)
sys/dev/ice/ice_hw_autogen.h
5022
#define PFINT_OICR_CTL_CAUSE_ENA_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
5024
#define PFINT_OICR_CTL_INTEVENT_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
5027
#define PFINT_OICR_ENA_RSV0_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
5036
#define PFINT_SB_CTL_CAUSE_ENA_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
5038
#define PFINT_SB_CTL_INTEVENT_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
5051
#define QINT_RQCTL_CAUSE_ENA_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
5053
#define QINT_RQCTL_INTEVENT_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
506
#define PF0INT_OICR_CPM_PAGE_MAL_DETECT_M BIT(19)
sys/dev/ice/ice_hw_autogen.h
5061
#define QINT_TQCTL_CAUSE_ENA_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
5063
#define QINT_TQCTL_INTEVENT_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
5071
#define VPINT_AEQCTL_CAUSE_ENA_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
5073
#define VPINT_AEQCTL_INTEVENT_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
508
#define PF0INT_OICR_CPM_PAGE_GRST_M BIT(20)
sys/dev/ice/ice_hw_autogen.h
5081
#define VPINT_ALLOC_VALID_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
5089
#define VPINT_ALLOC_PCI_VALID_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
5097
#define VPINT_MBX_CPM_CTL_CAUSE_ENA_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
5099
#define VPINT_MBX_CPM_CTL_INTEVENT_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
510
#define PF0INT_OICR_CPM_PAGE_PCI_EXCEPTION_M BIT(21)
sys/dev/ice/ice_hw_autogen.h
5107
#define VPINT_MBX_CTL_CAUSE_ENA_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
5109
#define VPINT_MBX_CTL_INTEVENT_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
5117
#define VPINT_MBX_HLP_CTL_CAUSE_ENA_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
5119
#define VPINT_MBX_HLP_CTL_INTEVENT_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
512
#define PF0INT_OICR_CPM_PAGE_GPIO_M BIT(22)
sys/dev/ice/ice_hw_autogen.h
5127
#define VPINT_MBX_PSM_CTL_CAUSE_ENA_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
5129
#define VPINT_MBX_PSM_CTL_INTEVENT_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
5137
#define VPINT_SB_CPM_CTL_CAUSE_ENA_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
5139
#define VPINT_SB_CPM_CTL_INTEVENT_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
514
#define PF0INT_OICR_CPM_PAGE_RSV3_M BIT(23)
sys/dev/ice/ice_hw_autogen.h
5147
#define GL_TDPU_PSM_DEFAULT_RECIPE_ADD_IPG_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
5149
#define GL_TDPU_PSM_DEFAULT_RECIPE_SUB_CRC_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
5151
#define GL_TDPU_PSM_DEFAULT_RECIPE_SUB_ESP_TRAILER_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
5153
#define GL_TDPU_PSM_DEFAULT_RECIPE_INCLUDE_L2_PAD_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
5155
#define GL_TDPU_PSM_DEFAULT_RECIPE_DEFAULT_UPDATE_MODE_M BIT(4)
sys/dev/ice/ice_hw_autogen.h
516
#define PF0INT_OICR_CPM_PAGE_STORM_DETECT_M BIT(24)
sys/dev/ice/ice_hw_autogen.h
5162
#define GLLAN_RCTL_0_PXE_MODE_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
5167
#define GLLAN_RCTL_1_RXDRDCTL_M BIT(17)
sys/dev/ice/ice_hw_autogen.h
5169
#define GLLAN_RCTL_1_RXDESCRDROEN_M BIT(18)
sys/dev/ice/ice_hw_autogen.h
5171
#define GLLAN_RCTL_1_RXDATAWRROEN_M BIT(19)
sys/dev/ice/ice_hw_autogen.h
518
#define PF0INT_OICR_CPM_PAGE_LINK_STAT_CHANGE_M BIT(25)
sys/dev/ice/ice_hw_autogen.h
5187
#define PFLAN_CP_QALLOC_VALID_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
5194
#define PFLAN_DB_QALLOC_VALID_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
520
#define PF0INT_OICR_CPM_PAGE_HMC_ERR_M BIT(26)
sys/dev/ice/ice_hw_autogen.h
5201
#define PFLAN_RX_QALLOC_VALID_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
5208
#define PFLAN_TX_QALLOC_VALID_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
522
#define PF0INT_OICR_CPM_PAGE_PE_PUSH_M BIT(27)
sys/dev/ice/ice_hw_autogen.h
5221
#define QRX_CTRL_QENA_REQ_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
5223
#define QRX_CTRL_FAST_QDIS_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
5225
#define QRX_CTRL_QENA_STAT_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
5227
#define QRX_CTRL_CDE_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
5229
#define QRX_CTRL_CDS_M BIT(4)
sys/dev/ice/ice_hw_autogen.h
5233
#define QRX_ITR_NO_EXPR_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
524
#define PF0INT_OICR_CPM_PAGE_PE_CRITERR_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
526
#define PF0INT_OICR_CPM_PAGE_VFLR_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
5265
#define VPLAN_DSI_VF_MODE_LAN_DSI_VF_MODE_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
5273
#define VPLAN_RX_QBASE_VFQTABLE_ENA_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
528
#define PF0INT_OICR_CPM_PAGE_XLR_HW_DONE_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
5281
#define VPLAN_RXQ_MAPENA_RX_ENA_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
5289
#define VPLAN_TX_QBASE_VFQTABLE_ENA_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
5297
#define VPLAN_TXQ_MAPENA_TX_ENA_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
530
#define PF0INT_OICR_CPM_PAGE_SWINT_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
5303
#define VSILAN_QBASE_VSIQTABLE_ENA_M BIT(11)
sys/dev/ice/ice_hw_autogen.h
5312
#define E800_PRTMAC_HSEC_CTL_RX_ENABLE_GCP_HSEC_CTL_RX_ENABLE_GCP_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
5315
#define E800_PRTMAC_HSEC_CTL_RX_ENABLE_GPP_HSEC_CTL_RX_ENABLE_GPP_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
5318
#define E800_PRTMAC_HSEC_CTL_RX_ENABLE_PPP_HSEC_CTL_RX_ENABLE_PPP_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
5321
#define E800_PRTMAC_HSEC_CTL_RX_FORWARD_CONTROL_HSEC_CTL_RX_FORWARD_CONTROL_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
533
#define PF0INT_OICR_ENA_CPM_PAGE_RSV0_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
538
#define PF0INT_OICR_ENA_HLP_PAGE_RSV0_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
5411
#define GL_MDCK_EN_TX_PQM_PCI_DUMMY_COMP_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
5413
#define GL_MDCK_EN_TX_PQM_PCI_UR_COMP_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
5415
#define GL_MDCK_EN_TX_PQM_RCV_SH_BE_LSO_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
5417
#define GL_MDCK_EN_TX_PQM_Q_FL_MNG_EPY_CH_M BIT(4)
sys/dev/ice/ice_hw_autogen.h
5419
#define GL_MDCK_EN_TX_PQM_Q_EPY_MNG_FL_CH_M BIT(5)
sys/dev/ice/ice_hw_autogen.h
5421
#define GL_MDCK_EN_TX_PQM_LSO_NUMDESCS_ZERO_M BIT(6)
sys/dev/ice/ice_hw_autogen.h
5423
#define GL_MDCK_EN_TX_PQM_LSO_LENGTH_ZERO_M BIT(7)
sys/dev/ice/ice_hw_autogen.h
5425
#define GL_MDCK_EN_TX_PQM_LSO_MSS_BELOW_MIN_M BIT(8)
sys/dev/ice/ice_hw_autogen.h
5427
#define GL_MDCK_EN_TX_PQM_LSO_MSS_ABOVE_MAX_M BIT(9)
sys/dev/ice/ice_hw_autogen.h
5429
#define GL_MDCK_EN_TX_PQM_LSO_HDR_SIZE_ZERO_M BIT(10)
sys/dev/ice/ice_hw_autogen.h
543
#define PF0INT_OICR_ENA_PSM_PAGE_RSV0_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
5431
#define GL_MDCK_EN_TX_PQM_RCV_CNT_BE_LSO_M BIT(11)
sys/dev/ice/ice_hw_autogen.h
5433
#define GL_MDCK_EN_TX_PQM_SKIP_ONE_QT_ONLY_M BIT(12)
sys/dev/ice/ice_hw_autogen.h
5435
#define GL_MDCK_EN_TX_PQM_LSO_PKTCNT_ZERO_M BIT(13)
sys/dev/ice/ice_hw_autogen.h
5437
#define GL_MDCK_EN_TX_PQM_SSO_LENGTH_ZERO_M BIT(14)
sys/dev/ice/ice_hw_autogen.h
5439
#define GL_MDCK_EN_TX_PQM_SSO_LENGTH_EXCEED_M BIT(15)
sys/dev/ice/ice_hw_autogen.h
5441
#define GL_MDCK_EN_TX_PQM_SSO_PKTCNT_ZERO_M BIT(16)
sys/dev/ice/ice_hw_autogen.h
5443
#define GL_MDCK_EN_TX_PQM_SSO_PKTCNT_EXCEED_M BIT(17)
sys/dev/ice/ice_hw_autogen.h
5445
#define GL_MDCK_EN_TX_PQM_SSO_NUMDESCS_ZERO_M BIT(18)
sys/dev/ice/ice_hw_autogen.h
5447
#define GL_MDCK_EN_TX_PQM_SSO_NUMDESCS_EXCEED_M BIT(19)
sys/dev/ice/ice_hw_autogen.h
5449
#define GL_MDCK_EN_TX_PQM_TAIL_GT_RING_LENGTH_M BIT(20)
sys/dev/ice/ice_hw_autogen.h
5451
#define GL_MDCK_EN_TX_PQM_RESERVED_DBL_TYPE_M BIT(21)
sys/dev/ice/ice_hw_autogen.h
5453
#define GL_MDCK_EN_TX_PQM_ILLEGAL_HEAD_DROP_DBL_M BIT(22)
sys/dev/ice/ice_hw_autogen.h
5455
#define GL_MDCK_EN_TX_PQM_LSO_OVER_COMMS_Q_M BIT(23)
sys/dev/ice/ice_hw_autogen.h
5457
#define GL_MDCK_EN_TX_PQM_ILLEGAL_VF_QNUM_M BIT(24)
sys/dev/ice/ice_hw_autogen.h
5459
#define GL_MDCK_EN_TX_PQM_QTAIL_GT_RING_LENGTH_M BIT(25)
sys/dev/ice/ice_hw_autogen.h
5464
#define GL_MDCK_RX_DESC_ADDR_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
5467
#define GL_MDCK_TX_TDPU_TTL_ERR_ITR_DIS_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
5469
#define GL_MDCK_TX_TDPU_RCU_ANTISPOOF_ITR_DIS_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
5471
#define GL_MDCK_TX_TDPU_PCIE_UR_ITR_DIS_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
5473
#define GL_MDCK_TX_TDPU_MAL_OFFSET_ITR_DIS_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
5475
#define GL_MDCK_TX_TDPU_MAL_CMD_ITR_DIS_M BIT(4)
sys/dev/ice/ice_hw_autogen.h
5477
#define GL_MDCK_TX_TDPU_BIG_PKT_SIZE_ITR_DIS_M BIT(5)
sys/dev/ice/ice_hw_autogen.h
5479
#define GL_MDCK_TX_TDPU_L2_ACCEPT_FAIL_ITR_DIS_M BIT(6)
sys/dev/ice/ice_hw_autogen.h
548
#define PF0INT_OICR_HLP_PAGE_INTEVENT_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
5481
#define GL_MDCK_TX_TDPU_NIC_DSI_ITR_DIS_M BIT(7)
sys/dev/ice/ice_hw_autogen.h
5483
#define GL_MDCK_TX_TDPU_MAL_IPSEC_CMD_ITR_DIS_M BIT(8)
sys/dev/ice/ice_hw_autogen.h
5485
#define GL_MDCK_TX_TDPU_DSCP_CHECK_FAIL_ITR_DIS_M BIT(9)
sys/dev/ice/ice_hw_autogen.h
5487
#define GL_MDCK_TX_TDPU_NIC_IPSEC_ITR_DIS_M BIT(10)
sys/dev/ice/ice_hw_autogen.h
5498
#define GL_MDET_RX_VALID_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
550
#define PF0INT_OICR_HLP_PAGE_QUEUE_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
5509
#define GL_MDET_TX_PQM_VALID_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
5520
#define GL_MDET_TX_TCLAN_VALID_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
5531
#define GL_MDET_TX_TDPU_VALID_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
5534
#define GLRLAN_MDET_PCKT_EXTRCT_ERR_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
5537
#define PF_MDET_RX_VALID_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
5540
#define PF_MDET_TX_PQM_VALID_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
5543
#define PF_MDET_TX_TCLAN_VALID_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
5546
#define PF_MDET_TX_TDPU_VALID_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
5550
#define VP_MDET_RX_VALID_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
5554
#define VP_MDET_TX_PQM_VALID_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
5558
#define VP_MDET_TX_TCLAN_VALID_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
556
#define E800_PF0INT_OICR_HLP_PAGE_HH_COMP_M BIT(10)
sys/dev/ice/ice_hw_autogen.h
5562
#define VP_MDET_TX_TDPU_VALID_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
5574
#define GL_MNG_FW_RAM_STAT_FW_RAM_RST_STAT_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
5576
#define GL_MNG_FW_RAM_STAT_MNG_MEM_ECC_ERR_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
558
#define PF0INT_OICR_HLP_PAGE_TSYN_TX_M BIT(11)
sys/dev/ice/ice_hw_autogen.h
5589
#define GL_MNG_FWSM_EEP_RELOAD_IND_M BIT(10)
sys/dev/ice/ice_hw_autogen.h
5593
#define GL_MNG_FWSM_RSV2_M BIT(15)
sys/dev/ice/ice_hw_autogen.h
5595
#define GL_MNG_FWSM_PCIR_AL_FAILURE_M BIT(16)
sys/dev/ice/ice_hw_autogen.h
5597
#define GL_MNG_FWSM_POR_AL_FAILURE_M BIT(17)
sys/dev/ice/ice_hw_autogen.h
5599
#define GL_MNG_FWSM_RSV3_M BIT(18)
sys/dev/ice/ice_hw_autogen.h
56
#define E830_GLTCLAN_TSYN_REG_RANGE_ENFORCE_ENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
560
#define PF0INT_OICR_HLP_PAGE_TSYN_EVNT_M BIT(12)
sys/dev/ice/ice_hw_autogen.h
5603
#define GL_MNG_FWSM_RSV4_M BIT(25)
sys/dev/ice/ice_hw_autogen.h
5610
#define GL_MNG_HWARB_CTRL_NCSI_ARB_EN_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
562
#define PF0INT_OICR_HLP_PAGE_TSYN_TGT_M BIT(13)
sys/dev/ice/ice_hw_autogen.h
5631
#define GL_MNG_SHA_EXTEND_STATUS_FW_HALTED_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
5633
#define GL_MNG_SHA_EXTEND_STATUS_DONE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
5639
#define GL_SWT_PRT2MDEF_MDEFENA_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
564
#define PF0INT_OICR_HLP_PAGE_HLP_RDY_M BIT(14)
sys/dev/ice/ice_hw_autogen.h
5642
#define PRT_MNG_MANC_FLOW_CONTROL_DISCARD_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
5644
#define PRT_MNG_MANC_NCSI_DISCARD_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
5646
#define PRT_MNG_MANC_RCV_TCO_EN_M BIT(17)
sys/dev/ice/ice_hw_autogen.h
5648
#define PRT_MNG_MANC_RCV_ALL_M BIT(19)
sys/dev/ice/ice_hw_autogen.h
5650
#define PRT_MNG_MANC_FIXED_NET_TYPE_M BIT(25)
sys/dev/ice/ice_hw_autogen.h
5652
#define PRT_MNG_MANC_NET_TYPE_M BIT(26)
sys/dev/ice/ice_hw_autogen.h
5654
#define PRT_MNG_MANC_EN_BMC2OS_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
5656
#define PRT_MNG_MANC_EN_BMC2NET_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
566
#define PF0INT_OICR_HLP_PAGE_CPM_RDY_M BIT(15)
sys/dev/ice/ice_hw_autogen.h
5666
#define PRT_MNG_MDEF_BROADCAST_AND_M BIT(4)
sys/dev/ice/ice_hw_autogen.h
5676
#define PRT_MNG_MDEF_BROADCAST_OR_M BIT(25)
sys/dev/ice/ice_hw_autogen.h
5678
#define PRT_MNG_MDEF_MULTICAST_AND_M BIT(26)
sys/dev/ice/ice_hw_autogen.h
568
#define PF0INT_OICR_HLP_PAGE_ECC_ERR_M BIT(16)
sys/dev/ice/ice_hw_autogen.h
5680
#define PRT_MNG_MDEF_ARP_REQUEST_OR_M BIT(27)
sys/dev/ice/ice_hw_autogen.h
5682
#define PRT_MNG_MDEF_ARP_RESPONSE_OR_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
5684
#define PRT_MNG_MDEF_NEIGHBOR_DISCOVERY_134_OR_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
5686
#define PRT_MNG_MDEF_PORT_0X298_OR_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
5688
#define PRT_MNG_MDEF_PORT_0X26F_OR_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
5698
#define PRT_MNG_MDEF_EXT_FLEX_TCO_M BIT(24)
sys/dev/ice/ice_hw_autogen.h
5700
#define PRT_MNG_MDEF_EXT_NEIGHBOR_DISCOVERY_135_OR_M BIT(25)
sys/dev/ice/ice_hw_autogen.h
5702
#define PRT_MNG_MDEF_EXT_NEIGHBOR_DISCOVERY_136_OR_M BIT(26)
sys/dev/ice/ice_hw_autogen.h
5704
#define PRT_MNG_MDEF_EXT_NEIGHBOR_DISCOVERY_137_OR_M BIT(27)
sys/dev/ice/ice_hw_autogen.h
5706
#define PRT_MNG_MDEF_EXT_ICMP_OR_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
5708
#define PRT_MNG_MDEF_EXT_MLD_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
5710
#define PRT_MNG_MDEF_EXT_APPLY_TO_NETWORK_TRAFFIC_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
5712
#define PRT_MNG_MDEF_EXT_APPLY_TO_HOST_TRAFFIC_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
572
#define PF0INT_OICR_HLP_PAGE_MAL_DETECT_M BIT(19)
sys/dev/ice/ice_hw_autogen.h
5724
#define PRT_MNG_METF_POLARITY_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
5730
#define PRT_MNG_MFUTP_UDP_M BIT(16)
sys/dev/ice/ice_hw_autogen.h
5732
#define PRT_MNG_MFUTP_TCP_M BIT(17)
sys/dev/ice/ice_hw_autogen.h
5734
#define PRT_MNG_MFUTP_SOURCE_DESTINATION_M BIT(18)
sys/dev/ice/ice_hw_autogen.h
574
#define PF0INT_OICR_HLP_PAGE_GRST_M BIT(20)
sys/dev/ice/ice_hw_autogen.h
5756
#define PRT_MNG_MSFM_PORT_26F_UDP_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
5758
#define PRT_MNG_MSFM_PORT_26F_TCP_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
576
#define PF0INT_OICR_HLP_PAGE_PCI_EXCEPTION_M BIT(21)
sys/dev/ice/ice_hw_autogen.h
5760
#define PRT_MNG_MSFM_PORT_298_UDP_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
5762
#define PRT_MNG_MSFM_PORT_298_TCP_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
5764
#define PRT_MNG_MSFM_IPV6_0_MASK_M BIT(4)
sys/dev/ice/ice_hw_autogen.h
5766
#define PRT_MNG_MSFM_IPV6_1_MASK_M BIT(5)
sys/dev/ice/ice_hw_autogen.h
5768
#define PRT_MNG_MSFM_IPV6_2_MASK_M BIT(6)
sys/dev/ice/ice_hw_autogen.h
5770
#define PRT_MNG_MSFM_IPV6_3_MASK_M BIT(7)
sys/dev/ice/ice_hw_autogen.h
578
#define PF0INT_OICR_HLP_PAGE_GPIO_M BIT(22)
sys/dev/ice/ice_hw_autogen.h
580
#define PF0INT_OICR_HLP_PAGE_RSV3_M BIT(23)
sys/dev/ice/ice_hw_autogen.h
5810
#define MSIX_TVCTRL_PAGE_MASK_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
5814
#define MSIX_TVCTRL1_MASK_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
5817
#define GLNVM_AL_DONE_HLP_HLP_CORER_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
5819
#define GLNVM_AL_DONE_HLP_HLP_FULLR_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
582
#define PF0INT_OICR_HLP_PAGE_STORM_DETECT_M BIT(24)
sys/dev/ice/ice_hw_autogen.h
5827
#define GLNVM_FLA_LOCKED_M BIT(6)
sys/dev/ice/ice_hw_autogen.h
5830
#define GLNVM_GENS_NVM_PRES_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
5834
#define GLNVM_GENS_BANK1VAL_M BIT(8)
sys/dev/ice/ice_hw_autogen.h
5836
#define GLNVM_GENS_ALT_PRST_M BIT(23)
sys/dev/ice/ice_hw_autogen.h
5838
#define GLNVM_GENS_FL_AUTO_RD_M BIT(25)
sys/dev/ice/ice_hw_autogen.h
584
#define PF0INT_OICR_HLP_PAGE_LINK_STAT_CHANGE_M BIT(25)
sys/dev/ice/ice_hw_autogen.h
5845
#define GLNVM_ULD_PCIER_DONE_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
5847
#define GLNVM_ULD_PCIER_DONE_1_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
5849
#define GLNVM_ULD_CORER_DONE_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
5851
#define GLNVM_ULD_GLOBR_DONE_M BIT(4)
sys/dev/ice/ice_hw_autogen.h
5853
#define GLNVM_ULD_POR_DONE_M BIT(5)
sys/dev/ice/ice_hw_autogen.h
5855
#define GLNVM_ULD_POR_DONE_1_M BIT(8)
sys/dev/ice/ice_hw_autogen.h
5857
#define GLNVM_ULD_PCIER_DONE_2_M BIT(9)
sys/dev/ice/ice_hw_autogen.h
5859
#define GLNVM_ULD_PE_DONE_M BIT(10)
sys/dev/ice/ice_hw_autogen.h
586
#define PF0INT_OICR_HLP_PAGE_HMC_ERR_M BIT(26)
sys/dev/ice/ice_hw_autogen.h
5861
#define GLNVM_ULD_HLP_CORE_DONE_M BIT(11)
sys/dev/ice/ice_hw_autogen.h
5863
#define GLNVM_ULD_HLP_FULL_DONE_M BIT(12)
sys/dev/ice/ice_hw_autogen.h
5866
#define GLNVM_ULT_CONF_PCIR_AE_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
5868
#define GLNVM_ULT_CONF_PCIRTL_AE_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
5870
#define GLNVM_ULT_RESERVED_1_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
5872
#define GLNVM_ULT_CONF_CORE_AE_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
5874
#define GLNVM_ULT_CONF_GLOBAL_AE_M BIT(4)
sys/dev/ice/ice_hw_autogen.h
5876
#define GLNVM_ULT_CONF_POR_AE_M BIT(5)
sys/dev/ice/ice_hw_autogen.h
5878
#define GLNVM_ULT_RESERVED_2_M BIT(6)
sys/dev/ice/ice_hw_autogen.h
588
#define PF0INT_OICR_HLP_PAGE_PE_PUSH_M BIT(27)
sys/dev/ice/ice_hw_autogen.h
5880
#define GLNVM_ULT_RESERVED_3_M BIT(7)
sys/dev/ice/ice_hw_autogen.h
5882
#define GLNVM_ULT_RESERVED_5_M BIT(8)
sys/dev/ice/ice_hw_autogen.h
5884
#define GLNVM_ULT_CONF_PCIALT_AE_M BIT(9)
sys/dev/ice/ice_hw_autogen.h
5886
#define GLNVM_ULT_CONF_PE_AE_M BIT(10)
sys/dev/ice/ice_hw_autogen.h
5895
#define GL_COTF_MARKER_TRIG_RCU_PRS_SET_RST_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
5898
#define GL_PRS_MARKER_ERROR_XLR_CFG_ERR_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
590
#define PF0INT_OICR_HLP_PAGE_PE_CRITERR_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
5900
#define GL_PRS_MARKER_ERROR_QH_CFG_ERR_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
5902
#define GL_PRS_MARKER_ERROR_COTF_CFG_ERR_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
5917
#define GL_PRS_RX_SIZE_CTRL_MIN_SIZE_EN_M BIT(15)
sys/dev/ice/ice_hw_autogen.h
592
#define PF0INT_OICR_HLP_PAGE_VFLR_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
5921
#define GL_PRS_RX_SIZE_CTRL_MAX_SIZE_EN_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
5936
#define GL_PRS_TX_SIZE_CTRL_MIN_SIZE_EN_M BIT(15)
sys/dev/ice/ice_hw_autogen.h
594
#define PF0INT_OICR_HLP_PAGE_XLR_HW_DONE_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
5940
#define GL_PRS_TX_SIZE_CTRL_MAX_SIZE_EN_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
5953
#define GL_QH_MARKER_TRIG_RCU_PRS_SET_RST_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
5956
#define GL_RPRS_ANA_CSR_CTRL_SELECT_EN_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
5958
#define GL_RPRS_ANA_CSR_CTRL_SELECTED_ANA_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
596
#define PF0INT_OICR_HLP_PAGE_SWINT_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
5961
#define GL_TPRS_ANA_CSR_CTRL_SELECT_EN_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
5963
#define GL_TPRS_ANA_CSR_CTRL_SELECTED_ANA_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
599
#define PF0INT_OICR_PSM_PAGE_INTEVENT_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
601
#define PF0INT_OICR_PSM_PAGE_QUEUE_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
6019
#define GLPCI_CAPCTRL_VPD_EN_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
6022
#define GLPCI_CAPSUP_PCIE_VER_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
6024
#define E800_GLPCI_CAPSUP_RESERVED_2_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
6026
#define GLPCI_CAPSUP_LTR_EN_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
6028
#define GLPCI_CAPSUP_TPH_EN_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
6030
#define GLPCI_CAPSUP_ARI_EN_M BIT(4)
sys/dev/ice/ice_hw_autogen.h
6032
#define GLPCI_CAPSUP_IOV_EN_M BIT(5)
sys/dev/ice/ice_hw_autogen.h
6034
#define GLPCI_CAPSUP_ACS_EN_M BIT(6)
sys/dev/ice/ice_hw_autogen.h
6036
#define GLPCI_CAPSUP_SEC_EN_M BIT(7)
sys/dev/ice/ice_hw_autogen.h
6038
#define GLPCI_CAPSUP_PASID_EN_M BIT(8)
sys/dev/ice/ice_hw_autogen.h
6040
#define GLPCI_CAPSUP_DLFE_EN_M BIT(9)
sys/dev/ice/ice_hw_autogen.h
6042
#define GLPCI_CAPSUP_GEN4_EXT_EN_M BIT(10)
sys/dev/ice/ice_hw_autogen.h
6044
#define GLPCI_CAPSUP_GEN4_MARG_EN_M BIT(11)
sys/dev/ice/ice_hw_autogen.h
6046
#define GLPCI_CAPSUP_ECRC_GEN_EN_M BIT(16)
sys/dev/ice/ice_hw_autogen.h
6048
#define GLPCI_CAPSUP_ECRC_CHK_EN_M BIT(17)
sys/dev/ice/ice_hw_autogen.h
6050
#define GLPCI_CAPSUP_IDO_EN_M BIT(18)
sys/dev/ice/ice_hw_autogen.h
6052
#define GLPCI_CAPSUP_MSI_MASK_M BIT(19)
sys/dev/ice/ice_hw_autogen.h
6054
#define GLPCI_CAPSUP_CSR_CONF_EN_M BIT(20)
sys/dev/ice/ice_hw_autogen.h
6056
#define GLPCI_CAPSUP_WAKUP_EN_M BIT(21)
sys/dev/ice/ice_hw_autogen.h
6058
#define GLPCI_CAPSUP_LOAD_SUBSYS_ID_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
6060
#define GLPCI_CAPSUP_LOAD_DEV_ID_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
6063
#define GLPCI_CNF_FLEX10_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
6065
#define GLPCI_CNF_WAKE_PIN_EN_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
6067
#define GLPCI_CNF_MSIX_ECC_BLOCK_DISABLE_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
607
#define E800_PF0INT_OICR_PSM_PAGE_HH_COMP_M BIT(10)
sys/dev/ice/ice_hw_autogen.h
6070
#define GLPCI_CNF2_RO_DIS_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
6072
#define GLPCI_CNF2_CACHELINE_SIZE_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
6078
#define GLPCI_GSCL_1_NP_C_RT_MODE_M BIT(8)
sys/dev/ice/ice_hw_autogen.h
6082
#define GLPCI_GSCL_1_NP_C_PCI_COUNT_BW_EN_M BIT(14)
sys/dev/ice/ice_hw_autogen.h
6086
#define GLPCI_GSCL_1_NP_C_GIO_COUNT_RESET_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
6088
#define GLPCI_GSCL_1_NP_C_GIO_COUNT_STOP_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
609
#define PF0INT_OICR_PSM_PAGE_TSYN_TX_M BIT(11)
sys/dev/ice/ice_hw_autogen.h
6090
#define GLPCI_GSCL_1_NP_C_GIO_COUNT_START_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
6093
#define GLPCI_GSCL_1_P_GIO_COUNT_EN_0_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
6095
#define GLPCI_GSCL_1_P_GIO_COUNT_EN_1_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
6097
#define GLPCI_GSCL_1_P_GIO_COUNT_EN_2_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
6099
#define GLPCI_GSCL_1_P_GIO_COUNT_EN_3_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
6101
#define GLPCI_GSCL_1_P_LBC_ENABLE_0_M BIT(4)
sys/dev/ice/ice_hw_autogen.h
6103
#define GLPCI_GSCL_1_P_LBC_ENABLE_1_M BIT(5)
sys/dev/ice/ice_hw_autogen.h
6105
#define GLPCI_GSCL_1_P_LBC_ENABLE_2_M BIT(6)
sys/dev/ice/ice_hw_autogen.h
6107
#define GLPCI_GSCL_1_P_LBC_ENABLE_3_M BIT(7)
sys/dev/ice/ice_hw_autogen.h
6109
#define GLPCI_GSCL_1_P_PCI_COUNT_BW_EN_M BIT(14)
sys/dev/ice/ice_hw_autogen.h
611
#define PF0INT_OICR_PSM_PAGE_TSYN_EVNT_M BIT(12)
sys/dev/ice/ice_hw_autogen.h
6111
#define GLPCI_GSCL_1_P_GIO_64_BIT_EN_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
6113
#define GLPCI_GSCL_1_P_GIO_COUNT_RESET_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
6115
#define GLPCI_GSCL_1_P_GIO_COUNT_STOP_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
6117
#define GLPCI_GSCL_1_P_GIO_COUNT_START_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
613
#define PF0INT_OICR_PSM_PAGE_TSYN_TGT_M BIT(13)
sys/dev/ice/ice_hw_autogen.h
6142
#define GLPCI_LBARCTRL_PREFBAR_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
6144
#define GLPCI_LBARCTRL_BAR32_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
6146
#define GLPCI_LBARCTRL_PAGES_SPACE_EN_PF_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
6148
#define GLPCI_LBARCTRL_FLASH_EXPOSE_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
615
#define PF0INT_OICR_PSM_PAGE_HLP_RDY_M BIT(14)
sys/dev/ice/ice_hw_autogen.h
6152
#define GLPCI_LBARCTRL_PAGES_SPACE_EN_VF_M BIT(9)
sys/dev/ice/ice_hw_autogen.h
6164
#define GLPCI_NPQ_CFG_EXTEND_TO_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
6166
#define GLPCI_NPQ_CFG_SMALL_TO_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
617
#define PF0INT_OICR_PSM_PAGE_CPM_RDY_M BIT(15)
sys/dev/ice/ice_hw_autogen.h
619
#define PF0INT_OICR_PSM_PAGE_ECC_ERR_M BIT(16)
sys/dev/ice/ice_hw_autogen.h
6191
#define GLPCI_PMSUP_RESERVED_3_M BIT(14)
sys/dev/ice/ice_hw_autogen.h
6196
#define GLPCI_PUSH_PE_IF_TO_STATUS_GLPCI_PUSH_PE_IF_TO_STATUS_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
6226
#define GLPCI_VFSUP_VF_PREFETCH_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
6228
#define GLPCI_VFSUP_VR_BAR_TYPE_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
623
#define PF0INT_OICR_PSM_PAGE_MAL_DETECT_M BIT(19)
sys/dev/ice/ice_hw_autogen.h
6249
#define PFPCI_CLASS_STORAGE_CLASS_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
625
#define PF0INT_OICR_PSM_PAGE_GRST_M BIT(20)
sys/dev/ice/ice_hw_autogen.h
6251
#define PFPCI_CLASS_PF_IS_LAN_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
6254
#define PFPCI_CNF_MSI_EN_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
6256
#define PFPCI_CNF_EXROM_DIS_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
6258
#define PFPCI_CNF_IO_BAR_M BIT(4)
sys/dev/ice/ice_hw_autogen.h
627
#define PF0INT_OICR_PSM_PAGE_PCI_EXCEPTION_M BIT(21)
sys/dev/ice/ice_hw_autogen.h
6270
#define PFPCI_FACTPS_FUNC_AUX_EN_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
6273
#define PFPCI_FUNC_FUNC_DIS_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
6275
#define PFPCI_FUNC_ALLOW_FUNC_DIS_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
6277
#define PFPCI_FUNC_DIS_FUNC_ON_PORT_DIS_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
6280
#define PFPCI_PF_FLUSH_DONE_FLUSH_DONE_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
6283
#define PFPCI_PM_PME_EN_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
6286
#define PFPCI_STATUS1_FUNC_VALID_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
629
#define PF0INT_OICR_PSM_PAGE_GPIO_M BIT(22)
sys/dev/ice/ice_hw_autogen.h
6295
#define PFPCI_VF_FLUSH_DONE_FLUSH_DONE_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
6298
#define PFPCI_VM_FLUSH_DONE_FLUSH_DONE_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
6304
#define PFPCI_VMPEND_PENDING_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
6309
#define PQ_FIFO_STATUS_PQ_FIFO_EMPTY_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
631
#define PF0INT_OICR_PSM_PAGE_RSV3_M BIT(23)
sys/dev/ice/ice_hw_autogen.h
633
#define PF0INT_OICR_PSM_PAGE_STORM_DETECT_M BIT(24)
sys/dev/ice/ice_hw_autogen.h
6335
#define GLPE_PEPM_CTRL_PEPM_ENABLE_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
6337
#define GLPE_PEPM_CTRL_PEPM_HALT_M BIT(8)
sys/dev/ice/ice_hw_autogen.h
635
#define PF0INT_OICR_PSM_PAGE_LINK_STAT_CHANGE_M BIT(25)
sys/dev/ice/ice_hw_autogen.h
6350
#define GLPE_PEPM_DEALLOC_DEALLOC_RDY_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
637
#define PF0INT_OICR_PSM_PAGE_HMC_ERR_M BIT(26)
sys/dev/ice/ice_hw_autogen.h
639
#define PF0INT_OICR_PSM_PAGE_PE_PUSH_M BIT(27)
sys/dev/ice/ice_hw_autogen.h
641
#define PF0INT_OICR_PSM_PAGE_PE_CRITERR_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
643
#define PF0INT_OICR_PSM_PAGE_VFLR_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
6438
#define PFPE_CCQPSTATUS_CCQP_DONE_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
6444
#define PFPE_CCQPSTATUS_CCQP_ERR_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
645
#define PF0INT_OICR_PSM_PAGE_XLR_HW_DONE_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
6463
#define PFPE_CQPTAIL_CQP_OP_ERR_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
6468
#define PFPE_IPCONFIG0_USEENTIREIDRANGE_M BIT(16)
sys/dev/ice/ice_hw_autogen.h
647
#define PF0INT_OICR_PSM_PAGE_SWINT_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
6470
#define PFPE_IPCONFIG0_UDP_SRC_PORT_MASK_EN_M BIT(17)
sys/dev/ice/ice_hw_autogen.h
6506
#define VFPE_CCQPSTATUS_CCQP_DONE_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
6512
#define VFPE_CCQPSTATUS_CCQP_ERR_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
6536
#define VFPE_CQPTAIL_CQP_OP_ERR_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
6542
#define VFPE_IPCONFIG0_USEENTIREIDRANGE_M BIT(16)
sys/dev/ice/ice_hw_autogen.h
6544
#define VFPE_IPCONFIG0_UDP_SRC_PORT_MASK_EN_M BIT(17)
sys/dev/ice/ice_hw_autogen.h
66
#define GL_MNG_FWSM_FW_LOADING_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
679
#define VSI_MBX_ARQLEN_ARQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
681
#define VSI_MBX_ARQLEN_ARQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
683
#define VSI_MBX_ARQLEN_ARQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
685
#define VSI_MBX_ARQLEN_ARQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
69
#define GL_RDPU_CNTRL_RX_PAD_EN_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
6923
#define GL_PWR_MODE_CTL_SWITCH_PWR_MODE_EN_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
6925
#define GL_PWR_MODE_CTL_NIC_PWR_MODE_EN_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
6927
#define GL_PWR_MODE_CTL_S5_PWR_MODE_EN_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
707
#define VSI_MBX_ATQLEN_ATQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
709
#define VSI_MBX_ATQLEN_ATQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
71
#define GL_RDPU_CNTRL_UDP_ZERO_EN_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
711
#define VSI_MBX_ATQLEN_ATQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
713
#define VSI_MBX_ATQLEN_ATQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
7210
#define GL_S5_PWR_MODE_EXIT_CTL_S5_PWR_MODE_AUTO_EXIT_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
7212
#define GL_S5_PWR_MODE_EXIT_CTL_S5_PWR_MODE_FW_EXIT_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
7214
#define GL_S5_PWR_MODE_EXIT_CTL_S5_PWR_MODE_PRST_FLOWS_ON_CORER_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
7217
#define GLGEN_PME_TO_PME_TO_FOR_PE_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
7220
#define PRTPM_EEE_STAT_EEE_NEG_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
7222
#define PRTPM_EEE_STAT_RX_LPI_STATUS_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
7224
#define PRTPM_EEE_STAT_TX_LPI_STATUS_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
7234
#define PRTPM_EEEFWD_EEE_FW_CONFIG_DONE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
7239
#define PRTPM_EEER_TX_LPI_EN_M BIT(16)
sys/dev/ice/ice_hw_autogen.h
724
#define GL_ACL_ACCESS_CMD_OPERATION_M BIT(20)
sys/dev/ice/ice_hw_autogen.h
7269
#define GLRPB_DSI_EN_DSI_EN_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
7271
#define GLRPB_DSI_EN_DSI_L2_MAC_ERR_DROP_EN_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
728
#define GL_ACL_ACCESS_CMD_EXECUTE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
73
#define GL_RDPU_CNTRL_BLNC_EN_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
731
#define GL_ACL_ACCESS_STATUS_BUSY_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
733
#define GL_ACL_ACCESS_STATUS_DONE_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
7331
#define GLQF_FD_CTL_HASH_REPORT_M BIT(4)
sys/dev/ice/ice_hw_autogen.h
7333
#define GLQF_FD_CTL_FLT_ADDR_REPORT_M BIT(5)
sys/dev/ice/ice_hw_autogen.h
7349
#define GLQF_FDCNT_0_CNT_NOT_VLD_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
735
#define GL_ACL_ACCESS_STATUS_ERROR_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
7359
#define GLQF_FDINSET_FV_WORD_VAL0_M BIT(7)
sys/dev/ice/ice_hw_autogen.h
7363
#define GLQF_FDINSET_FV_WORD_VAL1_M BIT(15)
sys/dev/ice/ice_hw_autogen.h
7367
#define GLQF_FDINSET_FV_WORD_VAL2_M BIT(23)
sys/dev/ice/ice_hw_autogen.h
737
#define GL_ACL_ACCESS_STATUS_OPERATION_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
7371
#define GLQF_FDINSET_FV_WORD_VAL3_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
7387
#define GLQF_FDSWAP_FV_WORD_VAL0_M BIT(7)
sys/dev/ice/ice_hw_autogen.h
7391
#define GLQF_FDSWAP_FV_WORD_VAL1_M BIT(15)
sys/dev/ice/ice_hw_autogen.h
7395
#define GLQF_FDSWAP_FV_WORD_VAL2_M BIT(23)
sys/dev/ice/ice_hw_autogen.h
7399
#define GLQF_FDSWAP_FV_WORD_VAL3_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
7405
#define GLQF_HINSET_FV_WORD_VAL0_M BIT(7)
sys/dev/ice/ice_hw_autogen.h
7409
#define GLQF_HINSET_FV_WORD_VAL1_M BIT(15)
sys/dev/ice/ice_hw_autogen.h
7413
#define GLQF_HINSET_FV_WORD_VAL2_M BIT(23)
sys/dev/ice/ice_hw_autogen.h
7417
#define GLQF_HINSET_FV_WORD_VAL3_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
7441
#define GLQF_HLUT_SIZE_HSIZE_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
7457
#define GLQF_HSYMM_SYMM0_ENA_M BIT(7)
sys/dev/ice/ice_hw_autogen.h
7461
#define GLQF_HSYMM_SYMM1_ENA_M BIT(15)
sys/dev/ice/ice_hw_autogen.h
7465
#define GLQF_HSYMM_SYMM2_ENA_M BIT(23)
sys/dev/ice/ice_hw_autogen.h
7469
#define GLQF_HSYMM_SYMM3_ENA_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
7486
#define GLQF_PE_CTL2_APBVT_ENA_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
75
#define GL_RDPU_CNTRL_RECIPE_BYPASS_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
7500
#define GLQF_PEINSET_FV_WORD_VAL0_M BIT(7)
sys/dev/ice/ice_hw_autogen.h
7504
#define GLQF_PEINSET_FV_WORD_VAL1_M BIT(15)
sys/dev/ice/ice_hw_autogen.h
7508
#define GLQF_PEINSET_FV_WORD_VAL2_M BIT(23)
sys/dev/ice/ice_hw_autogen.h
7512
#define GLQF_PEINSET_FV_WORD_VAL3_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
7532
#define GLQF_PETABLE_CLR_PE_BUSY_M BIT(16)
sys/dev/ice/ice_hw_autogen.h
7534
#define GLQF_PETABLE_CLR_PE_CLEAR_M BIT(17)
sys/dev/ice/ice_hw_autogen.h
7538
#define GLQF_PROF2TC_OVERRIDE_ENA_0_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
7542
#define GLQF_PROF2TC_OVERRIDE_ENA_1_M BIT(4)
sys/dev/ice/ice_hw_autogen.h
7546
#define GLQF_PROF2TC_OVERRIDE_ENA_2_M BIT(8)
sys/dev/ice/ice_hw_autogen.h
7550
#define GLQF_PROF2TC_OVERRIDE_ENA_3_M BIT(12)
sys/dev/ice/ice_hw_autogen.h
7554
#define GLQF_PROF2TC_OVERRIDE_ENA_4_M BIT(16)
sys/dev/ice/ice_hw_autogen.h
7558
#define GLQF_PROF2TC_OVERRIDE_ENA_5_M BIT(20)
sys/dev/ice/ice_hw_autogen.h
756
#define GL_ACL_CHICKEN_REGISTER_TCAM_DATA_POL_CH_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
7562
#define GLQF_PROF2TC_OVERRIDE_ENA_6_M BIT(24)
sys/dev/ice/ice_hw_autogen.h
7566
#define GLQF_PROF2TC_OVERRIDE_ENA_7_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
758
#define GL_ACL_CHICKEN_REGISTER_TCAM_ADDR_POL_CH_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
7580
#define PFQF_FD_ENA_FD_ENA_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
7626
#define PFQF_PE_FILTERING_ENA_PE_ENA_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
7632
#define PFQF_PE_ST_CTL_PF_CNT_EN_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
7634
#define PFQF_PE_ST_CTL_VFS_CNT_EN_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
7636
#define PFQF_PE_ST_CTL_VF_CNT_EN_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
7661
#define VPQF_PE_FILTERING_ENA_PE_ENA_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
7680
#define GLDCB_RMPMC_RPM_DIS_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
7686
#define GLDCB_RPCC_EN_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
7701
#define GLDCB_RSPMC_RPM_DIS_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
7713
#define GLDCB_RTCTQ_IS_PF_Q_M BIT(16)
sys/dev/ice/ice_hw_autogen.h
796
#define GL_ACL_SCENARIO_ACT_CFG_ACTMEM_EN_M BIT(8)
sys/dev/ice/ice_hw_autogen.h
804
#define GL_ACL_SCENARIO_CFG_H_START_COMPARE_M BIT(24)
sys/dev/ice/ice_hw_autogen.h
806
#define GL_ACL_SCENARIO_CFG_H_START_SET_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
8408
#define EMP_SWT_PRUNIND_BIT_VALUE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
8417
#define EMP_SWT_REPIND_BIT_VALUE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
8427
#define GL_PLG_AVG_CALC_CFG_MODE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
8434
#define GL_PLG_AVG_CALC_ST_VALID_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
8441
#define GL_PRE_CFG_CMD_CMD_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
8443
#define GL_PRE_CFG_CMD_DONE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
8450
#define GL_SWT_FUNCFILT_FUNCFILT_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
8492
#define GL_SWT_MIRTARVSI_RULEENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
8497
#define GL_SWT_SWIDFVIDX_PORT_TYPE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
8507
#define GLSWID_STAT_BLOCK_VEBID_VALID_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
8516
#define GLSWT_ARB_MODE_FLU_PRI_SHM_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
8518
#define GLSWT_ARB_MODE_TX_RX_FWD_PRI_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
852
#define GL_SWT_L2TAGCTRL_HAS_UP_M BIT(7)
sys/dev/ice/ice_hw_autogen.h
8523
#define PRT_SBPVSI_SBP_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
8526
#define PRT_SCSTS_BSCA_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
8528
#define PRT_SCSTS_BSCAP_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
8530
#define PRT_SCSTS_MSCA_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
8532
#define PRT_SCSTS_MSCAP_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
854
#define GL_SWT_L2TAGCTRL_ISVLAN_M BIT(9)
sys/dev/ice/ice_hw_autogen.h
8543
#define PRT_SWT_MIREG_MIRENA_M BIT(7)
sys/dev/ice/ice_hw_autogen.h
8548
#define PRT_SWT_MIRIG_MIRENA_M BIT(7)
sys/dev/ice/ice_hw_autogen.h
856
#define GL_SWT_L2TAGCTRL_INNERUP_M BIT(10)
sys/dev/ice/ice_hw_autogen.h
8560
#define PRT_SWT_SCCRL_MDIPW_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
8562
#define PRT_SWT_SCCRL_MDICW_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
8564
#define PRT_SWT_SCCRL_BDIPW_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
8566
#define PRT_SWT_SCCRL_BDICW_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
858
#define GL_SWT_L2TAGCTRL_OUTERUP_M BIT(11)
sys/dev/ice/ice_hw_autogen.h
8589
#define GLHH_ART_CTL_ACTIVE_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
8591
#define GLHH_ART_CTL_TIME_OUT1_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
8593
#define GLHH_ART_CTL_TIME_OUT2_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
8595
#define GLHH_ART_CTL_RESET_HH_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
860
#define GL_SWT_L2TAGCTRL_LONG_M BIT(12)
sys/dev/ice/ice_hw_autogen.h
8600
#define GLHH_ART_DATA_SYNC_TYPE_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
8618
#define GLTSYN_AUX_IN_0_INT_ENA_M BIT(4)
sys/dev/ice/ice_hw_autogen.h
862
#define GL_SWT_L2TAGCTRL_ISMPLS_M BIT(13)
sys/dev/ice/ice_hw_autogen.h
8624
#define GLTSYN_AUX_IN_1_INT_ENA_M BIT(4)
sys/dev/ice/ice_hw_autogen.h
8630
#define GLTSYN_AUX_IN_2_INT_ENA_M BIT(4)
sys/dev/ice/ice_hw_autogen.h
8634
#define GLTSYN_AUX_OUT_0_OUT_ENA_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
8638
#define GLTSYN_AUX_OUT_0_OUTLVL_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
864
#define GL_SWT_L2TAGCTRL_ISNSH_M BIT(14)
sys/dev/ice/ice_hw_autogen.h
8640
#define GLTSYN_AUX_OUT_0_INT_ENA_M BIT(4)
sys/dev/ice/ice_hw_autogen.h
8646
#define GLTSYN_AUX_OUT_1_OUT_ENA_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
8650
#define GLTSYN_AUX_OUT_1_OUTLVL_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
8652
#define GLTSYN_AUX_OUT_1_INT_ENA_M BIT(4)
sys/dev/ice/ice_hw_autogen.h
8658
#define GLTSYN_AUX_OUT_2_OUT_ENA_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
8662
#define GLTSYN_AUX_OUT_2_OUTLVL_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
8664
#define GLTSYN_AUX_OUT_2_INT_ENA_M BIT(4)
sys/dev/ice/ice_hw_autogen.h
8670
#define GLTSYN_AUX_OUT_3_OUT_ENA_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
8674
#define GLTSYN_AUX_OUT_3_OUTLVL_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
8676
#define GLTSYN_AUX_OUT_3_INT_ENA_M BIT(4)
sys/dev/ice/ice_hw_autogen.h
8699
#define GLTSYN_CMD_SEL_MASTER_M BIT(8)
sys/dev/ice/ice_hw_autogen.h
8706
#define GLTSYN_ENA_TSYN_ENA_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
8770
#define GLTSYN_STAT_EVENT0_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
8772
#define GLTSYN_STAT_EVENT1_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
8774
#define GLTSYN_STAT_EVENT2_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
8776
#define GLTSYN_STAT_TGT0_M BIT(4)
sys/dev/ice/ice_hw_autogen.h
8778
#define GLTSYN_STAT_TGT1_M BIT(5)
sys/dev/ice/ice_hw_autogen.h
8780
#define GLTSYN_STAT_TGT2_M BIT(6)
sys/dev/ice/ice_hw_autogen.h
8782
#define GLTSYN_STAT_TGT3_M BIT(7)
sys/dev/ice/ice_hw_autogen.h
8832
#define PFHH_SEM_BUSY_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
8837
#define PFTSYN_SEM_BUSY_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
8853
#define GLPE_TSCD_FLR_VLD_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
8863
#define PF_VIRT_VSTATUS_IOV_ACTIVE_M BIT(16)
sys/dev/ice/ice_hw_autogen.h
8870
#define PF_VT_PFALLOC_VALID_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
8877
#define PF_VT_PFALLOC_HIF_VALID_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
8884
#define PF_VT_PFALLOC_PCIE_VALID_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
8890
#define VSI_L2TAGSTXVALID_L2TAG1INSERTID_VALID_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
8894
#define VSI_L2TAGSTXVALID_L2TAG2INSERTID_VALID_M BIT(7)
sys/dev/ice/ice_hw_autogen.h
8898
#define VSI_L2TAGSTXVALID_TIR0_INSERT_M BIT(19)
sys/dev/ice/ice_hw_autogen.h
8902
#define VSI_L2TAGSTXVALID_TIR1_INSERT_M BIT(23)
sys/dev/ice/ice_hw_autogen.h
8906
#define VSI_L2TAGSTXVALID_TIR2_INSERT_M BIT(27)
sys/dev/ice/ice_hw_autogen.h
8912
#define VSI_PASID_EN_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
8934
#define VSI_RXSWCTRL_MACVSIPRUNEENABLE_M BIT(8)
sys/dev/ice/ice_hw_autogen.h
8938
#define VSI_RXSWCTRL_SRCPRUNEENABLE_M BIT(13)
sys/dev/ice/ice_hw_autogen.h
8942
#define VSI_SRCSWCTRL_ALLOWDESTOVERRIDE_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
8944
#define VSI_SRCSWCTRL_ALLOWLOOPBACK_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
8946
#define VSI_SRCSWCTRL_LANENABLE_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
8948
#define VSI_SRCSWCTRL_MACAS_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
8960
#define VSI_SWT_MIREG_MIRENA_M BIT(7)
sys/dev/ice/ice_hw_autogen.h
8966
#define VSI_SWT_MIRIG_MIRENA_M BIT(7)
sys/dev/ice/ice_hw_autogen.h
9046
#define VSI_VSI2F_VSI_ENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
9060
#define VSIQF_FD_CTL1_FLT_ENA_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
9062
#define VSIQF_FD_CTL1_CFG_ENA_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
9064
#define VSIQF_FD_CTL1_EVICT_ENA_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
9076
#define VSIQF_FD_DFLT_DEFLT_DROP_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
9098
#define VSIQF_HASH_CTL_TC_OVER_ENA_M BIT(15)
sys/dev/ice/ice_hw_autogen.h
911
#define GLCOMM_QTX_CNTX_CTL_CMD_EXEC_M BIT(19)
sys/dev/ice/ice_hw_autogen.h
9122
#define VSIQF_PE_CTL1_PE_FLTENA_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
9138
#define PFPM_APM_APME_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
9141
#define PFPM_WUC_EN_APM_D0_M BIT(5)
sys/dev/ice/ice_hw_autogen.h
9144
#define PFPM_WUFC_LNKC_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
9146
#define PFPM_WUFC_MAG_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
9148
#define PFPM_WUFC_MNG_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
9150
#define PFPM_WUFC_FLX0_ACT_M BIT(4)
sys/dev/ice/ice_hw_autogen.h
9152
#define PFPM_WUFC_FLX1_ACT_M BIT(5)
sys/dev/ice/ice_hw_autogen.h
9154
#define PFPM_WUFC_FLX2_ACT_M BIT(6)
sys/dev/ice/ice_hw_autogen.h
9156
#define PFPM_WUFC_FLX3_ACT_M BIT(7)
sys/dev/ice/ice_hw_autogen.h
9158
#define PFPM_WUFC_FLX4_ACT_M BIT(8)
sys/dev/ice/ice_hw_autogen.h
9160
#define PFPM_WUFC_FLX5_ACT_M BIT(9)
sys/dev/ice/ice_hw_autogen.h
9162
#define PFPM_WUFC_FLX6_ACT_M BIT(10)
sys/dev/ice/ice_hw_autogen.h
9164
#define PFPM_WUFC_FLX7_ACT_M BIT(11)
sys/dev/ice/ice_hw_autogen.h
9166
#define PFPM_WUFC_FLX0_M BIT(16)
sys/dev/ice/ice_hw_autogen.h
9168
#define PFPM_WUFC_FLX1_M BIT(17)
sys/dev/ice/ice_hw_autogen.h
9170
#define PFPM_WUFC_FLX2_M BIT(18)
sys/dev/ice/ice_hw_autogen.h
9172
#define PFPM_WUFC_FLX3_M BIT(19)
sys/dev/ice/ice_hw_autogen.h
9174
#define PFPM_WUFC_FLX4_M BIT(20)
sys/dev/ice/ice_hw_autogen.h
9176
#define PFPM_WUFC_FLX5_M BIT(21)
sys/dev/ice/ice_hw_autogen.h
9178
#define PFPM_WUFC_FLX6_M BIT(22)
sys/dev/ice/ice_hw_autogen.h
918
#define GLCOMM_QTX_CNTX_STAT_CMD_IN_PROG_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
9180
#define PFPM_WUFC_FLX7_M BIT(23)
sys/dev/ice/ice_hw_autogen.h
9182
#define PFPM_WUFC_FW_RST_WK_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
9185
#define PFPM_WUS_LNKC_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
9187
#define PFPM_WUS_MAG_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
9189
#define PFPM_WUS_PME_STATUS_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
9191
#define PFPM_WUS_MNG_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
9193
#define PFPM_WUS_FLX0_M BIT(16)
sys/dev/ice/ice_hw_autogen.h
9195
#define PFPM_WUS_FLX1_M BIT(17)
sys/dev/ice/ice_hw_autogen.h
9197
#define PFPM_WUS_FLX2_M BIT(18)
sys/dev/ice/ice_hw_autogen.h
9199
#define PFPM_WUS_FLX3_M BIT(19)
sys/dev/ice/ice_hw_autogen.h
9201
#define PFPM_WUS_FLX4_M BIT(20)
sys/dev/ice/ice_hw_autogen.h
9203
#define PFPM_WUS_FLX5_M BIT(21)
sys/dev/ice/ice_hw_autogen.h
9205
#define PFPM_WUS_FLX6_M BIT(22)
sys/dev/ice/ice_hw_autogen.h
9207
#define PFPM_WUS_FLX7_M BIT(23)
sys/dev/ice/ice_hw_autogen.h
9209
#define PFPM_WUS_FW_RST_WK_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
9219
#define PRTPM_SAH_MC_MAG_EN_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
9221
#define PRTPM_SAH_AV_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
9236
#define GLPE_CQM_FUNC_INVALIDATE_ENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
9260
#define VF_MBX_ARQLEN1_ARQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
9262
#define VF_MBX_ARQLEN1_ARQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
9264
#define VF_MBX_ARQLEN1_ARQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
9266
#define VF_MBX_ARQLEN1_ARQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
9283
#define VF_MBX_ATQLEN1_ATQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
9285
#define VF_MBX_ATQLEN1_ATQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
9287
#define VF_MBX_ATQLEN1_ATQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
9289
#define VF_MBX_ATQLEN1_ATQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
9295
#define PFPCI_VF_FLUSH_DONE1_FLUSH_DONE_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
9301
#define VFINT_DYN_CTL0_INTENA_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
9303
#define VFINT_DYN_CTL0_CLEARPBA_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
9305
#define VFINT_DYN_CTL0_SWINT_TRIG_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
931
#define GLLAN_TCLAN_CACHE_CTL_FETCH_CL_ALIGN_M BIT(6)
sys/dev/ice/ice_hw_autogen.h
9311
#define VFINT_DYN_CTL0_SW_ITR_INDX_ENA_M BIT(24)
sys/dev/ice/ice_hw_autogen.h
9315
#define VFINT_DYN_CTL0_WB_ON_ITR_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
9317
#define VFINT_DYN_CTL0_INTENA_MSK_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
9321
#define VFINT_DYN_CTLN_INTENA_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
9323
#define VFINT_DYN_CTLN_CLEARPBA_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
9325
#define VFINT_DYN_CTLN_SWINT_TRIG_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
9331
#define VFINT_DYN_CTLN_SW_ITR_INDX_ENA_M BIT(24)
sys/dev/ice/ice_hw_autogen.h
9335
#define VFINT_DYN_CTLN_WB_ON_ITR_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
9337
#define VFINT_DYN_CTLN_INTENA_MSK_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
9373
#define VF_MBX_CPM_ARQLEN1_ARQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
9375
#define VF_MBX_CPM_ARQLEN1_ARQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
9377
#define VF_MBX_CPM_ARQLEN1_ARQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
9379
#define VF_MBX_CPM_ARQLEN1_ARQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
9396
#define VF_MBX_CPM_ATQLEN1_ATQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
9398
#define VF_MBX_CPM_ATQLEN1_ATQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
9400
#define VF_MBX_CPM_ATQLEN1_ATQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
9402
#define VF_MBX_CPM_ATQLEN1_ATQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
9421
#define VF_MBX_HLP_ARQLEN1_ARQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
9423
#define VF_MBX_HLP_ARQLEN1_ARQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
9425
#define VF_MBX_HLP_ARQLEN1_ARQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
9427
#define VF_MBX_HLP_ARQLEN1_ARQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
9444
#define VF_MBX_HLP_ATQLEN1_ATQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
9446
#define VF_MBX_HLP_ATQLEN1_ATQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
9448
#define VF_MBX_HLP_ATQLEN1_ATQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
9450
#define VF_MBX_HLP_ATQLEN1_ATQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
9469
#define VF_MBX_PSM_ARQLEN1_ARQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
9471
#define VF_MBX_PSM_ARQLEN1_ARQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
9473
#define VF_MBX_PSM_ARQLEN1_ARQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
9475
#define VF_MBX_PSM_ARQLEN1_ARQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
9492
#define VF_MBX_PSM_ATQLEN1_ATQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
9494
#define VF_MBX_PSM_ATQLEN1_ATQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
9496
#define VF_MBX_PSM_ATQLEN1_ATQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
9498
#define VF_MBX_PSM_ATQLEN1_ATQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
9517
#define VF_SB_CPM_ARQLEN1_ARQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
9519
#define VF_SB_CPM_ARQLEN1_ARQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
9521
#define VF_SB_CPM_ARQLEN1_ARQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
9523
#define VF_SB_CPM_ARQLEN1_ARQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
9540
#define VF_SB_CPM_ATQLEN1_ATQVFE_M BIT(28)
sys/dev/ice/ice_hw_autogen.h
9542
#define VF_SB_CPM_ATQLEN1_ATQOVFL_M BIT(29)
sys/dev/ice/ice_hw_autogen.h
9544
#define VF_SB_CPM_ATQLEN1_ATQCRIT_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
9546
#define VF_SB_CPM_ATQLEN1_ATQENABLE_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
9553
#define VFINT_DYN_CTL_INTENA_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
9555
#define VFINT_DYN_CTL_CLEARPBA_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
9557
#define VFINT_DYN_CTL_SWINT_TRIG_M BIT(2)
sys/dev/ice/ice_hw_autogen.h
9563
#define VFINT_DYN_CTL_SW_ITR_INDX_ENA_M BIT(24)
sys/dev/ice/ice_hw_autogen.h
9567
#define VFINT_DYN_CTL_WB_ON_ITR_M BIT(30)
sys/dev/ice/ice_hw_autogen.h
9569
#define VFINT_DYN_CTL_INTENA_MSK_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
9609
#define VFPE_CCQPSTATUS1_CCQP_DONE_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
9615
#define VFPE_CCQPSTATUS1_CCQP_ERR_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
9634
#define VFPE_CQPTAIL1_CQP_OP_ERR_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
9639
#define VFPE_IPCONFIG01_USEENTIREIDRANGE_M BIT(16)
sys/dev/ice/ice_hw_autogen.h
9641
#define VFPE_IPCONFIG01_UDP_SRC_PORT_MASK_EN_M BIT(17)
sys/dev/ice/ice_hw_autogen.h
9663
#define E830_GL_QRX_CONTEXT_CTL_CMD_EXEC_M BIT(19)
sys/dev/ice/ice_hw_autogen.h
9670
#define E830_GL_QRX_CONTEXT_STAT_CMD_IN_PROG_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
9740
#define E830_GLTXTIME_QTX_CNTX_CTL_CMD_EXEC_M BIT(19)
sys/dev/ice/ice_hw_autogen.h
9747
#define E830_GLTXTIME_QTX_CNTX_STAT_CMD_IN_PROG_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
9750
#define E830_GLTXTIME_TS_CFG_TXTIME_ENABLE_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
9757
#define E830_MBX_PF_DEC_ERR_DEC_ERR_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
9776
#define E830_GLRCB_AG_DCB_ARBITER_CONFIG_STRICT_WRR_M BIT(7)
sys/dev/ice/ice_hw_autogen.h
9803
#define E830_GL_FW_LOGS_STS_FW_LOGS_ENA_M BIT(31)
sys/dev/ice/ice_hw_autogen.h
9811
#define E830_GLGEN_RTRIG_EMPR_WO_GLOBR_M BIT(3)
sys/dev/ice/ice_hw_autogen.h
9828
#define E830_PORT_TIMER_SEL_TIMER_SEL_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
9830
#define E830_GL_RDPU_CNTRL_CHECKSUM_COMPLETE_INV_M BIT(22)
sys/dev/ice/ice_hw_autogen.h
9841
#define E830_PRTTSYN_TXTIME_L_TX_VALID_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
9846
#define E830_GL_MDCK_TDAT_TCLAN_TSYN_PF_TSYN_PKT_FROM_Q_NOT_ALLOWED_M BIT(0)
sys/dev/ice/ice_hw_autogen.h
9848
#define E830_GL_MDCK_TDAT_TCLAN_TSYN_PF_TSYN_PKT_RANGE_VIOLATION_M BIT(1)
sys/dev/ice/ice_hw_autogen.h
9859
#define E830_GL_MDET_RX_FIFO_FIFO_FULL_M BIT(20)
sys/dev/ice/ice_hw_autogen.h
9861
#define E830_GL_MDET_RX_FIFO_VALID_M BIT(21)
sys/dev/ice/ice_hw_autogen.h
9882
#define E830_GL_MDET_TX_PQM_FIFO_FIFO_FULL_M BIT(20)
sys/dev/ice/ice_hw_autogen.h
9884
#define E830_GL_MDET_TX_PQM_FIFO_VALID_M BIT(21)
sys/dev/ice/ice_hw_autogen.h
9905
#define E830_GL_MDET_TX_TCLAN_FIFO_FIFO_FULL_M BIT(20)
sys/dev/ice/ice_hw_autogen.h
9907
#define E830_GL_MDET_TX_TCLAN_FIFO_VALID_M BIT(21)
sys/dev/ice/ice_hw_autogen.h
9928
#define E830_GL_MDET_TX_TDPU_FIFO_FIFO_FULL_M BIT(20)
sys/dev/ice/ice_hw_autogen.h
9930
#define E830_GL_MDET_TX_TDPU_FIFO_VALID_M BIT(21)
sys/dev/ice/ice_iflib_txrx.c
335
if ((status0 & BIT(ICE_RX_FLEX_DESC_STATUS0_DD_S)) == 0)
sys/dev/ice/ice_iflib_txrx.c
339
if (status0 & BIT(ICE_RX_FLEX_DESC_STATUS0_EOF_S))
sys/dev/ice/ice_iflib_txrx.c
412
MPASS((status0 & BIT(ICE_RX_FLEX_DESC_STATUS0_DD_S)) != 0);
sys/dev/ice/ice_iflib_txrx.c
417
eop = (status0 & BIT(ICE_RX_FLEX_DESC_STATUS0_EOF_S));
sys/dev/ice/ice_iflib_txrx.c
432
if (status0 & BIT(ICE_RX_FLEX_DESC_STATUS0_RXE_S)) {
sys/dev/ice/ice_iflib_txrx.c
438
if (status0 & BIT(ICE_RX_FLEX_DESC_STATUS0_L2TAG1P_S)) {
sys/dev/ice/ice_iov.c
492
if (reg & BIT(bit_idx))
sys/dev/ice/ice_iov.c
560
wr32(hw, GLGEN_VFLRSTAT(reg_idx), BIT(bit_idx));
sys/dev/ice/ice_iov.h
67
VF_FLAG_ENABLED = BIT(0),
sys/dev/ice/ice_iov.h
68
VF_FLAG_SET_MAC_CAP = BIT(1),
sys/dev/ice/ice_iov.h
69
VF_FLAG_VLAN_CAP = BIT(2),
sys/dev/ice/ice_iov.h
70
VF_FLAG_PROMISC_CAP = BIT(3),
sys/dev/ice/ice_iov.h
71
VF_FLAG_MAC_ANTI_SPOOF = BIT(4),
sys/dev/ice/ice_lan_tx_rx.h
225
#define ICE_RXD_QW1_STATUS_M ((BIT(ICE_RX_DESC_STATUS_LAST) - 1) << \
sys/dev/ice/ice_lib.c
6233
if (copied_state & BIT(i)) {
sys/dev/ice/ice_lib.c
7078
if (!(vsi->tc_map & BIT(tc)))
sys/dev/ice/ice_lib.c
8582
tc_map |= BIT(dcbcfg->etscfg.prio_table[i]);
sys/dev/ice/ice_lib.c
8586
tc_map |= BIT(dcbcfg->dscp_map[i]);
sys/dev/ice/ice_lib.c
8802
if (!(vsi->tc_map & BIT(i))) {
sys/dev/ice/ice_lib.c
8868
if (tc_map & BIT(i))
sys/dev/ice/ice_lib.c
8935
if (tc_map & BIT(i)) {
sys/dev/ice/ice_lib.h
227
#define ICE_DFLT_TRAFFIC_CLASS BIT(0)
sys/dev/ice/ice_lib.h
286
#define ICE_APPLY_LS BIT(0)
sys/dev/ice/ice_lib.h
287
#define ICE_APPLY_FEC BIT(1)
sys/dev/ice/ice_lib.h
288
#define ICE_APPLY_FC BIT(2)
sys/dev/ice/ice_lib.h
741
atomic_set_32(s, BIT(bit));
sys/dev/ice/ice_lib.h
755
atomic_clear_32(s, BIT(bit));
sys/dev/ice/ice_lib.h
800
return (*s & BIT(bit)) ? true : false;
sys/dev/ice/ice_nvm.c
1432
flash->sr_words = BIT(sr_size) * ICE_SR_WORDS_IN_1KB;
sys/dev/ice/ice_nvm.h
72
#define ICE_NVM_FEATURES_0_REG_ACCESS BIT(1)
sys/dev/ice/ice_rdma.c
385
num_tc |= BIT(dcbx_cfg->etscfg.prio_table[j]);
sys/dev/ice/ice_rdma.c
388
if (num_tc & BIT(j)) {
sys/dev/ice/ice_rdma.c
390
val_tc |= BIT(j);
sys/dev/ice/ice_sched.c
4725
#define ICE_SCHED_GENERIC_STRICT_MODE BIT(4)
sys/dev/ice/ice_sched.h
52
#define ICE_KBYTE_GRANULARITY BIT(11)
sys/dev/ice/ice_sched.h
55
((BIT(11) - 1) * 1024) /* In Bytes */
sys/dev/ice/ice_sched.h
57
((BIT(11) - 1) * 64) /* In Bytes */
sys/dev/ice/ice_switch.h
42
#define ICE_FLTR_RX BIT(0)
sys/dev/ice/ice_switch.h
43
#define ICE_FLTR_TX BIT(1)
sys/dev/ice/ice_switch.h
44
#define ICE_FLTR_RX_LB BIT(2)
sys/dev/ice/ice_type.h
1412
#define ICE_SR_CTRL_WORD_OROM_BANK BIT(3)
sys/dev/ice/ice_type.h
1413
#define ICE_SR_CTRL_WORD_NETLIST_BANK BIT(4)
sys/dev/ice/ice_type.h
1414
#define ICE_SR_CTRL_WORD_NVM_BANK BIT(5)
sys/dev/ice/ice_type.h
1416
#define ICE_SR_NVM_PTR_4KB_UNITS BIT(15)
sys/dev/ice/ice_type.h
426
#define ICE_MGMT_MODE_PROTO_RSVD BIT(0)
sys/dev/ice/ice_type.h
427
#define ICE_MGMT_MODE_PROTO_PLDM BIT(1)
sys/dev/ice/ice_type.h
428
#define ICE_MGMT_MODE_PROTO_OEM BIT(2)
sys/dev/ice/ice_type.h
429
#define ICE_MGMT_MODE_PROTO_NC_SI BIT(3)
sys/dev/ice/ice_type.h
485
#define ICE_WOL_SUPPORT_M BIT(0)
sys/dev/ice/ice_type.h
486
#define ICE_ACPI_PROG_MTHD_M BIT(1)
sys/dev/ice/ice_type.h
487
#define ICE_PROXY_SUPPORT_M BIT(2)
sys/dev/ice/ice_type.h
495
#define ICE_NVM_MGMT_SEC_REV_DISABLED BIT(0)
sys/dev/ice/ice_type.h
496
#define ICE_NVM_MGMT_UPDATE_DISABLED BIT(1)
sys/dev/ice/ice_type.h
497
#define ICE_NVM_MGMT_UNIFIED_UPD_SUPPORT BIT(3)
sys/dev/ice/ice_type.h
498
#define ICE_NVM_MGMT_NETLIST_AUTH_SUPPORT BIT(5)
sys/dev/ice/ice_type.h
513
#define ICE_EXT_TOPO_DEV_IMG_LOAD_EN BIT(0)
sys/dev/ice/ice_type.h
515
#define ICE_EXT_TOPO_DEV_IMG_PROG_EN BIT(1)
sys/dev/ice/ice_type.h
517
#define ICE_EXT_TOPO_DEV_IMG_VER_SCHEMA BIT(2)
sys/dev/ice/ice_type.h
52
return !!(bitmap & BIT(tc));
sys/dev/ice/ice_type.h
525
#define ICE_NAC_TOPO_PRIMARY_M BIT(0)
sys/dev/ice/ice_type.h
526
#define ICE_NAC_TOPO_DUAL_M BIT(1)
sys/dev/ice/ice_type.h
551
#define ICE_SENSOR_SUPPORT_E810_INT_TEMP BIT(0)
sys/dev/ice/ice_type.h
703
#define ICE_LINK_OVERRIDE_STRICT_MODE BIT(0)
sys/dev/ice/ice_type.h
704
#define ICE_LINK_OVERRIDE_EPCT_DIS BIT(1)
sys/dev/ice/ice_type.h
705
#define ICE_LINK_OVERRIDE_PORT_DIS BIT(2)
sys/dev/ice/ice_type.h
706
#define ICE_LINK_OVERRIDE_EN BIT(3)
sys/dev/ice/ice_type.h
707
#define ICE_LINK_OVERRIDE_AUTO_LINK_DIS BIT(4)
sys/dev/ice/ice_type.h
708
#define ICE_LINK_OVERRIDE_EEE_EN BIT(5)
sys/dev/ice/ice_type.h
713
#define ICE_LINK_OVERRIDE_LESM_EN BIT(6)
sys/dev/ice/ice_type.h
714
#define ICE_LINK_OVERRIDE_AUTO_FEC_EN BIT(7)
sys/dev/ice/virtchnl.h
111
VIRTCHNL_LINK_SPEED_100MB = BIT(VIRTCHNL_LINK_SPEED_100MB_SHIFT),
sys/dev/ice/virtchnl.h
112
VIRTCHNL_LINK_SPEED_1GB = BIT(VIRTCHNL_LINK_SPEED_1000MB_SHIFT),
sys/dev/ice/virtchnl.h
113
VIRTCHNL_LINK_SPEED_10GB = BIT(VIRTCHNL_LINK_SPEED_10GB_SHIFT),
sys/dev/ice/virtchnl.h
114
VIRTCHNL_LINK_SPEED_40GB = BIT(VIRTCHNL_LINK_SPEED_40GB_SHIFT),
sys/dev/ice/virtchnl.h
115
VIRTCHNL_LINK_SPEED_20GB = BIT(VIRTCHNL_LINK_SPEED_20GB_SHIFT),
sys/dev/ice/virtchnl.h
116
VIRTCHNL_LINK_SPEED_25GB = BIT(VIRTCHNL_LINK_SPEED_25GB_SHIFT),
sys/dev/ice/virtchnl.h
117
VIRTCHNL_LINK_SPEED_2_5GB = BIT(VIRTCHNL_LINK_SPEED_2_5GB_SHIFT),
sys/dev/ice/virtchnl.h
118
VIRTCHNL_LINK_SPEED_5GB = BIT(VIRTCHNL_LINK_SPEED_5GB_SHIFT),
sys/dev/ice/virtchnl.h
1463
((hdr)->field_selector |= BIT((field) & PROTO_HDR_FIELD_MASK))
sys/dev/ice/virtchnl.h
1465
((hdr)->field_selector &= ~BIT((field) & PROTO_HDR_FIELD_MASK))
sys/dev/ice/virtchnl.h
1467
((hdr)->field_selector & BIT((val) & PROTO_HDR_FIELD_MASK))
sys/dev/ice/virtchnl.h
433
#define VIRTCHNL_VF_OFFLOAD_L2 BIT(0)
sys/dev/ice/virtchnl.h
434
#define VIRTCHNL_VF_OFFLOAD_IWARP BIT(1)
sys/dev/ice/virtchnl.h
436
#define VIRTCHNL_VF_OFFLOAD_RSS_AQ BIT(3)
sys/dev/ice/virtchnl.h
437
#define VIRTCHNL_VF_OFFLOAD_RSS_REG BIT(4)
sys/dev/ice/virtchnl.h
438
#define VIRTCHNL_VF_OFFLOAD_WB_ON_ITR BIT(5)
sys/dev/ice/virtchnl.h
439
#define VIRTCHNL_VF_OFFLOAD_REQ_QUEUES BIT(6)
sys/dev/ice/virtchnl.h
441
#define VIRTCHNL_VF_CAP_ADV_LINK_SPEED BIT(7)
sys/dev/ice/virtchnl.h
443
#define VIRTCHNL_VF_LARGE_NUM_QPAIRS BIT(9)
sys/dev/ice/virtchnl.h
444
#define VIRTCHNL_VF_OFFLOAD_CRC BIT(10)
sys/dev/ice/virtchnl.h
445
#define VIRTCHNL_VF_OFFLOAD_FSUB_PF BIT(14)
sys/dev/ice/virtchnl.h
446
#define VIRTCHNL_VF_OFFLOAD_VLAN_V2 BIT(15)
sys/dev/ice/virtchnl.h
447
#define VIRTCHNL_VF_OFFLOAD_VLAN BIT(16)
sys/dev/ice/virtchnl.h
448
#define VIRTCHNL_VF_OFFLOAD_RX_POLLING BIT(17)
sys/dev/ice/virtchnl.h
449
#define VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2 BIT(18)
sys/dev/ice/virtchnl.h
450
#define VIRTCHNL_VF_OFFLOAD_RSS_PF BIT(19)
sys/dev/ice/virtchnl.h
451
#define VIRTCHNL_VF_OFFLOAD_ENCAP BIT(20)
sys/dev/ice/virtchnl.h
452
#define VIRTCHNL_VF_OFFLOAD_ENCAP_CSUM BIT(21)
sys/dev/ice/virtchnl.h
453
#define VIRTCHNL_VF_OFFLOAD_RX_ENCAP_CSUM BIT(22)
sys/dev/ice/virtchnl.h
454
#define VIRTCHNL_VF_OFFLOAD_ADQ BIT(23)
sys/dev/ice/virtchnl.h
455
#define VIRTCHNL_VF_OFFLOAD_ADQ_V2 BIT(24)
sys/dev/ice/virtchnl.h
456
#define VIRTCHNL_VF_OFFLOAD_USO BIT(25)
sys/dev/ice/virtchnl.h
458
#define VIRTCHNL_VF_OFFLOAD_ADV_RSS_PF BIT(27)
sys/dev/ice/virtchnl.h
459
#define VIRTCHNL_VF_OFFLOAD_FDIR_PF BIT(28)
sys/dev/ice/virtchnl.h
460
#define VIRTCHNL_VF_OFFLOAD_QOS BIT(29)
sys/dev/ice/virtchnl.h
523
VIRTCHNL_RXDID_0_16B_BASE_M = BIT(VIRTCHNL_RXDID_0_16B_BASE),
sys/dev/ice/virtchnl.h
524
VIRTCHNL_RXDID_1_32B_BASE_M = BIT(VIRTCHNL_RXDID_1_32B_BASE),
sys/dev/ice/virtchnl.h
525
VIRTCHNL_RXDID_2_FLEX_SQ_NIC_M = BIT(VIRTCHNL_RXDID_2_FLEX_SQ_NIC),
sys/dev/ice/virtchnl.h
526
VIRTCHNL_RXDID_3_FLEX_SQ_SW_M = BIT(VIRTCHNL_RXDID_3_FLEX_SQ_SW),
sys/dev/ice/virtchnl.h
527
VIRTCHNL_RXDID_4_FLEX_SQ_NIC_VEB_M = BIT(VIRTCHNL_RXDID_4_FLEX_SQ_NIC_VEB),
sys/dev/ice/virtchnl.h
528
VIRTCHNL_RXDID_5_FLEX_SQ_NIC_ACL_M = BIT(VIRTCHNL_RXDID_5_FLEX_SQ_NIC_ACL),
sys/dev/ice/virtchnl.h
529
VIRTCHNL_RXDID_6_FLEX_SQ_NIC_2_M = BIT(VIRTCHNL_RXDID_6_FLEX_SQ_NIC_2),
sys/dev/ice/virtchnl.h
530
VIRTCHNL_RXDID_7_HW_RSVD_M = BIT(VIRTCHNL_RXDID_7_HW_RSVD),
sys/dev/ice/virtchnl.h
532
VIRTCHNL_RXDID_16_COMMS_GENERIC_M = BIT(VIRTCHNL_RXDID_16_COMMS_GENERIC),
sys/dev/ice/virtchnl.h
533
VIRTCHNL_RXDID_17_COMMS_AUX_VLAN_M = BIT(VIRTCHNL_RXDID_17_COMMS_AUX_VLAN),
sys/dev/ice/virtchnl.h
534
VIRTCHNL_RXDID_18_COMMS_AUX_IPV4_M = BIT(VIRTCHNL_RXDID_18_COMMS_AUX_IPV4),
sys/dev/ice/virtchnl.h
535
VIRTCHNL_RXDID_19_COMMS_AUX_IPV6_M = BIT(VIRTCHNL_RXDID_19_COMMS_AUX_IPV6),
sys/dev/ice/virtchnl.h
536
VIRTCHNL_RXDID_20_COMMS_AUX_FLOW_M = BIT(VIRTCHNL_RXDID_20_COMMS_AUX_FLOW),
sys/dev/ice/virtchnl.h
537
VIRTCHNL_RXDID_21_COMMS_AUX_TCP_M = BIT(VIRTCHNL_RXDID_21_COMMS_AUX_TCP),
sys/dev/iicbus/rtc/pcf85063.c
53
#define PCF85063_CTRL1_TIME_FORMAT BIT(1)
sys/dev/iicbus/rtc/pcf85063.c
54
#define PCF85063_CTRL1_RTC_CLK_STOP BIT(5)
sys/dev/iicbus/rtc/pcf85063.c
55
#define PCF85063_TIME_REG_OSC_STOP BIT(7)
sys/dev/iicbus/rtc/rx8803.c
54
#define RX8803_FLAGS_V1F BIT(0)
sys/dev/iicbus/rtc/rx8803.c
55
#define RX8803_FLAGS_V2F BIT(1)
sys/dev/iicbus/rtc/rx8803.c
57
#define RX8803_CTRL_DISABLE BIT(0)
sys/dev/iicbus/sensor/tmp461.c
55
#define TMP461_STATUS_REG_TEMP_LOCAL BIT(2)
sys/dev/iicbus/sensor/tmp461.c
58
#define TMP461_CONFIG_REG_TEMP_RANGE_BIT BIT(2)
sys/dev/iicbus/sensor/tmp461.c
59
#define TMP461_CONFIG_REG_STANDBY_BIT BIT(6)
sys/dev/iicbus/sensor/tmp461.c
72
#define TMP461_LOCAL_TEMP_DOUBLE_REG BIT(0)
sys/dev/iicbus/sensor/tmp461.c
73
#define TMP461_REMOTE_TEMP_DOUBLE_REG BIT(1)
sys/dev/irdma/icrdma_hw.c
318
cc->prio) & BIT(0);
sys/dev/irdma/icrdma_hw.c
320
cc->prio) & BIT(0);
sys/dev/irdma/irdma.h
48
#define IRDMA_CQPTAIL_CQP_OP_ERR BIT(31)
sys/dev/irdma/irdma.h
59
#define IRDMA_GLINT_RATE_INTRL_ENA_M BIT(6)
sys/dev/irdma/irdma.h
60
#define IRDMA_GLINT_RATE_INTRL_ENA BIT(6)
sys/dev/irdma/irdma.h
63
#define IRDMA_GLINT_DYN_CTL_INTENA BIT(0)
sys/dev/irdma/irdma.h
65
#define IRDMA_GLINT_DYN_CTL_CLEARPBA BIT(1)
sys/dev/irdma/irdma.h
73
#define IRDMA_GLINT_CEQCTL_CAUSE_ENA BIT(30)
sys/dev/irdma/irdma.h
81
#define IRDMA_PFINT_AEQCTL_CAUSE_ENA BIT(30)
sys/dev/irdma/irdma.h
85
#define IRDMA_PFHMC_PDINV_PMSDPARTSEL BIT(15)
sys/dev/irdma/irdma.h
89
#define IRDMA_PFHMC_SDDATALOW_PMSDVALID BIT(0)
sys/dev/irdma/irdma.h
91
#define IRDMA_PFHMC_SDDATALOW_PMSDTYPE BIT(1)
sys/dev/irdma/irdma.h
97
#define IRDMA_PFHMC_SDCMD_PMSDWR BIT(31)
sys/dev/irdma/irdma.h
99
#define IRDMA_PFHMC_SDCMD_PMSDPARTSEL BIT(15)
sys/dev/irdma/irdma_defs.h
1370
#define IRDMAPFINT_OICR_HMC_ERR_M BIT(26)
sys/dev/irdma/irdma_defs.h
1371
#define IRDMAPFINT_OICR_PE_PUSH_M BIT(27)
sys/dev/irdma/irdma_defs.h
1372
#define IRDMAPFINT_OICR_PE_CRITERR_M BIT(28)
sys/dev/irdma/irdma_main.h
130
#define IRDMA_FLUSH_SQ BIT(0)
sys/dev/irdma/irdma_main.h
131
#define IRDMA_FLUSH_RQ BIT(1)
sys/dev/irdma/irdma_main.h
132
#define IRDMA_REFLUSH BIT(2)
sys/dev/irdma/irdma_main.h
133
#define IRDMA_FLUSH_WAIT BIT(3)
sys/dev/iwx/if_iwxreg.h
4326
#define IWX_TWT_SUPPORTED BIT (1 << 0)
sys/dev/ixgbe/if_ix.c
3337
if (sc->debug_dump_cluster_mask & BIT(id)) {
sys/dev/ixgbe/ixgbe_e610.c
3184
flash->sr_words = BIT(sr_size) * IXGBE_SR_WORDS_IN_1KB;
sys/dev/ixgbe/ixgbe_e610.c
5602
eeprom->word_size = BIT(sr_size) * IXGBE_SR_WORDS_IN_1KB;
sys/dev/ixgbe/ixgbe_type_e610.h
1000
#define IXGBE_ACI_LP_AN_ABILITY BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
1001
#define IXGBE_ACI_PD_FAULT BIT(2) /* Parallel Detection Fault */
sys/dev/ixgbe/ixgbe_type_e610.h
1002
#define IXGBE_ACI_FEC_EN BIT(3)
sys/dev/ixgbe/ixgbe_type_e610.h
1003
#define IXGBE_ACI_PHY_LOW_POWER BIT(4) /* Low Power State */
sys/dev/ixgbe/ixgbe_type_e610.h
1004
#define IXGBE_ACI_LINK_PAUSE_TX BIT(5)
sys/dev/ixgbe/ixgbe_type_e610.h
1005
#define IXGBE_ACI_LINK_PAUSE_RX BIT(6)
sys/dev/ixgbe/ixgbe_type_e610.h
1006
#define IXGBE_ACI_QUALIFIED_MODULE BIT(7)
sys/dev/ixgbe/ixgbe_type_e610.h
1008
#define IXGBE_ACI_LINK_PHY_TEMP_ALARM BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
1009
#define IXGBE_ACI_LINK_EXCESSIVE_ERRORS BIT(1) /* Excessive Link Errors */
sys/dev/ixgbe/ixgbe_type_e610.h
1017
#define IXGBE_ACI_LINK_LB_PHY_LCL BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
1018
#define IXGBE_ACI_LINK_LB_PHY_RMT BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
1019
#define IXGBE_ACI_LINK_LB_MAC_LCL BIT(2)
sys/dev/ixgbe/ixgbe_type_e610.h
1024
#define IXGBE_ACI_LINK_25G_KR_FEC_EN BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
1025
#define IXGBE_ACI_LINK_25G_RS_528_FEC_EN BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
1026
#define IXGBE_ACI_LINK_25G_RS_544_FEC_EN BIT(2)
sys/dev/ixgbe/ixgbe_type_e610.h
1031
#define IXGBE_ACI_CFG_PACING_TYPE_M BIT(7)
sys/dev/ixgbe/ixgbe_type_e610.h
1045
#define IXGBE_ACI_LINK_SPEED_10MB BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
1046
#define IXGBE_ACI_LINK_SPEED_100MB BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
1047
#define IXGBE_ACI_LINK_SPEED_1000MB BIT(2)
sys/dev/ixgbe/ixgbe_type_e610.h
1048
#define IXGBE_ACI_LINK_SPEED_2500MB BIT(3)
sys/dev/ixgbe/ixgbe_type_e610.h
1049
#define IXGBE_ACI_LINK_SPEED_5GB BIT(4)
sys/dev/ixgbe/ixgbe_type_e610.h
1050
#define IXGBE_ACI_LINK_SPEED_10GB BIT(5)
sys/dev/ixgbe/ixgbe_type_e610.h
1051
#define IXGBE_ACI_LINK_SPEED_20GB BIT(6)
sys/dev/ixgbe/ixgbe_type_e610.h
1052
#define IXGBE_ACI_LINK_SPEED_25GB BIT(7)
sys/dev/ixgbe/ixgbe_type_e610.h
1053
#define IXGBE_ACI_LINK_SPEED_40GB BIT(8)
sys/dev/ixgbe/ixgbe_type_e610.h
1054
#define IXGBE_ACI_LINK_SPEED_50GB BIT(9)
sys/dev/ixgbe/ixgbe_type_e610.h
1055
#define IXGBE_ACI_LINK_SPEED_100GB BIT(10)
sys/dev/ixgbe/ixgbe_type_e610.h
1056
#define IXGBE_ACI_LINK_SPEED_200GB BIT(11)
sys/dev/ixgbe/ixgbe_type_e610.h
1057
#define IXGBE_ACI_LINK_SPEED_UNKNOWN BIT(15)
sys/dev/ixgbe/ixgbe_type_e610.h
1060
#define IXGBE_ACI_LINK_EEE_ENABLED BIT(2)
sys/dev/ixgbe/ixgbe_type_e610.h
1061
#define IXGBE_ACI_LINK_EEE_ACTIVE BIT(3)
sys/dev/ixgbe/ixgbe_type_e610.h
1069
#define IXGBE_ACI_LINK_LP_10G_KR_FEC_CAP BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
1070
#define IXGBE_ACI_LINK_LP_25G_KR_FEC_CAP BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
1071
#define IXGBE_ACI_LINK_LP_RS_528_FEC_CAP BIT(2)
sys/dev/ixgbe/ixgbe_type_e610.h
1072
#define IXGBE_ACI_LINK_LP_50G_KR_272_FEC_CAP BIT(3)
sys/dev/ixgbe/ixgbe_type_e610.h
1073
#define IXGBE_ACI_LINK_LP_100G_KR_272_FEC_CAP BIT(4)
sys/dev/ixgbe/ixgbe_type_e610.h
1074
#define IXGBE_ACI_LINK_LP_200G_KR_272_FEC_CAP BIT(5)
sys/dev/ixgbe/ixgbe_type_e610.h
1076
#define IXGBE_ACI_LINK_LP_10G_KR_FEC_REQ BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
1077
#define IXGBE_ACI_LINK_LP_25G_KR_FEC_REQ BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
1078
#define IXGBE_ACI_LINK_LP_RS_528_FEC_REQ BIT(2)
sys/dev/ixgbe/ixgbe_type_e610.h
1079
#define IXGBE_ACI_LINK_LP_KR_272_FEC_REQ BIT(3)
sys/dev/ixgbe/ixgbe_type_e610.h
1081
#define IXGBE_ACI_LINK_LP_PAUSE_ADV BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
1082
#define IXGBE_ACI_LINK_LP_ASM_DIR_ADV BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
1093
#define IXGBE_ACI_LINK_EVENT_UPDOWN BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
1094
#define IXGBE_ACI_LINK_EVENT_MEDIA_NA BIT(2)
sys/dev/ixgbe/ixgbe_type_e610.h
1095
#define IXGBE_ACI_LINK_EVENT_LINK_FAULT BIT(3)
sys/dev/ixgbe/ixgbe_type_e610.h
1096
#define IXGBE_ACI_LINK_EVENT_PHY_TEMP_ALARM BIT(4)
sys/dev/ixgbe/ixgbe_type_e610.h
1097
#define IXGBE_ACI_LINK_EVENT_EXCESSIVE_ERRORS BIT(5)
sys/dev/ixgbe/ixgbe_type_e610.h
1098
#define IXGBE_ACI_LINK_EVENT_SIGNAL_DETECT BIT(6)
sys/dev/ixgbe/ixgbe_type_e610.h
1099
#define IXGBE_ACI_LINK_EVENT_AN_COMPLETED BIT(7)
sys/dev/ixgbe/ixgbe_type_e610.h
1100
#define IXGBE_ACI_LINK_EVENT_MODULE_QUAL_FAIL BIT(8)
sys/dev/ixgbe/ixgbe_type_e610.h
1101
#define IXGBE_ACI_LINK_EVENT_PORT_TX_SUSPENDED BIT(9)
sys/dev/ixgbe/ixgbe_type_e610.h
1102
#define IXGBE_ACI_LINK_EVENT_TOPO_CONFLICT BIT(10)
sys/dev/ixgbe/ixgbe_type_e610.h
1103
#define IXGBE_ACI_LINK_EVENT_MEDIA_CONFLICT BIT(11)
sys/dev/ixgbe/ixgbe_type_e610.h
1104
#define IXGBE_ACI_LINK_EVENT_PHY_FW_LOAD_FAIL BIT(12)
sys/dev/ixgbe/ixgbe_type_e610.h
1113
#define IXGBE_ACI_LINK_TOPO_PORT_NUM_VALID BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
1148
#define IXGBE_ACI_LINK_TOPO_HANDLE_BRD_TYPE_M BIT(9)
sys/dev/ixgbe/ixgbe_type_e610.h
1149
#define IXGBE_ACI_LINK_TOPO_HANDLE_BRD_TYPE_LOM BIT(9)
sys/dev/ixgbe/ixgbe_type_e610.h
1184
#define IXGBE_ACI_I2C_ADDR_TYPE_M BIT(4)
sys/dev/ixgbe/ixgbe_type_e610.h
1189
#define IXGBE_ACI_I2C_USE_REPEATED_START BIT(7)
sys/dev/ixgbe/ixgbe_type_e610.h
1212
#define IXGBE_ACI_MDIO_CLAUSE_22 BIT(5)
sys/dev/ixgbe/ixgbe_type_e610.h
1213
#define IXGBE_ACI_MDIO_CLAUSE_45 BIT(6)
sys/dev/ixgbe/ixgbe_type_e610.h
1231
#define IXGBE_ACI_GPIO_ON BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
1242
#define IXGBE_ACI_PORT_ID_PORT_NUM_VALID BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
1244
#define IXGBE_ACI_PORT_IDENT_LED_BLINK BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
1267
#define IXGBE_ACI_SFF_PORT_NUM_VALID BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
1271
#define IXGBE_ACI_SFF_I2CBUS_TYPE_M BIT(10)
sys/dev/ixgbe/ixgbe_type_e610.h
1280
#define IXGBE_ACI_SFF_IS_WRITE BIT(15)
sys/dev/ixgbe/ixgbe_type_e610.h
131
#define E610_SR_POINTER_TYPE_BIT BIT(15)
sys/dev/ixgbe/ixgbe_type_e610.h
1319
#define IXGBE_ACI_NVM_LAST_CMD BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
1320
#define IXGBE_ACI_NVM_PCIR_REQ BIT(0) /* Used by NVM Write reply */
sys/dev/ixgbe/ixgbe_type_e610.h
1324
#define IXGBE_ACI_NVM_PRESERVE_ALL BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
1327
#define IXGBE_ACI_NVM_ACTIV_SEL_NVM BIT(3) /* Write Activate/SR Dump only */
sys/dev/ixgbe/ixgbe_type_e610.h
1328
#define IXGBE_ACI_NVM_ACTIV_SEL_OROM BIT(4)
sys/dev/ixgbe/ixgbe_type_e610.h
1329
#define IXGBE_ACI_NVM_ACTIV_SEL_NETLIST BIT(5)
sys/dev/ixgbe/ixgbe_type_e610.h
1330
#define IXGBE_ACI_NVM_SPECIAL_UPDATE BIT(6)
sys/dev/ixgbe/ixgbe_type_e610.h
1331
#define IXGBE_ACI_NVM_REVERT_LAST_ACTIV BIT(6) /* Write Activate only */
sys/dev/ixgbe/ixgbe_type_e610.h
1333
#define IXGBE_ACI_NVM_FLASH_ONLY BIT(7)
sys/dev/ixgbe/ixgbe_type_e610.h
1338
#define IXGBE_ACI_NVM_EMPR_ENA BIT(0) /* Write Activate reply only */
sys/dev/ixgbe/ixgbe_type_e610.h
1344
#define IXGBE_ACI_NVM_ACTIV_REQ_EMPR BIT(8) /* NVM Write Activate only */
sys/dev/ixgbe/ixgbe_type_e610.h
1361
#define IXGBE_ACI_NVM_EMP_SR_PTR_TYPE_M BIT(15)
sys/dev/ixgbe/ixgbe_type_e610.h
1385
#define IXGBE_ACI_NVM_MINSREV_NVM_VALID BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
1386
#define IXGBE_ACI_NVM_MINSREV_OROM_VALID BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
1398
#define IXGBE_ACI_ANVM_MULTIPLE_ELEMS BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
1399
#define IXGBE_ACI_ANVM_IMMEDIATE_FIELD BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
1400
#define IXGBE_ACI_ANVM_NEW_CFG BIT(2)
sys/dev/ixgbe/ixgbe_type_e610.h
1422
#define IXGBE_ACI_NVM_CHECKSUM_VERIFY BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
1423
#define IXGBE_ACI_NVM_CHECKSUM_RECALC BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
1436
#define IXGBE_ACI_SANITIZE_REQ_OPERATE BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
1439
#define IXGBE_ACI_SANITIZE_READ_SUBJECT_NVM_STATE BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
1442
#define IXGBE_ACI_SANITIZE_NVM_BITS_HOST_CLEAN_SUPPORT BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
1443
#define IXGBE_ACI_SANITIZE_NVM_BITS_BMC_CLEAN_SUPPORT BIT(2)
sys/dev/ixgbe/ixgbe_type_e610.h
1444
#define IXGBE_ACI_SANITIZE_NVM_STATE_HOST_CLEAN_DONE BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
1445
#define IXGBE_ACI_SANITIZE_NVM_STATE_HOST_CLEAN_SUCCESS BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
1446
#define IXGBE_ACI_SANITIZE_NVM_STATE_BMC_CLEAN_DONE BIT(2)
sys/dev/ixgbe/ixgbe_type_e610.h
1447
#define IXGBE_ACI_SANITIZE_NVM_STATE_BMC_CLEAN_SUCCESS BIT(3)
sys/dev/ixgbe/ixgbe_type_e610.h
1448
#define IXGBE_ACI_SANITIZE_OPERATE_HOST_CLEAN_DONE BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
1449
#define IXGBE_ACI_SANITIZE_OPERATE_HOST_CLEAN_SUCCESS BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
1450
#define IXGBE_ACI_SANITIZE_OPERATE_BMC_CLEAN_DONE BIT(2)
sys/dev/ixgbe/ixgbe_type_e610.h
1451
#define IXGBE_ACI_SANITIZE_OPERATE_BMC_CLEAN_SUCCESS BIT(3)
sys/dev/ixgbe/ixgbe_type_e610.h
1480
#define IXGBE_ACI_CMD_UEFI_BIOS_MODE BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
1481
#define IXGBE_ACI_RESP_RESET_NEEDED BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
1510
#define IXGBE_ACI_NODE_HANDLE_VALID BIT(10)
sys/dev/ixgbe/ixgbe_type_e610.h
1519
#define IXGBE_ACI_SET_CGU_IN_CFG_FLG1_UPDATE_FREQ BIT(6)
sys/dev/ixgbe/ixgbe_type_e610.h
1520
#define IXGBE_ACI_SET_CGU_IN_CFG_FLG1_UPDATE_DELAY BIT(7)
sys/dev/ixgbe/ixgbe_type_e610.h
1522
#define IXGBE_ACI_SET_CGU_IN_CFG_FLG2_INPUT_EN BIT(5)
sys/dev/ixgbe/ixgbe_type_e610.h
1523
#define IXGBE_ACI_SET_CGU_IN_CFG_FLG2_ESYNC_EN BIT(6)
sys/dev/ixgbe/ixgbe_type_e610.h
1537
#define IXGBE_ACI_GET_CGU_IN_CFG_STATUS_LOS BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
1538
#define IXGBE_ACI_GET_CGU_IN_CFG_STATUS_SCM_FAIL BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
1539
#define IXGBE_ACI_GET_CGU_IN_CFG_STATUS_CFM_FAIL BIT(2)
sys/dev/ixgbe/ixgbe_type_e610.h
1540
#define IXGBE_ACI_GET_CGU_IN_CFG_STATUS_GST_FAIL BIT(3)
sys/dev/ixgbe/ixgbe_type_e610.h
1541
#define IXGBE_ACI_GET_CGU_IN_CFG_STATUS_PFM_FAIL BIT(4)
sys/dev/ixgbe/ixgbe_type_e610.h
1542
#define IXGBE_ACI_GET_CGU_IN_CFG_STATUS_ESYNC_FAIL BIT(6)
sys/dev/ixgbe/ixgbe_type_e610.h
1543
#define IXGBE_ACI_GET_CGU_IN_CFG_STATUS_ESYNC_CAP BIT(7)
sys/dev/ixgbe/ixgbe_type_e610.h
1545
#define IXGBE_ACI_GET_CGU_IN_CFG_TYPE_READ_ONLY BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
1546
#define IXGBE_ACI_GET_CGU_IN_CFG_TYPE_GPS BIT(4)
sys/dev/ixgbe/ixgbe_type_e610.h
1547
#define IXGBE_ACI_GET_CGU_IN_CFG_TYPE_EXTERNAL BIT(5)
sys/dev/ixgbe/ixgbe_type_e610.h
1548
#define IXGBE_ACI_GET_CGU_IN_CFG_TYPE_PHY BIT(6)
sys/dev/ixgbe/ixgbe_type_e610.h
1550
#define IXGBE_ACI_GET_CGU_IN_CFG_FLG1_PHASE_DELAY_SUPP BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
1551
#define IXGBE_ACI_GET_CGU_IN_CFG_FLG1_1PPS_SUPP BIT(2)
sys/dev/ixgbe/ixgbe_type_e610.h
1552
#define IXGBE_ACI_GET_CGU_IN_CFG_FLG1_10MHZ_SUPP BIT(3)
sys/dev/ixgbe/ixgbe_type_e610.h
1553
#define IXGBE_ACI_GET_CGU_IN_CFG_FLG1_ANYFREQ BIT(7)
sys/dev/ixgbe/ixgbe_type_e610.h
1557
#define IXGBE_ACI_GET_CGU_IN_CFG_FLG2_INPUT_EN BIT(5)
sys/dev/ixgbe/ixgbe_type_e610.h
1558
#define IXGBE_ACI_GET_CGU_IN_CFG_FLG2_ESYNC_EN BIT(6)
sys/dev/ixgbe/ixgbe_type_e610.h
1569
#define IXGBE_ACI_SET_CGU_OUT_CFG_OUT_EN BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
1570
#define IXGBE_ACI_SET_CGU_OUT_CFG_ESYNC_EN BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
1571
#define IXGBE_ACI_SET_CGU_OUT_CFG_UPDATE_FREQ BIT(2)
sys/dev/ixgbe/ixgbe_type_e610.h
1572
#define IXGBE_ACI_SET_CGU_OUT_CFG_UPDATE_PHASE BIT(3)
sys/dev/ixgbe/ixgbe_type_e610.h
1573
#define IXGBE_ACI_SET_CGU_OUT_CFG_UPDATE_SRC_SEL BIT(4)
sys/dev/ixgbe/ixgbe_type_e610.h
1589
#define IXGBE_ACI_GET_CGU_OUT_CFG_OUT_EN BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
1590
#define IXGBE_ACI_GET_CGU_OUT_CFG_ESYNC_EN BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
1591
#define IXGBE_ACI_GET_CGU_OUT_CFG_ESYNC_ABILITY BIT(2)
sys/dev/ixgbe/ixgbe_type_e610.h
1612
#define IXGBE_ACI_GET_CGU_DPLL_STATUS_REF_SW_LOS BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
1613
#define IXGBE_ACI_GET_CGU_DPLL_STATUS_REF_SW_SCM BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
1614
#define IXGBE_ACI_GET_CGU_DPLL_STATUS_REF_SW_CFM BIT(2)
sys/dev/ixgbe/ixgbe_type_e610.h
1615
#define IXGBE_ACI_GET_CGU_DPLL_STATUS_REF_SW_GST BIT(3)
sys/dev/ixgbe/ixgbe_type_e610.h
1616
#define IXGBE_ACI_GET_CGU_DPLL_STATUS_REF_SW_PFM BIT(4)
sys/dev/ixgbe/ixgbe_type_e610.h
1617
#define IXGBE_ACI_GET_CGU_DPLL_STATUS_FAST_LOCK_EN BIT(5)
sys/dev/ixgbe/ixgbe_type_e610.h
1618
#define IXGBE_ACI_GET_CGU_DPLL_STATUS_REF_SW_ESYNC BIT(6)
sys/dev/ixgbe/ixgbe_type_e610.h
1620
#define IXGBE_ACI_GET_CGU_DPLL_STATUS_STATE_LOCK BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
1621
#define IXGBE_ACI_GET_CGU_DPLL_STATUS_STATE_HO BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
1622
#define IXGBE_ACI_GET_CGU_DPLL_STATUS_STATE_HO_READY BIT(2)
sys/dev/ixgbe/ixgbe_type_e610.h
1623
#define IXGBE_ACI_GET_CGU_DPLL_STATUS_STATE_FLHIT BIT(5)
sys/dev/ixgbe/ixgbe_type_e610.h
1624
#define IXGBE_ACI_GET_CGU_DPLL_STATUS_STATE_PSLHIT BIT(7)
sys/dev/ixgbe/ixgbe_type_e610.h
1647
#define IXGBE_ACI_SET_CGU_DPLL_CONFIG_REF_SW_LOS BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
1648
#define IXGBE_ACI_SET_CGU_DPLL_CONFIG_REF_SW_SCM BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
1649
#define IXGBE_ACI_SET_CGU_DPLL_CONFIG_REF_SW_CFM BIT(2)
sys/dev/ixgbe/ixgbe_type_e610.h
1650
#define IXGBE_ACI_SET_CGU_DPLL_CONFIG_REF_SW_GST BIT(3)
sys/dev/ixgbe/ixgbe_type_e610.h
1651
#define IXGBE_ACI_SET_CGU_DPLL_CONFIG_REF_SW_PFM BIT(4)
sys/dev/ixgbe/ixgbe_type_e610.h
1652
#define IXGBE_ACI_SET_CGU_DPLL_CONFIG_REF_FLOCK_EN BIT(5)
sys/dev/ixgbe/ixgbe_type_e610.h
1653
#define IXGBE_ACI_SET_CGU_DPLL_CONFIG_REF_SW_ESYNC BIT(6)
sys/dev/ixgbe/ixgbe_type_e610.h
1738
#define IXGBE_ACI_HEALTH_STATUS_SET_PF_SPECIFIC_MASK BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
1739
#define IXGBE_ACI_HEALTH_STATUS_SET_ALL_PF_MASK BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
1740
#define IXGBE_ACI_HEALTH_STATUS_SET_GLOBAL_MASK BIT(2)
sys/dev/ixgbe/ixgbe_type_e610.h
1889
#define IXGBE_FWLOG_OPTION_ARQ_ENA BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
1890
#define IXGBE_FWLOG_OPTION_UART_ENA BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
1894
#define IXGBE_FWLOG_OPTION_REGISTER_ON_INIT BIT(2)
sys/dev/ixgbe/ixgbe_type_e610.h
1898
#define IXGBE_FWLOG_OPTION_IS_REGISTERED BIT(3)
sys/dev/ixgbe/ixgbe_type_e610.h
1929
#define IXGBE_ACI_FW_LOG_CONF_UART_EN BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
1930
#define IXGBE_ACI_FW_LOG_CONF_AQ_EN BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
1931
#define IXGBE_ACI_FW_LOG_QUERY_REGISTERED BIT(2)
sys/dev/ixgbe/ixgbe_type_e610.h
1932
#define IXGBE_ACI_FW_LOG_CONF_SET_VALID BIT(3)
sys/dev/ixgbe/ixgbe_type_e610.h
1933
#define IXGBE_ACI_FW_LOG_AQ_REGISTER BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
1934
#define IXGBE_ACI_FW_LOG_AQ_QUERY BIT(2)
sys/dev/ixgbe/ixgbe_type_e610.h
1935
#define IXGBE_ACI_FW_LOG_PERSISTENT BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
1937
#define IXGBE_ACI_FW_LOG_MORE_DATA BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
197
#define IXGBE_SR_CTRL_WORD_OROM_BANK BIT(3)
sys/dev/ixgbe/ixgbe_type_e610.h
198
#define IXGBE_SR_CTRL_WORD_NETLIST_BANK BIT(4)
sys/dev/ixgbe/ixgbe_type_e610.h
199
#define IXGBE_SR_CTRL_WORD_NVM_BANK BIT(5)
sys/dev/ixgbe/ixgbe_type_e610.h
200
#define IXGBE_SR_NVM_PTR_4KB_UNITS BIT(15)
sys/dev/ixgbe/ixgbe_type_e610.h
2077
#define IXGBE_MGMT_MODE_PROTO_RSVD BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
2078
#define IXGBE_MGMT_MODE_PROTO_PLDM BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
2079
#define IXGBE_MGMT_MODE_PROTO_OEM BIT(2)
sys/dev/ixgbe/ixgbe_type_e610.h
2080
#define IXGBE_MGMT_MODE_PROTO_NC_SI BIT(3)
sys/dev/ixgbe/ixgbe_type_e610.h
2132
#define IXGBE_WOL_SUPPORT_M BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
2133
#define IXGBE_ACPI_PROG_MTHD_M BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
2134
#define IXGBE_PROXY_SUPPORT_M BIT(2)
sys/dev/ixgbe/ixgbe_type_e610.h
2139
#define IXGBE_EEE_SUPPORT_100BASE_TX BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
2140
#define IXGBE_EEE_SUPPORT_1000BASE_T BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
2141
#define IXGBE_EEE_SUPPORT_10GBASE_T BIT(2)
sys/dev/ixgbe/ixgbe_type_e610.h
2142
#define IXGBE_EEE_SUPPORT_5GBASE_T BIT(3)
sys/dev/ixgbe/ixgbe_type_e610.h
2143
#define IXGBE_EEE_SUPPORT_2_5GBASE_T BIT(4)
sys/dev/ixgbe/ixgbe_type_e610.h
2148
#define IXGBE_NVM_MGMT_SEC_REV_DISABLED BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
2149
#define IXGBE_NVM_MGMT_UPDATE_DISABLED BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
2150
#define IXGBE_NVM_MGMT_UNIFIED_UPD_SUPPORT BIT(3)
sys/dev/ixgbe/ixgbe_type_e610.h
2151
#define IXGBE_NVM_MGMT_NETLIST_AUTH_SUPPORT BIT(5)
sys/dev/ixgbe/ixgbe_type_e610.h
2167
#define IXGBE_EXT_TOPO_DEV_IMG_LOAD_EN BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
2169
#define IXGBE_EXT_TOPO_DEV_IMG_PROG_EN BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
225
#define GL_FWSTS_FWROWD_M BIT(8)
sys/dev/ixgbe/ixgbe_type_e610.h
227
#define GL_FWSTS_FWRI_M BIT(9)
sys/dev/ixgbe/ixgbe_type_e610.h
230
#define GL_FWSTS_EP_PF0 BIT(24)
sys/dev/ixgbe/ixgbe_type_e610.h
231
#define GL_FWSTS_EP_PF1 BIT(25)
sys/dev/ixgbe/ixgbe_type_e610.h
248
#define GL_MNG_FWSM_EEP_RELOAD_IND_M BIT(10)
sys/dev/ixgbe/ixgbe_type_e610.h
252
#define GL_MNG_FWSM_RSV2_M BIT(15)
sys/dev/ixgbe/ixgbe_type_e610.h
254
#define GL_MNG_FWSM_PCIR_AL_FAILURE_M BIT(16)
sys/dev/ixgbe/ixgbe_type_e610.h
256
#define GL_MNG_FWSM_POR_AL_FAILURE_M BIT(17)
sys/dev/ixgbe/ixgbe_type_e610.h
258
#define GL_MNG_FWSM_RSV3_M BIT(18)
sys/dev/ixgbe/ixgbe_type_e610.h
262
#define GL_MNG_FWSM_RSV4_M BIT(25)
sys/dev/ixgbe/ixgbe_type_e610.h
269
#define GL_MNG_FWSM_FW_MODES_DEBUG_M BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
270
#define GL_MNG_FWSM_FW_MODES_RECOVERY_M BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
271
#define GL_MNG_FWSM_FW_MODES_ROLLBACK_M BIT(2)
sys/dev/ixgbe/ixgbe_type_e610.h
276
#define GLNVM_GENS_NVM_PRES_M BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
280
#define GLNVM_GENS_BANK1VAL_M BIT(8)
sys/dev/ixgbe/ixgbe_type_e610.h
282
#define GLNVM_GENS_ALT_PRST_M BIT(23)
sys/dev/ixgbe/ixgbe_type_e610.h
284
#define GLNVM_GENS_FL_AUTO_RD_M BIT(25)
sys/dev/ixgbe/ixgbe_type_e610.h
289
#define GLNVM_FLA_LOCKED_M BIT(6)
sys/dev/ixgbe/ixgbe_type_e610.h
295
#define RDASB_MSGCTL_CMDV_M BIT(31)
sys/dev/ixgbe/ixgbe_type_e610.h
297
#define RDASB_RSPCTL_BAD_LENGTH_M BIT(30)
sys/dev/ixgbe/ixgbe_type_e610.h
298
#define RDASB_RSPCTL_NOT_SUCCESS_M BIT(31)
sys/dev/ixgbe/ixgbe_type_e610.h
318
#define SPISB_MSGCTL_CMDV_M BIT(31)
sys/dev/ixgbe/ixgbe_type_e610.h
320
#define SPISB_RSPCTL_BAD_LENGTH_M BIT(30)
sys/dev/ixgbe/ixgbe_type_e610.h
321
#define SPISB_RSPCTL_NOT_SUCCESS_M BIT(31)
sys/dev/ixgbe/ixgbe_type_e610.h
345
#define PF_HICR_EN BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
346
#define PF_HICR_C BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
347
#define PF_HICR_SV BIT(2)
sys/dev/ixgbe/ixgbe_type_e610.h
348
#define PF_HICR_EV BIT(3)
sys/dev/ixgbe/ixgbe_type_e610.h
358
#define GL_HICR_C BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
359
#define GL_HICR_SV BIT(2)
sys/dev/ixgbe/ixgbe_type_e610.h
360
#define GL_HICR_EV BIT(3)
sys/dev/ixgbe/ixgbe_type_e610.h
364
#define GL_HICR_EN_CHECK BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
40
#ifndef BIT
sys/dev/ixgbe/ixgbe_type_e610.h
417
#define IXGBE_ACI_FLAG_DD BIT(IXGBE_ACI_FLAG_DD_S) /* 0x1 */
sys/dev/ixgbe/ixgbe_type_e610.h
418
#define IXGBE_ACI_FLAG_CMP BIT(IXGBE_ACI_FLAG_CMP_S) /* 0x2 */
sys/dev/ixgbe/ixgbe_type_e610.h
419
#define IXGBE_ACI_FLAG_ERR BIT(IXGBE_ACI_FLAG_ERR_S) /* 0x4 */
sys/dev/ixgbe/ixgbe_type_e610.h
420
#define IXGBE_ACI_FLAG_VFE BIT(IXGBE_ACI_FLAG_VFE_S) /* 0x8 */
sys/dev/ixgbe/ixgbe_type_e610.h
421
#define IXGBE_ACI_FLAG_LB BIT(IXGBE_ACI_FLAG_LB_S) /* 0x200 */
sys/dev/ixgbe/ixgbe_type_e610.h
422
#define IXGBE_ACI_FLAG_RD BIT(IXGBE_ACI_FLAG_RD_S) /* 0x400 */
sys/dev/ixgbe/ixgbe_type_e610.h
423
#define IXGBE_ACI_FLAG_VFC BIT(IXGBE_ACI_FLAG_VFC_S) /* 0x800 */
sys/dev/ixgbe/ixgbe_type_e610.h
424
#define IXGBE_ACI_FLAG_BUF BIT(IXGBE_ACI_FLAG_BUF_S) /* 0x1000 */
sys/dev/ixgbe/ixgbe_type_e610.h
425
#define IXGBE_ACI_FLAG_SI BIT(IXGBE_ACI_FLAG_SI_S) /* 0x2000 */
sys/dev/ixgbe/ixgbe_type_e610.h
426
#define IXGBE_ACI_FLAG_EI BIT(IXGBE_ACI_FLAG_EI_S) /* 0x4000 */
sys/dev/ixgbe/ixgbe_type_e610.h
427
#define IXGBE_ACI_FLAG_FE BIT(IXGBE_ACI_FLAG_FE_S) /* 0x8000 */
sys/dev/ixgbe/ixgbe_type_e610.h
750
#define IXGBE_ACI_GET_FW_EVENT_STATUS_OBTAINED BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
751
#define IXGBE_ACI_GET_FW_EVENT_STATUS_PENDING BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
763
#define IXGBE_ACI_GET_PHY_RQM BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
774
#define IXGBE_ACI_REPORT_TOPO_CAP_MEDIA BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
775
#define IXGBE_ACI_REPORT_ACTIVE_CFG BIT(2)
sys/dev/ixgbe/ixgbe_type_e610.h
776
#define IXGBE_ACI_REPORT_DFLT_CFG BIT(3)
sys/dev/ixgbe/ixgbe_type_e610.h
822
#define IXGBE_ACI_PHY_EN_TX_LINK_PAUSE BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
823
#define IXGBE_ACI_PHY_EN_RX_LINK_PAUSE BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
824
#define IXGBE_ACI_PHY_LOW_POWER_MODE BIT(2)
sys/dev/ixgbe/ixgbe_type_e610.h
825
#define IXGBE_ACI_PHY_EN_LINK BIT(3)
sys/dev/ixgbe/ixgbe_type_e610.h
826
#define IXGBE_ACI_PHY_AN_MODE BIT(4)
sys/dev/ixgbe/ixgbe_type_e610.h
827
#define IXGBE_ACI_PHY_EN_MOD_QUAL BIT(5)
sys/dev/ixgbe/ixgbe_type_e610.h
828
#define IXGBE_ACI_PHY_EN_LESM BIT(6)
sys/dev/ixgbe/ixgbe_type_e610.h
829
#define IXGBE_ACI_PHY_EN_AUTO_FEC BIT(7)
sys/dev/ixgbe/ixgbe_type_e610.h
832
#define IXGBE_ACI_PHY_EN_D3COLD_LOW_POWER_AUTONEG BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
833
#define IXGBE_ACI_PHY_AN_EN_CLAUSE28 BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
834
#define IXGBE_ACI_PHY_AN_EN_CLAUSE73 BIT(2)
sys/dev/ixgbe/ixgbe_type_e610.h
835
#define IXGBE_ACI_PHY_AN_EN_CLAUSE37 BIT(3)
sys/dev/ixgbe/ixgbe_type_e610.h
837
#define IXGBE_ACI_PHY_EEE_EN_100BASE_TX BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
838
#define IXGBE_ACI_PHY_EEE_EN_1000BASE_T BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
839
#define IXGBE_ACI_PHY_EEE_EN_10GBASE_T BIT(2)
sys/dev/ixgbe/ixgbe_type_e610.h
840
#define IXGBE_ACI_PHY_EEE_EN_5GBASE_T BIT(11)
sys/dev/ixgbe/ixgbe_type_e610.h
841
#define IXGBE_ACI_PHY_EEE_EN_2_5GBASE_T BIT(12)
sys/dev/ixgbe/ixgbe_type_e610.h
846
#define IXGBE_ACI_PHY_FEC_10G_KR_40G_KR4_EN BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
847
#define IXGBE_ACI_PHY_FEC_10G_KR_40G_KR4_REQ BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
848
#define IXGBE_ACI_PHY_FEC_25G_RS_528_REQ BIT(2)
sys/dev/ixgbe/ixgbe_type_e610.h
849
#define IXGBE_ACI_PHY_FEC_25G_KR_REQ BIT(3)
sys/dev/ixgbe/ixgbe_type_e610.h
850
#define IXGBE_ACI_PHY_FEC_25G_RS_544_REQ BIT(4)
sys/dev/ixgbe/ixgbe_type_e610.h
851
#define IXGBE_ACI_PHY_FEC_25G_RS_CLAUSE91_EN BIT(6)
sys/dev/ixgbe/ixgbe_type_e610.h
852
#define IXGBE_ACI_PHY_FEC_25G_KR_CLAUSE74_EN BIT(7)
sys/dev/ixgbe/ixgbe_type_e610.h
855
#define IXGBE_ACI_MOD_ENFORCE_STRICT_MODE BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
862
#define IXGBE_ACI_MOD_TYPE_BYTE1_SFP_PLUS_CU_PASSIVE BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
863
#define IXGBE_ACI_MOD_TYPE_BYTE1_SFP_PLUS_CU_ACTIVE BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
864
#define IXGBE_ACI_MOD_TYPE_BYTE1_10G_BASE_SR BIT(4)
sys/dev/ixgbe/ixgbe_type_e610.h
865
#define IXGBE_ACI_MOD_TYPE_BYTE1_10G_BASE_LR BIT(5)
sys/dev/ixgbe/ixgbe_type_e610.h
866
#define IXGBE_ACI_MOD_TYPE_BYTE1_10G_BASE_LRM BIT(6)
sys/dev/ixgbe/ixgbe_type_e610.h
867
#define IXGBE_ACI_MOD_TYPE_BYTE1_10G_BASE_ER BIT(7)
sys/dev/ixgbe/ixgbe_type_e610.h
930
#define IXGBE_ACI_PHY_ENA_TX_PAUSE_ABILITY BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
931
#define IXGBE_ACI_PHY_ENA_RX_PAUSE_ABILITY BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
932
#define IXGBE_ACI_PHY_ENA_LOW_POWER BIT(2)
sys/dev/ixgbe/ixgbe_type_e610.h
933
#define IXGBE_ACI_PHY_ENA_LINK BIT(3)
sys/dev/ixgbe/ixgbe_type_e610.h
934
#define IXGBE_ACI_PHY_ENA_AUTO_LINK_UPDT BIT(5)
sys/dev/ixgbe/ixgbe_type_e610.h
935
#define IXGBE_ACI_PHY_ENA_LESM BIT(6)
sys/dev/ixgbe/ixgbe_type_e610.h
936
#define IXGBE_ACI_PHY_ENA_AUTO_FEC BIT(7)
sys/dev/ixgbe/ixgbe_type_e610.h
945
#define IXGBE_ACI_RESTART_AN_LINK_RESTART BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
946
#define IXGBE_ACI_RESTART_AN_LINK_ENABLE BIT(2)
sys/dev/ixgbe/ixgbe_type_e610.h
973
#define IXGBE_ACI_LINK_TOPO_CONFLICT BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
974
#define IXGBE_ACI_LINK_MEDIA_CONFLICT BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
975
#define IXGBE_ACI_LINK_TOPO_CORRUPT BIT(2)
sys/dev/ixgbe/ixgbe_type_e610.h
976
#define IXGBE_ACI_LINK_TOPO_UNREACH_PRT BIT(4)
sys/dev/ixgbe/ixgbe_type_e610.h
977
#define IXGBE_ACI_LINK_TOPO_UNDRUTIL_PRT BIT(5)
sys/dev/ixgbe/ixgbe_type_e610.h
978
#define IXGBE_ACI_LINK_TOPO_UNDRUTIL_MEDIA BIT(6)
sys/dev/ixgbe/ixgbe_type_e610.h
979
#define IXGBE_ACI_LINK_TOPO_UNSUPP_MEDIA BIT(7)
sys/dev/ixgbe/ixgbe_type_e610.h
981
#define IXGBE_ACI_LINK_CFG_ERR BIT(0)
sys/dev/ixgbe/ixgbe_type_e610.h
982
#define IXGBE_ACI_LINK_CFG_COMPLETED BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
983
#define IXGBE_ACI_LINK_ACT_PORT_OPT_INVAL BIT(2)
sys/dev/ixgbe/ixgbe_type_e610.h
984
#define IXGBE_ACI_LINK_FEAT_ID_OR_CONFIG_ID_INVAL BIT(3)
sys/dev/ixgbe/ixgbe_type_e610.h
985
#define IXGBE_ACI_LINK_TOPO_CRITICAL_SDP_ERR BIT(4)
sys/dev/ixgbe/ixgbe_type_e610.h
986
#define IXGBE_ACI_LINK_MODULE_POWER_UNSUPPORTED BIT(5)
sys/dev/ixgbe/ixgbe_type_e610.h
987
#define IXGBE_ACI_LINK_EXTERNAL_PHY_LOAD_FAILURE BIT(6)
sys/dev/ixgbe/ixgbe_type_e610.h
988
#define IXGBE_ACI_LINK_INVAL_MAX_POWER_LIMIT BIT(7)
sys/dev/ixgbe/ixgbe_type_e610.h
990
#define IXGBE_ACI_LINK_UP BIT(0) /* Link Status */
sys/dev/ixgbe/ixgbe_type_e610.h
991
#define IXGBE_ACI_LINK_FAULT BIT(1)
sys/dev/ixgbe/ixgbe_type_e610.h
992
#define IXGBE_ACI_LINK_FAULT_TX BIT(2)
sys/dev/ixgbe/ixgbe_type_e610.h
993
#define IXGBE_ACI_LINK_FAULT_RX BIT(3)
sys/dev/ixgbe/ixgbe_type_e610.h
994
#define IXGBE_ACI_LINK_FAULT_REMOTE BIT(4)
sys/dev/ixgbe/ixgbe_type_e610.h
995
#define IXGBE_ACI_LINK_UP_PORT BIT(5) /* External Port Link Status */
sys/dev/ixgbe/ixgbe_type_e610.h
996
#define IXGBE_ACI_MEDIA_AVAILABLE BIT(6)
sys/dev/ixgbe/ixgbe_type_e610.h
997
#define IXGBE_ACI_SIGNAL_DETECT BIT(7)
sys/dev/ixgbe/ixgbe_type_e610.h
999
#define IXGBE_ACI_AN_COMPLETED BIT(0)
sys/dev/ixl/i40e_adminq_cmd.h
2112
#define I40E_AQ_SET_FEC_ABILITY_KR BIT(0)
sys/dev/ixl/i40e_adminq_cmd.h
2113
#define I40E_AQ_SET_FEC_ABILITY_RS BIT(1)
sys/dev/ixl/i40e_adminq_cmd.h
2114
#define I40E_AQ_SET_FEC_REQUEST_KR BIT(2)
sys/dev/ixl/i40e_adminq_cmd.h
2115
#define I40E_AQ_SET_FEC_REQUEST_RS BIT(3)
sys/dev/ixl/i40e_adminq_cmd.h
2116
#define I40E_AQ_SET_FEC_AUTO BIT(4)
sys/dev/ixl/i40e_common.c
1546
#define I40E_FW_LED BIT(4)
sys/dev/ixl/i40e_common.c
1634
gpio_val |= BIT(I40E_GLGEN_GPIO_CTL_LED_BLINK_SHIFT);
sys/dev/ixl/i40e_common.c
1636
gpio_val &= ~BIT(I40E_GLGEN_GPIO_CTL_LED_BLINK_SHIFT);
sys/dev/ixl/i40e_dcb.c
1047
maxtcwilling = BIT(I40E_IEEE_ETS_WILLING_SHIFT);
sys/dev/ixl/i40e_dcb.c
1182
buf[0] = BIT(I40E_IEEE_PFC_WILLING_SHIFT);
sys/dev/ixl/i40e_dcb.c
1185
buf[0] |= BIT(I40E_IEEE_PFC_MBC_SHIFT);
sys/dev/ixl/i40e_dcb.c
413
if (app->prio_map & BIT(up))
sys/dev/ixl/i40e_dcb.h
114
#define I40E_IEEE_PFC_MBC_MASK BIT(I40E_IEEE_PFC_MBC_SHIFT)
sys/dev/ixl/i40e_dcb.h
116
#define I40E_IEEE_PFC_WILLING_MASK BIT(I40E_IEEE_PFC_WILLING_SHIFT)
sys/dev/ixl/i40e_dcb.h
91
#define I40E_IEEE_ETS_CBS_MASK BIT(I40E_IEEE_ETS_CBS_SHIFT)
sys/dev/ixl/i40e_dcb.h
93
#define I40E_IEEE_ETS_WILLING_MASK BIT(I40E_IEEE_ETS_WILLING_SHIFT)
sys/dev/ixl/i40e_hmc.h
137
BIT(I40E_PFHMC_SDDATALOW_PMSDVALID_SHIFT); \
sys/dev/ixl/i40e_lan_hmc.c
1000
mask = BIT(ce_info->width) - 1;
sys/dev/ixl/i40e_lan_hmc.c
1050
mask = BIT(ce_info->width) - 1;
sys/dev/ixl/i40e_lan_hmc.c
777
mask = (u8)(BIT(ce_info->width) - 1);
sys/dev/ixl/i40e_lan_hmc.c
818
mask = BIT(ce_info->width) - 1;
sys/dev/ixl/i40e_lan_hmc.c
868
mask = BIT(ce_info->width) - 1;
sys/dev/ixl/i40e_lan_hmc.c
962
mask = (u8)(BIT(ce_info->width) - 1);
sys/dev/ixl/i40e_nvm.c
228
BIT(I40E_GLNVM_SRCTL_START_SHIFT);
sys/dev/ixl/i40e_nvm.c
62
nvm->sr_size = BIT(sr_size) * I40E_SR_WORDS_IN_1KB;
sys/dev/ixl/i40e_type.h
1561
#define I40E_SR_CONTROL_WORD_1_NVM_BANK_VALID BIT(5)
sys/dev/ixl/i40e_type.h
1562
#define I40E_SR_NVM_MAP_STRUCTURE_TYPE BIT(12)
sys/dev/ixl/i40e_type.h
1563
#define I40E_PTR_TYPE BIT(15)
sys/dev/ixl/i40e_type.h
1565
#define I40E_SR_OCP_ENABLED BIT(15)
sys/dev/ixl/i40e_type.h
1745
#define I40E_BCM_PHY_PCS_STATUS1_RX_LPI BIT(8)
sys/dev/ixl/i40e_type.h
1746
#define I40E_BCM_PHY_PCS_STATUS1_TX_LPI BIT(9)
sys/dev/ixl/i40e_type.h
554
#define I40E_NVMUPD_FEATURE_FLAT_NVM_SUPPORT BIT(0)
sys/dev/ixl/i40e_type.h
894
#define I40E_RXD_QW1_STATUS_MASK ((BIT(I40E_RX_DESC_STATUS_LAST) - 1) << \
sys/dev/ixl/ixl_pf_main.c
137
atomic_set_32(s, BIT(bit));
sys/dev/ixl/ixl_pf_main.c
151
atomic_clear_32(s, BIT(bit));
sys/dev/ixl/ixl_pf_main.c
166
return !!(*s & BIT(bit));
sys/dev/ixl/ixl_pf_main.c
2244
I40E_GL_RXERR1L(hw->pf_id + BIT(7)),
sys/dev/ixl/ixl_pf_main.c
3280
& BIT(hw->port);
sys/dev/ixl/virtchnl.h
90
VIRTCHNL_LINK_SPEED_100MB = BIT(VIRTCHNL_LINK_SPEED_100MB_SHIFT),
sys/dev/ixl/virtchnl.h
91
VIRTCHNL_LINK_SPEED_1GB = BIT(VIRTCHNL_LINK_SPEED_1000MB_SHIFT),
sys/dev/ixl/virtchnl.h
92
VIRTCHNL_LINK_SPEED_10GB = BIT(VIRTCHNL_LINK_SPEED_10GB_SHIFT),
sys/dev/ixl/virtchnl.h
93
VIRTCHNL_LINK_SPEED_40GB = BIT(VIRTCHNL_LINK_SPEED_40GB_SHIFT),
sys/dev/ixl/virtchnl.h
94
VIRTCHNL_LINK_SPEED_20GB = BIT(VIRTCHNL_LINK_SPEED_20GB_SHIFT),
sys/dev/ixl/virtchnl.h
95
VIRTCHNL_LINK_SPEED_25GB = BIT(VIRTCHNL_LINK_SPEED_25GB_SHIFT),
sys/dev/ixl/virtchnl.h
96
VIRTCHNL_LINK_SPEED_2_5GB = BIT(VIRTCHNL_LINK_SPEED_2_5GB_SHIFT),
sys/dev/ixl/virtchnl.h
97
VIRTCHNL_LINK_SPEED_5GB = BIT(VIRTCHNL_LINK_SPEED_5GB_SHIFT),
sys/dev/liquidio/base/cn23xx_pf_regs.h
164
#define LIO_CN23XX_PKT_INPUT_CTL_MAC_NUM BIT(29)
sys/dev/liquidio/base/cn23xx_pf_regs.h
170
#define LIO_CN23XX_PKT_INPUT_CTL_IS_64B BIT(24)
sys/dev/liquidio/base/cn23xx_pf_regs.h
171
#define LIO_CN23XX_PKT_INPUT_CTL_RST BIT(23)
sys/dev/liquidio/base/cn23xx_pf_regs.h
172
#define LIO_CN23XX_PKT_INPUT_CTL_QUIET BIT(28)
sys/dev/liquidio/base/cn23xx_pf_regs.h
173
#define LIO_CN23XX_PKT_INPUT_CTL_RING_ENB BIT(22)
sys/dev/liquidio/base/cn23xx_pf_regs.h
174
#define LIO_CN23XX_PKT_INPUT_CTL_DATA_ES_64B_SWAP BIT(6)
sys/dev/liquidio/base/cn23xx_pf_regs.h
175
#define LIO_CN23XX_PKT_INPUT_CTL_USE_CSR BIT(4)
sys/dev/liquidio/base/cn23xx_pf_regs.h
267
#define LIO_CN23XX_PKT_OUTPUT_CTL_TENB BIT(13)
sys/dev/liquidio/base/cn23xx_pf_regs.h
268
#define LIO_CN23XX_PKT_OUTPUT_CTL_CENB BIT(12)
sys/dev/liquidio/base/cn23xx_pf_regs.h
269
#define LIO_CN23XX_PKT_OUTPUT_CTL_IPTR BIT(11)
sys/dev/liquidio/base/cn23xx_pf_regs.h
270
#define LIO_CN23XX_PKT_OUTPUT_CTL_ES BIT(9)
sys/dev/liquidio/base/cn23xx_pf_regs.h
271
#define LIO_CN23XX_PKT_OUTPUT_CTL_NSR BIT(8)
sys/dev/liquidio/base/cn23xx_pf_regs.h
272
#define LIO_CN23XX_PKT_OUTPUT_CTL_ROR BIT(7)
sys/dev/liquidio/base/cn23xx_pf_regs.h
273
#define LIO_CN23XX_PKT_OUTPUT_CTL_DPTR BIT(6)
sys/dev/liquidio/base/cn23xx_pf_regs.h
274
#define LIO_CN23XX_PKT_OUTPUT_CTL_BMODE BIT(5)
sys/dev/liquidio/base/cn23xx_pf_regs.h
275
#define LIO_CN23XX_PKT_OUTPUT_CTL_ES_P BIT(3)
sys/dev/liquidio/base/cn23xx_pf_regs.h
276
#define LIO_CN23XX_PKT_OUTPUT_CTL_NSR_P BIT(2)
sys/dev/liquidio/base/cn23xx_pf_regs.h
277
#define LIO_CN23XX_PKT_OUTPUT_CTL_ROR_P BIT(1)
sys/dev/liquidio/base/cn23xx_pf_regs.h
278
#define LIO_CN23XX_PKT_OUTPUT_CTL_RING_ENB BIT(0)
sys/dev/liquidio/base/cn23xx_pf_regs.h
328
#define LIO_CN23XX_INTR_MIO_INT BIT(1)
sys/dev/liquidio/base/cn23xx_pf_regs.h
329
#define LIO_CN23XX_INTR_PKT_TIME BIT(5)
sys/dev/liquidio/base/cn23xx_pf_regs.h
330
#define LIO_CN23XX_INTR_M0UPB0_ERR BIT(8)
sys/dev/liquidio/base/cn23xx_pf_regs.h
331
#define LIO_CN23XX_INTR_M0UPWI_ERR BIT(9)
sys/dev/liquidio/base/cn23xx_pf_regs.h
332
#define LIO_CN23XX_INTR_M0UNB0_ERR BIT(10)
sys/dev/liquidio/base/cn23xx_pf_regs.h
333
#define LIO_CN23XX_INTR_M0UNWI_ERR BIT(11)
sys/dev/liquidio/base/lio_config.h
431
#define LIO_DISPATCH_LIST_SIZE BIT(LIO_OPCODE_MASK_BITS)
sys/dev/mana/gdma.h
710
GDMA_ACCESS_FLAG_LOCAL_READ = BIT(0),
sys/dev/mana/gdma.h
711
GDMA_ACCESS_FLAG_LOCAL_WRITE = BIT(1),
sys/dev/mana/gdma.h
712
GDMA_ACCESS_FLAG_REMOTE_READ = BIT(2),
sys/dev/mana/gdma.h
713
GDMA_ACCESS_FLAG_REMOTE_WRITE = BIT(3),
sys/dev/mana/gdma.h
714
GDMA_ACCESS_FLAG_REMOTE_ATOMIC = BIT(4),
sys/dev/mana/gdma.h
96
GDMA_WR_OOB_IN_SGL = BIT(0),
sys/dev/mana/gdma.h
97
GDMA_WR_PAD_BY_SGE0 = BIT(1),
sys/dev/mana/mana.h
294
#define NDIS_HASH_IPV4 BIT(0)
sys/dev/mana/mana.h
295
#define NDIS_HASH_TCP_IPV4 BIT(1)
sys/dev/mana/mana.h
296
#define NDIS_HASH_UDP_IPV4 BIT(2)
sys/dev/mana/mana.h
297
#define NDIS_HASH_IPV6 BIT(3)
sys/dev/mana/mana.h
298
#define NDIS_HASH_TCP_IPV6 BIT(4)
sys/dev/mana/mana.h
299
#define NDIS_HASH_UDP_IPV6 BIT(5)
sys/dev/mana/mana.h
300
#define NDIS_HASH_IPV6_EX BIT(6)
sys/dev/mana/mana.h
301
#define NDIS_HASH_TCP_IPV6_EX BIT(7)
sys/dev/mana/mana.h
302
#define NDIS_HASH_UDP_IPV6_EX BIT(8)
sys/dev/mana/shm_channel.c
116
if (!(last_dword & BIT(31)))
sys/dev/mii/dp83822phy.c
56
#define DP83822_PHYSTS_LINK_UP BIT(0)
sys/dev/mii/dp83822phy.c
57
#define DP83822_PHYSTS_SPEED_100 BIT(1)
sys/dev/mii/dp83822phy.c
58
#define DP83822_PHYSTS_FD BIT(2)
sys/dev/mii/dp83822phy.c
61
#define DP83822_PHYSCR_INT_OE BIT(0) /* Behaviour of INT pin. */
sys/dev/mii/dp83822phy.c
62
#define DP83822_PHYSCR_INT_EN BIT(1)
sys/dev/mii/dp83822phy.c
65
#define DP83822_MISR1_AN_CMPL_EN BIT(2)
sys/dev/mii/dp83822phy.c
66
#define DP83822_MISR1_DP_CHG_EN BIT(3)
sys/dev/mii/dp83822phy.c
67
#define DP83822_MISR1_SPD_CHG_EN BIT(4)
sys/dev/mii/dp83822phy.c
68
#define DP83822_MISR1_LINK_CHG_EN BIT(5)
sys/dev/mii/dp83822phy.c
73
#define DP83822_MISR2_AN_ERR_EN BIT(6)
sys/dev/mii/dp83867phy.c
65
#define DP83867_PHYSTS_LINK_UP BIT(10)
sys/dev/mii/dp83867phy.c
66
#define DP83867_PHYSTS_ANEG_PENDING BIT(11)
sys/dev/mii/dp83867phy.c
67
#define DP83867_PHYSTS_FD BIT(13)
sys/dev/mii/dp83867phy.c
68
#define DP83867_PHYSTS_SPEED_MASK (BIT(15) | BIT(14))
sys/dev/mii/dp83867phy.c
69
#define DP83867_PHYSTS_SPEED_1000 BIT(15)
sys/dev/mii/dp83867phy.c
70
#define DP83867_PHYSTS_SPEED_100 BIT(14)
sys/dev/mii/dp83867phy.c
73
#define DP83867_MICR_AN_ERR BIT(15)
sys/dev/mii/dp83867phy.c
74
#define DP83867_MICR_SPEED_CHG BIT(14)
sys/dev/mii/dp83867phy.c
75
#define DP83867_MICR_DP_MODE_CHG BIT(13)
sys/dev/mii/dp83867phy.c
76
#define DP83867_MICR_AN_CMPL BIT(11)
sys/dev/mii/dp83867phy.c
77
#define DP83867_MICR_LINK_CHG BIT(10)
sys/dev/mii/dp83867phy.c
79
#define DP83867_CFG3_INT_OE BIT(7)
sys/dev/mii/dp83867phy.c
81
#define DP83867_CFG4_TST_MODE1 BIT(7)
sys/dev/mii/dp83867phy.c
82
#define DP83867_CFG4_ANEG_MASK (BIT(5) | BIT(6))
sys/dev/mii/vscphy.c
71
#define VSC8501_INT_MDINT BIT(15)
sys/dev/mii/vscphy.c
72
#define VSC8501_INT_SPD_CHG BIT(14)
sys/dev/mii/vscphy.c
73
#define VSC8501_INT_LINK_CHG BIT(13)
sys/dev/mii/vscphy.c
74
#define VSC8501_INT_FD_CHG BIT(12)
sys/dev/mii/vscphy.c
75
#define VSC8501_INT_AN_CMPL BIT(10)
sys/dev/mlx4/mlx4_core/mlx4.h
69
#define MLX4_QUERY_IF_STAT_RESET BIT(31)
sys/dev/mlx4/mlx4_core/mlx4_fw.c
2386
#define MLX4_ROCE_V2_UDP_DPORT BIT(3)
sys/dev/mlx4/mlx4_core/mlx4_fw.c
2387
#define MLX4_DISABLE_RX_PORT BIT(18)
sys/dev/mlx4/mlx4_core/mlx4_fw.c
2490
#define CONFIG_DISABLE_RX_PORT BIT(15)
sys/dev/mlx4/mlx4_core/mlx4_fw.c
390
#define QUERY_FUNC_CAP_SUPPORTS_VST_QINQ BIT(30)
sys/dev/mlx4/mlx4_core/mlx4_fw.c
391
#define QUERY_FUNC_CAP_SUPPORTS_NON_POWER_OF_2_NUM_EQS BIT(31)
sys/dev/mlx5/fs.h
126
FLOW_CONTEXT_HAS_TAG = BIT(0),
sys/dev/mlx5/fs.h
143
MLX5_FLOW_DEST_VPORT_VHCA_ID = BIT(0),
sys/dev/mlx5/fs.h
144
MLX5_FLOW_DEST_VPORT_REFORMAT_ID = BIT(1),
sys/dev/mlx5/fs.h
189
FLOW_ACT_NO_APPEND = BIT(0),
sys/dev/mlx5/fs.h
190
FLOW_ACT_IGNORE_FLOW_LEVEL = BIT(1),
sys/dev/mlx5/fs.h
58
MLX5_FLOW_TABLE_TUNNEL_EN_REFORMAT = BIT(0),
sys/dev/mlx5/fs.h
59
MLX5_FLOW_TABLE_TUNNEL_EN_DECAP = BIT(1),
sys/dev/mlx5/fs.h
60
MLX5_FLOW_TABLE_TERMINATION = BIT(2),
sys/dev/mlx5/fs.h
61
MLX5_FLOW_TABLE_UNMANAGED = BIT(3),
sys/dev/mlx5/fs.h
62
MLX5_FLOW_TABLE_OTHER_VPORT = BIT(4),
sys/dev/mlx5/mlx5_accel/mlx5_ipsec_fs.c
539
err = setup_modify_header(mdev, sa_entry->kspi | BIT(31), IPSEC_DIR_INBOUND,
sys/dev/mlx5/mlx5_accel/mlx5_ipsec_fs.c
90
#define NUM_IPSEC_FTE BIT(15)
sys/dev/mlx5/mlx5_core/eswitch.h
40
#define MLX5_L2_ADDR_HASH_SIZE (BIT(BITS_PER_BYTE))
sys/dev/mlx5/mlx5_core/fs_chains.h
12
MLX5_CHAINS_AND_PRIOS_SUPPORTED = BIT(0),
sys/dev/mlx5/mlx5_core/fs_chains.h
13
MLX5_CHAINS_IGNORE_FLOW_LEVEL_SUPPORTED = BIT(1),
sys/dev/mlx5/mlx5_core/fs_chains.h
14
MLX5_CHAINS_FT_TUNNEL_SUPPORTED = BIT(2),
sys/dev/mlx5/mlx5_core/fs_ft_pool.h
12
#define POOL_NEXT_SIZE BIT(30)
sys/dev/mlx5/mlx5_core/mlx5_eswitch.c
291
table_size = BIT(MLX5_CAP_ESW_FLOWTABLE_FDB(dev, log_max_ft_size)) - 2;
sys/dev/mlx5/mlx5_core/mlx5_eswitch.c
40
#define MLX5_DEBUG_ESWITCH_MASK BIT(3)
sys/dev/mlx5/mlx5_core/mlx5_eswitch.c
80
UC_ADDR_CHANGE = BIT(0),
sys/dev/mlx5/mlx5_core/mlx5_eswitch.c
81
MC_ADDR_CHANGE = BIT(1),
sys/dev/mlx5/mlx5_core/mlx5_fs_cmd.c
602
int max_list_size = BIT(MLX5_CAP_FLOWTABLE_TYPE(dev,
sys/dev/mlx5/mlx5_core/mlx5_fs_core.c
1233
#define MAX_FLOW_GROUP_SIZE BIT(24)
sys/dev/mlx5/mlx5_core/mlx5_fs_core.c
1364
static int count = BIT(MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_COUNTERS);
sys/dev/mlx5/mlx5_core/mlx5_fs_core.c
1365
static int dst = BIT(MLX5_SET_FTE_MODIFY_ENABLE_MASK_DESTINATION_LIST);
sys/dev/mlx5/mlx5_core/mlx5_fs_core.c
1438
modify_mask |= BIT(MLX5_SET_FTE_MODIFY_ENABLE_MASK_ACTION);
sys/dev/mlx5/mlx5_core/mlx5_fs_core.c
595
BIT(MLX5_SET_FTE_MODIFY_ENABLE_MASK_ACTION) |
sys/dev/mlx5/mlx5_core/mlx5_fs_core.c
596
BIT(MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_COUNTERS);
sys/dev/mlx5/mlx5_core/mlx5_fs_core.c
603
fte->modify_mask |= BIT(MLX5_SET_FTE_MODIFY_ENABLE_MASK_ACTION);
sys/dev/mlx5/mlx5_core/mlx5_fs_core.c
616
BIT(MLX5_SET_FTE_MODIFY_ENABLE_MASK_DESTINATION_LIST);
sys/dev/mlx5/mlx5_core/mlx5_fs_core.c
999
int modify_mask = BIT(MLX5_SET_FTE_MODIFY_ENABLE_MASK_DESTINATION_LIST);
sys/dev/mlx5/mlx5_core/mlx5_fs_counters.c
39
#define MLX5_SW_MAX_COUNTERS_BULK BIT(15)
sys/dev/mlx5/mlx5_core/mlx5_fs_counters.c
41
#define MLX5_FC_POOL_MAX_THRESHOLD BIT(18)
sys/dev/mlx5/mlx5_core/mlx5_fs_tcp.c
208
#define MLX5E_ACCEL_FS_TCP_GROUP1_SIZE (BIT(16) - 1)
sys/dev/mlx5/mlx5_core/mlx5_fs_tcp.c
209
#define MLX5E_ACCEL_FS_TCP_GROUP2_SIZE (BIT(0))
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
1238
#define MLX5E_MAIN_GROUP0_SIZE BIT(4)
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
1239
#define MLX5E_MAIN_GROUP1_SIZE BIT(3)
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
1240
#define MLX5E_MAIN_GROUP2_SIZE BIT(1)
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
1241
#define MLX5E_MAIN_GROUP3_SIZE BIT(0)
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
1242
#define MLX5E_MAIN_GROUP4_SIZE BIT(14)
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
1243
#define MLX5E_MAIN_GROUP5_SIZE BIT(13)
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
1244
#define MLX5E_MAIN_GROUP6_SIZE BIT(11)
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
1245
#define MLX5E_MAIN_GROUP7_SIZE BIT(2)
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
1246
#define MLX5E_MAIN_GROUP8_SIZE BIT(1)
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
1247
#define MLX5E_MAIN_GROUP9_SIZE BIT(0)
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
1418
#define MLX5E_MAIN_VXLAN_GROUP0_SIZE BIT(3)
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
1419
#define MLX5E_MAIN_VXLAN_GROUP1_SIZE BIT(3)
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
1420
#define MLX5E_MAIN_VXLAN_GROUP2_SIZE BIT(0)
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
1543
#define MLX5E_VLAN_GROUP0_SIZE BIT(12)
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
1544
#define MLX5E_VLAN_GROUP1_SIZE BIT(1)
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
1545
#define MLX5E_VLAN_GROUP2_SIZE BIT(0)
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
1945
#define MLX5E_VXLAN_GROUP0_SIZE BIT(3) /* XXXKIB */
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
1946
#define MLX5E_VXLAN_GROUP1_SIZE BIT(0)
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
1947
#define MLX5E_NUM_VXLAN_GROUPS BIT(1)
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
2049
#define MLX5E_INNER_RSS_GROUP0_SIZE BIT(3)
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
2050
#define MLX5E_INNER_RSS_GROUP1_SIZE BIT(1)
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
2051
#define MLX5E_INNER_RSS_GROUP2_SIZE BIT(0)
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
300
if (tt_vec & BIT(MLX5E_TT_ANY)) {
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
312
if (tt_vec & BIT(MLX5E_TT_IPV4)) {
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
322
if (tt_vec & BIT(MLX5E_TT_IPV6)) {
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
335
if (tt_vec & BIT(MLX5E_TT_IPV4_UDP)) {
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
345
if (tt_vec & BIT(MLX5E_TT_IPV6_UDP)) {
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
357
if (tt_vec & BIT(MLX5E_TT_IPV4_TCP)) {
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
367
if (tt_vec & BIT(MLX5E_TT_IPV6_TCP)) {
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
379
if (tt_vec & BIT(MLX5E_TT_IPV4_IPSEC_AH)) {
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
389
if (tt_vec & BIT(MLX5E_TT_IPV6_IPSEC_AH)) {
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
401
if (tt_vec & BIT(MLX5E_TT_IPV4_IPSEC_ESP)) {
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
411
if (tt_vec & BIT(MLX5E_TT_IPV6_IPSEC_ESP)) {
sys/dev/mlx5/mlx5_en/port_buffer.h
41
MLX5E_PORT_BUFFER_CABLE_LEN = BIT(0),
sys/dev/mlx5/mlx5_en/port_buffer.h
42
MLX5E_PORT_BUFFER_PFC = BIT(1),
sys/dev/mlx5/mlx5_en/port_buffer.h
43
MLX5E_PORT_BUFFER_PRIO2BUFFER = BIT(2),
sys/dev/mlx5/mlx5_en/port_buffer.h
44
MLX5E_PORT_BUFFER_SIZE = BIT(3),
sys/dev/mlx5/mlx5_fpga/cmd.h
41
MLX5_FPGA_QPC_STATE = BIT(0),
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
100
MLX5_IB_INVALID_BFREG = BIT(31),
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
99
MLX5_IB_INVALID_UAR_INDEX = BIT(31),
sys/dev/mlx5/mlx5_ib/mlx5_ib_cong.c
60
#define MLX5_IB_RP_CLAMP_TGT_RATE_ATTR BIT(1)
sys/dev/mlx5/mlx5_ib/mlx5_ib_cong.c
61
#define MLX5_IB_RP_CLAMP_TGT_RATE_ATI_ATTR BIT(2)
sys/dev/mlx5/mlx5_ib/mlx5_ib_cong.c
62
#define MLX5_IB_RP_TIME_RESET_ATTR BIT(3)
sys/dev/mlx5/mlx5_ib/mlx5_ib_cong.c
63
#define MLX5_IB_RP_BYTE_RESET_ATTR BIT(4)
sys/dev/mlx5/mlx5_ib/mlx5_ib_cong.c
64
#define MLX5_IB_RP_THRESHOLD_ATTR BIT(5)
sys/dev/mlx5/mlx5_ib/mlx5_ib_cong.c
65
#define MLX5_IB_RP_AI_RATE_ATTR BIT(7)
sys/dev/mlx5/mlx5_ib/mlx5_ib_cong.c
66
#define MLX5_IB_RP_HAI_RATE_ATTR BIT(8)
sys/dev/mlx5/mlx5_ib/mlx5_ib_cong.c
67
#define MLX5_IB_RP_MIN_DEC_FAC_ATTR BIT(9)
sys/dev/mlx5/mlx5_ib/mlx5_ib_cong.c
68
#define MLX5_IB_RP_MIN_RATE_ATTR BIT(10)
sys/dev/mlx5/mlx5_ib/mlx5_ib_cong.c
69
#define MLX5_IB_RP_RATE_TO_SET_ON_FIRST_CNP_ATTR BIT(11)
sys/dev/mlx5/mlx5_ib/mlx5_ib_cong.c
70
#define MLX5_IB_RP_DCE_TCP_G_ATTR BIT(12)
sys/dev/mlx5/mlx5_ib/mlx5_ib_cong.c
71
#define MLX5_IB_RP_DCE_TCP_RTT_ATTR BIT(13)
sys/dev/mlx5/mlx5_ib/mlx5_ib_cong.c
72
#define MLX5_IB_RP_RATE_REDUCE_MONITOR_PERIOD_ATTR BIT(14)
sys/dev/mlx5/mlx5_ib/mlx5_ib_cong.c
73
#define MLX5_IB_RP_INITIAL_ALPHA_VALUE_ATTR BIT(15)
sys/dev/mlx5/mlx5_ib/mlx5_ib_cong.c
74
#define MLX5_IB_RP_GD_ATTR BIT(16)
sys/dev/mlx5/mlx5_ib/mlx5_ib_cong.c
76
#define MLX5_IB_NP_CNP_DSCP_ATTR BIT(3)
sys/dev/mlx5/mlx5_ib/mlx5_ib_cong.c
77
#define MLX5_IB_NP_CNP_PRIO_MODE_ATTR BIT(4)
sys/dev/mlx5/mlx5_ifc.h
306
MLX5_FT_NIC_RX_2_NIC_RX_RDMA = BIT(0),
sys/dev/mlx5/mlx5_ifc.h
307
MLX5_FT_NIC_TX_RDMA_2_NIC_TX = BIT(1),
sys/dev/mlx5/mlx5_lib/aso.h
14
#define ASO_CTRL_READ_EN BIT(0)
sys/dev/mlx5/mlx5_lib/aso.h
18
#define ASO_CTRL_READ_EN BIT(0)
sys/dev/mlx5/qp.h
235
MLX5_ETH_WQE_FT_META_IPSEC = BIT(0),
sys/dev/ntb/ntb_hw/ntb_hw_amd.h
156
PMM_REG_CTL = BIT(21),
sys/dev/ntb/ntb_hw/ntb_hw_amd.h
157
SMM_REG_CTL = BIT(20),
sys/dev/ntb/ntb_hw/ntb_hw_amd.h
158
SMM_REG_ACC_PATH = BIT(18),
sys/dev/ntb/ntb_hw/ntb_hw_amd.h
159
PMM_REG_ACC_PATH = BIT(17),
sys/dev/ntb/ntb_hw/ntb_hw_amd.h
160
NTB_CLK_EN = BIT(16),
sys/dev/ntb/ntb_hw/ntb_hw_amd.h
174
AMD_SIDE_MASK = BIT(0),
sys/dev/ntb/ntb_hw/ntb_hw_amd.h
175
AMD_SIDE_READY = BIT(1),
sys/dev/ntb/ntb_hw/ntb_hw_amd.h
199
AMD_PEER_FLUSH_EVENT = BIT(0),
sys/dev/ntb/ntb_hw/ntb_hw_amd.h
200
AMD_PEER_RESET_EVENT = BIT(1),
sys/dev/ntb/ntb_hw/ntb_hw_amd.h
201
AMD_PEER_D3_EVENT = BIT(2),
sys/dev/ntb/ntb_hw/ntb_hw_amd.h
202
AMD_PEER_PMETO_EVENT = BIT(3),
sys/dev/ntb/ntb_hw/ntb_hw_amd.h
203
AMD_PEER_D0_EVENT = BIT(4),
sys/dev/ntb/ntb_hw/ntb_hw_amd.h
204
AMD_LINK_UP_EVENT = BIT(5),
sys/dev/ntb/ntb_hw/ntb_hw_amd.h
205
AMD_LINK_DOWN_EVENT = BIT(6),
sys/dev/ocs_fc/ocs_cam.h
90
#define OCS_CAM_IO_F_DMAPPED BIT(0) /* associated buffer bus_dmamap'd */
sys/dev/ocs_fc/ocs_cam.h
91
#define OCS_CAM_IO_F_ABORT_RECV BIT(1) /* received ABORT TASK */
sys/dev/ocs_fc/ocs_cam.h
92
#define OCS_CAM_IO_F_ABORT_DEV BIT(2) /* abort WQE pending */
sys/dev/ocs_fc/ocs_cam.h
93
#define OCS_CAM_IO_F_ABORT_TMF BIT(3) /* TMF response sent */
sys/dev/ocs_fc/ocs_cam.h
94
#define OCS_CAM_IO_F_ABORT_NOTIFY BIT(4) /* XPT_NOTIFY sent to CTL */
sys/dev/ocs_fc/ocs_cam.h
95
#define OCS_CAM_IO_F_ABORT_CAM BIT(5) /* received ABORT or CTIO from CAM */
sys/dev/ocs_fc/ocs_fcp.h
677
#define FCP_QUERY_TASK_SET BIT(0)
sys/dev/ocs_fc/ocs_fcp.h
678
#define FCP_ABORT_TASK_SET BIT(1)
sys/dev/ocs_fc/ocs_fcp.h
679
#define FCP_CLEAR_TASK_SET BIT(2)
sys/dev/ocs_fc/ocs_fcp.h
680
#define FCP_QUERY_ASYNCHRONOUS_EVENT BIT(3)
sys/dev/ocs_fc/ocs_fcp.h
681
#define FCP_LOGICAL_UNIT_RESET BIT(4)
sys/dev/ocs_fc/ocs_fcp.h
682
#define FCP_TARGET_RESET BIT(5)
sys/dev/ocs_fc/ocs_fcp.h
683
#define FCP_CLEAR_ACA BIT(6)
sys/dev/ocs_fc/ocs_fcp.h
706
#define FCP_RSP_LEN_VALID BIT(0)
sys/dev/ocs_fc/ocs_fcp.h
707
#define FCP_SNS_LEN_VALID BIT(1)
sys/dev/ocs_fc/ocs_fcp.h
708
#define FCP_RESID_OVER BIT(2)
sys/dev/ocs_fc/ocs_fcp.h
709
#define FCP_RESID_UNDER BIT(3)
sys/dev/ocs_fc/ocs_fcp.h
710
#define FCP_CONF_REQ BIT(4)
sys/dev/ocs_fc/ocs_fcp.h
711
#define FCP_BIDI_READ_RESID_OVER BIT(5)
sys/dev/ocs_fc/ocs_fcp.h
712
#define FCP_BIDI_READ_RESID_UNDER BIT(6)
sys/dev/ocs_fc/ocs_fcp.h
713
#define FCP_BIDI_RSP BIT(7)
sys/dev/ocs_fc/ocs_os.h
147
#ifndef BIT
sys/dev/ocs_fc/ocs_utils.c
1106
mask |= BIT(i);
sys/dev/ocs_fc/ocs_utils.c
899
#define OCS_Q_HIST_WQE_WORD_MASK_DEFAULT (BIT(4) | BIT(6) | BIT(7) | BIT(9) | BIT(12))
sys/dev/ocs_fc/ocs_utils.c
900
#define OCS_Q_HIST_TRECV_CONT_WQE_WORD_MASK (BIT(4) | BIT(5) | BIT(6) | BIT(7) | BIT(9) | BIT(12))
sys/dev/ocs_fc/ocs_utils.c
901
#define OCS_Q_HIST_IWRITE_WQE_WORD_MASK (BIT(4) | BIT(5) | BIT(6) | BIT(7) | BIT(9))
sys/dev/ocs_fc/ocs_utils.c
902
#define OCS_Q_HIST_IREAD_WQE_WORD_MASK (BIT(4) | BIT(6) | BIT(7) | BIT(9))
sys/dev/ocs_fc/ocs_utils.c
903
#define OCS_Q_HIST_ABORT_WQE_WORD_MASK (BIT(3) | BIT(7) | BIT(8) | BIT(9))
sys/dev/ocs_fc/ocs_utils.c
904
#define OCS_Q_HIST_WCQE_WORD_MASK (BIT(0) | BIT(3))
sys/dev/ocs_fc/ocs_utils.c
905
#define OCS_Q_HIST_WCQE_WORD_MASK_ERR (BIT(0) | BIT(1) | BIT(2) | BIT(3))
sys/dev/ocs_fc/ocs_utils.c
906
#define OCS_Q_HIST_CQXABT_WORD_MASK (BIT(0) | BIT(1) | BIT(2) | BIT(3))
sys/dev/ocs_fc/sli4.h
140
#define SLI4_BMBX_RDY BIT(0)
sys/dev/ocs_fc/sli4.h
141
#define SLI4_BMBX_HI BIT(1)
sys/dev/ocs_fc/sli4.h
153
#define SLI4_EQCQ_DOORBELL_CI BIT(9)
sys/dev/ocs_fc/sli4.h
154
#define SLI4_EQCQ_DOORBELL_QT BIT(10)
sys/dev/ocs_fc/sli4.h
155
#define SLI4_EQCQ_DOORBELL_ARM BIT(29)
sys/dev/ocs_fc/sli4.h
156
#define SLI4_EQCQ_DOORBELL_SE BIT(31)
sys/dev/ocs_fc/sli4.h
171
#define SLI4_SLIPORT_CONTROL_END BIT(30)
sys/dev/ocs_fc/sli4.h
173
#define SLI4_SLIPORT_CONTROL_BIG_ENDIAN BIT(30)
sys/dev/ocs_fc/sli4.h
174
#define SLI4_SLIPORT_CONTROL_IP BIT(27)
sys/dev/ocs_fc/sli4.h
175
#define SLI4_SLIPORT_CONTROL_IDIS BIT(22)
sys/dev/ocs_fc/sli4.h
176
#define SLI4_SLIPORT_CONTROL_FDD BIT(31)
sys/dev/ocs_fc/sli4.h
1826
#define SLI4_ASYNC_EVT_LINK_STATE BIT(1)
sys/dev/ocs_fc/sli4.h
1827
#define SLI4_ASYNC_EVT_FCOE_FIP BIT(2)
sys/dev/ocs_fc/sli4.h
1828
#define SLI4_ASYNC_EVT_DCBX BIT(3)
sys/dev/ocs_fc/sli4.h
1829
#define SLI4_ASYNC_EVT_ISCSI BIT(4)
sys/dev/ocs_fc/sli4.h
1830
#define SLI4_ASYNC_EVT_GRP5 BIT(5)
sys/dev/ocs_fc/sli4.h
1831
#define SLI4_ASYNC_EVT_FC BIT(16)
sys/dev/ocs_fc/sli4.h
1832
#define SLI4_ASYNC_EVT_SLI_PORT BIT(17)
sys/dev/ocs_fc/sli4.h
1833
#define SLI4_ASYNC_EVT_VF BIT(18)
sys/dev/ocs_fc/sli4.h
1834
#define SLI4_ASYNC_EVT_MR BIT(19)
sys/dev/ocs_fc/sli4.h
354
#define SLI4_PORT_SEMAPHORE_SCR2 BIT(26) /** scratch area 2 */
sys/dev/ocs_fc/sli4.h
355
#define SLI4_PORT_SEMAPHORE_SCR1 BIT(27) /** scratch area 1 */
sys/dev/ocs_fc/sli4.h
356
#define SLI4_PORT_SEMAPHORE_IPC BIT(28) /** IP conflict */
sys/dev/ocs_fc/sli4.h
357
#define SLI4_PORT_SEMAPHORE_NIP BIT(29) /** no IP address */
sys/dev/ocs_fc/sli4.h
358
#define SLI4_PORT_SEMAPHORE_SFI BIT(30) /** secondary firmware image used */
sys/dev/ocs_fc/sli4.h
359
#define SLI4_PORT_SEMAPHORE_PERR BIT(31) /** POST fatal error */
sys/dev/ocs_fc/sli4.h
372
#define SLI4_PORT_STATUS_FDP BIT(21) /** function specific dump present */
sys/dev/ocs_fc/sli4.h
373
#define SLI4_PORT_STATUS_RDY BIT(23) /** ready */
sys/dev/ocs_fc/sli4.h
374
#define SLI4_PORT_STATUS_RN BIT(24) /** reset needed */
sys/dev/ocs_fc/sli4.h
375
#define SLI4_PORT_STATUS_DIP BIT(25) /** dump present */
sys/dev/ocs_fc/sli4.h
376
#define SLI4_PORT_STATUS_OTI BIT(29) /** over temp indicator */
sys/dev/ocs_fc/sli4.h
377
#define SLI4_PORT_STATUS_END BIT(30) /** endianness */
sys/dev/ocs_fc/sli4.h
378
#define SLI4_PORT_STATUS_ERR BIT(31) /** SLI port error */
sys/dev/ocs_fc/sli4.h
385
#define SLI4_PHYDEV_CONTROL_DRST BIT(0) /** physical device reset */
sys/dev/ocs_fc/sli4.h
386
#define SLI4_PHYDEV_CONTROL_FRST BIT(1) /** firmware reset */
sys/dev/ocs_fc/sli4.h
387
#define SLI4_PHYDEV_CONTROL_DD BIT(2) /** diagnostic dump */
sys/dev/ocs_fc/sli4.h
4713
#define SLI4_IO_CONTINUATION BIT(0) /** The XRI associated with this IO is already active */
sys/dev/ocs_fc/sli4.h
4714
#define SLI4_IO_AUTO_GOOD_RESPONSE BIT(1) /** Automatically generate a good RSP frame */
sys/dev/ocs_fc/sli4.h
4715
#define SLI4_IO_NO_ABORT BIT(2)
sys/dev/ocs_fc/sli4.h
4716
#define SLI4_IO_DNRX BIT(3) /** Set the DNRX bit because no auto xref rdy buffer is posted */
sys/dev/ocs_fc/sli4.h
662
#define SLI4_INIT_LINK_F_LOOP_BACK BIT(0)
sys/dev/ocs_fc/sli4.h
663
#define SLI4_INIT_LINK_F_UNFAIR BIT(6)
sys/dev/ocs_fc/sli4.h
664
#define SLI4_INIT_LINK_F_NO_LIRP BIT(7)
sys/dev/ocs_fc/sli4.h
665
#define SLI4_INIT_LINK_F_LOOP_VALID_CHK BIT(8)
sys/dev/ocs_fc/sli4.h
666
#define SLI4_INIT_LINK_F_NO_LISA BIT(9)
sys/dev/ocs_fc/sli4.h
667
#define SLI4_INIT_LINK_F_FAIL_OVER BIT(10)
sys/dev/ocs_fc/sli4.h
668
#define SLI4_INIT_LINK_F_NO_AUTOSPEED BIT(11)
sys/dev/ocs_fc/sli4.h
669
#define SLI4_INIT_LINK_F_PICK_HI_ALPA BIT(15)
sys/dev/pms/freebsd/driver/common/lxutil.c
234
& (BIT(0) | BIT(1))) == TI_DMA_MEM) ||
sys/dev/pms/freebsd/driver/common/lxutil.c
236
& (BIT(0) | BIT(1))) == TI_CACHED_DMA_MEM)) {
sys/dev/pms/freebsd/driver/common/lxutil.c
247
& (BIT(0) | BIT(1));
sys/dev/pms/freebsd/driver/common/lxutil.c
277
(BIT(0) | BIT(1))) == TI_CACHED_MEM) {
sys/dev/pms/freebsd/driver/common/lxutil.c
309
& (BIT(0) | BIT(1))) == TI_DMA_MEM_CHIP)) {
sys/dev/pms/freebsd/driver/common/lxutil.c
394
if( (pRscInfo->tiSharedMem.tdSharedCachedMem1.type & (BIT(0) | BIT(1)))
sys/dev/pms/freebsd/driver/common/lxutil.c
430
(BIT(0) | BIT(1)))
sys/dev/pms/freebsd/driver/common/lxutil.c
517
& (BIT(0) | BIT(1))) == TI_DMA_MEM) ||
sys/dev/pms/freebsd/driver/common/lxutil.c
519
& (BIT(0) | BIT(1))) == TI_CACHED_DMA_MEM)) {
sys/dev/pms/freebsd/driver/common/lxutil.c
524
& (BIT(0) | BIT(1));
sys/dev/pms/freebsd/driver/common/lxutil.c
536
(BIT(0) | BIT(1)) ) == TI_CACHED_MEM ) {
sys/dev/pms/freebsd/driver/common/lxutil.c
566
if( (pRscInfo->tiSharedMem.tdSharedCachedMem1.type & (BIT(0) | BIT(1)))
sys/dev/pms/freebsd/driver/common/lxutil.c
573
(BIT(0) | BIT(1)))
sys/dev/pms/freebsd/driver/common/lxutil.c
639
if ((Type & (BIT(0) | BIT(1))) == TI_CACHED_MEM) {
sys/dev/pms/freebsd/driver/common/lxutil.c
669
Type & (U32)(BIT(0) | BIT(1)));
sys/dev/pms/freebsd/driver/common/ostypes.h
163
#ifndef BIT
sys/dev/qat/include/adf_dev_err.h
22
#define ADF_EMSK3_CPM0_MASK BIT(2)
sys/dev/qat/include/adf_dev_err.h
23
#define ADF_EMSK3_CPM1_MASK BIT(3)
sys/dev/qat/include/adf_dev_err.h
24
#define ADF_EMSK5_CPM2_MASK BIT(16)
sys/dev/qat/include/adf_dev_err.h
25
#define ADF_EMSK5_CPM3_MASK BIT(17)
sys/dev/qat/include/adf_dev_err.h
26
#define ADF_EMSK5_CPM4_MASK BIT(18)
sys/dev/qat/include/adf_dev_err.h
40
#define ADF_INTSTATSSM_SHANGERR BIT(13)
sys/dev/qat/include/adf_dev_err.h
47
#define ADF_SLICE_HANG_AUTH0_MASK BIT(0)
sys/dev/qat/include/adf_dev_err.h
48
#define ADF_SLICE_HANG_AUTH1_MASK BIT(1)
sys/dev/qat/include/adf_dev_err.h
49
#define ADF_SLICE_HANG_AUTH2_MASK BIT(2)
sys/dev/qat/include/adf_dev_err.h
50
#define ADF_SLICE_HANG_CPHR0_MASK BIT(4)
sys/dev/qat/include/adf_dev_err.h
51
#define ADF_SLICE_HANG_CPHR1_MASK BIT(5)
sys/dev/qat/include/adf_dev_err.h
52
#define ADF_SLICE_HANG_CPHR2_MASK BIT(6)
sys/dev/qat/include/adf_dev_err.h
53
#define ADF_SLICE_HANG_CMP0_MASK BIT(8)
sys/dev/qat/include/adf_dev_err.h
54
#define ADF_SLICE_HANG_CMP1_MASK BIT(9)
sys/dev/qat/include/adf_dev_err.h
55
#define ADF_SLICE_HANG_XLT0_MASK BIT(12)
sys/dev/qat/include/adf_dev_err.h
56
#define ADF_SLICE_HANG_XLT1_MASK BIT(13)
sys/dev/qat/include/adf_dev_err.h
57
#define ADF_SLICE_HANG_MMP0_MASK BIT(16)
sys/dev/qat/include/adf_dev_err.h
58
#define ADF_SLICE_HANG_MMP1_MASK BIT(17)
sys/dev/qat/include/adf_dev_err.h
59
#define ADF_SLICE_HANG_MMP2_MASK BIT(18)
sys/dev/qat/include/adf_dev_err.h
60
#define ADF_SLICE_HANG_MMP3_MASK BIT(19)
sys/dev/qat/include/adf_dev_err.h
61
#define ADF_SLICE_HANG_MMP4_MASK BIT(20)
sys/dev/qat/include/common/adf_accel_devices.h
64
BIT((vf_nr_)-ADF_VF2PF_SET_SIZE *ADF_VF2PF_VFNR_TO_SET( \
sys/dev/qat/include/common/adf_gen2_hw_data.h
129
#define AE2FUNCTION_MAP_VALID BIT(7)
sys/dev/qat/include/common/adf_gen2_hw_data.h
158
#define ADF_ARB_CONFIG (BIT(31) | BIT(6) | BIT(0))
sys/dev/qat/include/common/adf_gen2_hw_data.h
172
#define ADF_POWERGATE_DC BIT(23)
sys/dev/qat/include/common/adf_gen2_hw_data.h
173
#define ADF_POWERGATE_PKE BIT(24)
sys/dev/qat/include/common/adf_gen2_hw_data.h
185
#define ADF_GEN2_ENABLE_AE_ECC_ERR BIT(28)
sys/dev/qat/include/common/adf_gen2_hw_data.h
186
#define ADF_GEN2_ENABLE_AE_ECC_PARITY_CORR (BIT(24) | BIT(12))
sys/dev/qat/include/common/adf_gen2_hw_data.h
189
#define ADF_GEN2_ERRSSMSH_EN BIT(3)
sys/dev/qat/include/common/adf_gen4_hw_data.h
28
#define ADF_WQM_CSR_RPRESETCTL_RESET BIT(0)
sys/dev/qat/include/common/adf_gen4_hw_data.h
30
#define ADF_WQM_CSR_RPRESETSTS_STATUS BIT(0)
sys/dev/qat/include/common/adf_gen4_hw_data.h
35
#define ADF_WQM_CSR_RPRESETCTL_MASK (BIT(3) - 1)
sys/dev/qat/include/common/adf_gen4_hw_data.h
38
#define ADF_WQM_CSR_RPRESETSTS_MASK (BIT(0))
sys/dev/qat/include/common/adf_pfvf_msg.h
180
#define ADF_VF2PF_BLOCK_CRC_REQ_MASK BIT(9)
sys/dev/qat/include/common/adf_pfvf_msg.h
84
#define ADF_PFVF_INT BIT(0)
sys/dev/qat/include/common/adf_pfvf_msg.h
85
#define ADF_PFVF_MSGORIGIN_SYSTEM BIT(1)
sys/dev/qat/include/icp_qat_hw.h
100
ICP_ACCEL_CAPABILITIES_CHACHA_POLY = BIT(17),
sys/dev/qat/include/icp_qat_hw.h
101
ICP_ACCEL_CAPABILITIES_SM2 = BIT(18),
sys/dev/qat/include/icp_qat_hw.h
102
ICP_ACCEL_CAPABILITIES_SM3 = BIT(19),
sys/dev/qat/include/icp_qat_hw.h
103
ICP_ACCEL_CAPABILITIES_SM4 = BIT(20),
sys/dev/qat/include/icp_qat_hw.h
104
ICP_ACCEL_CAPABILITIES_INLINE = BIT(21),
sys/dev/qat/include/icp_qat_hw.h
105
ICP_ACCEL_CAPABILITIES_CNV_INTEGRITY = BIT(22),
sys/dev/qat/include/icp_qat_hw.h
106
ICP_ACCEL_CAPABILITIES_CNV_INTEGRITY64 = BIT(23),
sys/dev/qat/include/icp_qat_hw.h
107
ICP_ACCEL_CAPABILITIES_LZ4_COMPRESSION = BIT(24),
sys/dev/qat/include/icp_qat_hw.h
108
ICP_ACCEL_CAPABILITIES_LZ4S_COMPRESSION = BIT(25),
sys/dev/qat/include/icp_qat_hw.h
109
ICP_ACCEL_CAPABILITIES_AES_V2 = BIT(26),
sys/dev/qat/include/icp_qat_hw.h
110
ICP_ACCEL_CAPABILITIES_KPT2 = BIT(27),
sys/dev/qat/include/icp_qat_hw.h
83
ICP_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC = BIT(0),
sys/dev/qat/include/icp_qat_hw.h
84
ICP_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC = BIT(1),
sys/dev/qat/include/icp_qat_hw.h
85
ICP_ACCEL_CAPABILITIES_CIPHER = BIT(2),
sys/dev/qat/include/icp_qat_hw.h
86
ICP_ACCEL_CAPABILITIES_AUTHENTICATION = BIT(3),
sys/dev/qat/include/icp_qat_hw.h
87
ICP_ACCEL_CAPABILITIES_RESERVED_1 = BIT(4),
sys/dev/qat/include/icp_qat_hw.h
88
ICP_ACCEL_CAPABILITIES_COMPRESSION = BIT(5),
sys/dev/qat/include/icp_qat_hw.h
89
ICP_ACCEL_CAPABILITIES_DEPRECATED = BIT(6),
sys/dev/qat/include/icp_qat_hw.h
90
ICP_ACCEL_CAPABILITIES_RAND = BIT(7),
sys/dev/qat/include/icp_qat_hw.h
91
ICP_ACCEL_CAPABILITIES_ZUC = BIT(8),
sys/dev/qat/include/icp_qat_hw.h
92
ICP_ACCEL_CAPABILITIES_SHA3 = BIT(9),
sys/dev/qat/include/icp_qat_hw.h
93
ICP_ACCEL_CAPABILITIES_KPT = BIT(10),
sys/dev/qat/include/icp_qat_hw.h
94
ICP_ACCEL_CAPABILITIES_RL = BIT(11),
sys/dev/qat/include/icp_qat_hw.h
95
ICP_ACCEL_CAPABILITIES_HKDF = BIT(12),
sys/dev/qat/include/icp_qat_hw.h
96
ICP_ACCEL_CAPABILITIES_ECEDMONT = BIT(13),
sys/dev/qat/include/icp_qat_hw.h
97
ICP_ACCEL_CAPABILITIES_EXT_ALGCHAIN = BIT(14),
sys/dev/qat/include/icp_qat_hw.h
98
ICP_ACCEL_CAPABILITIES_SHA3_EXT = BIT(15),
sys/dev/qat/include/icp_qat_hw.h
99
ICP_ACCEL_CAPABILITIES_AESGCM_SPC = BIT(16),
sys/dev/qat/qat_common/adf_accel_engine.c
108
service_type = BIT(i);
sys/dev/qat/qat_common/adf_accel_engine.c
123
BIT(i));
sys/dev/qat/qat_common/adf_aer.c
18
#define ADF_PPAERUCM_MASK (BIT(14) | BIT(20) | BIT(22))
sys/dev/qat/qat_common/adf_gen4_hw_data.c
168
BIT(ADF_WQM_CSR_RPRESETCTL_SHIFT));
sys/dev/qat/qat_common/adf_gen4_hw_data.c
184
BIT(ADF_WQM_CSR_RPRESETSTS_SHIFT));
sys/dev/qat/qat_common/adf_transport.c
582
u32 irq_mask = BIT(num_rings_per_bank) - 1;
sys/dev/qat/qat_common/adf_vf_isr.c
241
if (int_active_bundles & BIT(i)) {
sys/dev/qat/qat_common/qat_hal.c
584
#define ESRAM_AUTO_TINIT BIT(2)
sys/dev/qat/qat_common/qat_hal.c
585
#define ESRAM_AUTO_TINIT_DONE BIT(3)
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.h
101
#define ADF_200XX_UERRSSMMMP_EN (BIT(3))
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.h
22
#define ADF_200XX_POWERGATE_PKE BIT(24)
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.h
23
#define ADF_200XX_POWERGATE_CY BIT(23)
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.h
30
#define ADF_200XX_ENABLE_AE_ECC_ERR BIT(28)
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.h
31
#define ADF_200XX_ENABLE_AE_ECC_PARITY_CORR (BIT(24) | BIT(12))
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.h
34
#define ADF_200XX_ERRSSMSH_EN BIT(3)
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.h
39
#define ADF_200XX_PPERR_EN (BIT(2))
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.h
47
#define ADF_200XX_ERRMSK0_CERR (BIT(24) | BIT(16) | BIT(8) | BIT(0))
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.h
48
#define ADF_200XX_ERRMSK1_CERR (BIT(8) | BIT(0))
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.h
52
#define ADF_200XX_ERRMSK0_UERR (BIT(25) | BIT(17) | BIT(9) | BIT(1))
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.h
53
#define ADF_200XX_ERRMSK1_UERR (BIT(9) | BIT(1))
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.h
55
(BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2) | BIT(0))
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.h
56
#define ADF_200XX_ERRMSK5_UERR (BIT(16))
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.h
65
#define ADF_200XX_RICPP_EN (BIT(2) | BIT(1) | BIT(0))
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.h
75
#define ADF_200XX_TICPP_EN (BIT(3) | BIT(2) | BIT(1) | BIT(0))
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.h
83
#define ADF_200XX_CPP_CFC_UE (BIT(1) | BIT(0))
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.h
88
(BIT(20) | BIT(19) | BIT(18) | BIT(17) | BIT(16))
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.h
94
(BIT(11) | BIT(9) | BIT(7) | BIT(5) | BIT(3) | BIT(1))
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.h
98
#define ADF_200XX_CERRSSMMMP_EN (BIT(3))
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
809
if (accel_unit[i].ae_mask & BIT(ae_num))
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
866
service_mask |= BIT(service);
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.h
108
ICP_ACCEL_4XXX_MASK_CIPHER_SLICE = BIT(0),
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.h
109
ICP_ACCEL_4XXX_MASK_AUTH_SLICE = BIT(1),
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.h
110
ICP_ACCEL_4XXX_MASK_PKE_SLICE = BIT(2),
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.h
111
ICP_ACCEL_4XXX_MASK_COMPRESS_SLICE = BIT(3),
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.h
112
ICP_ACCEL_4XXX_MASK_UCS_SLICE = BIT(4),
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.h
113
ICP_ACCEL_4XXX_MASK_EIA3_SLICE = BIT(5),
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.h
114
ICP_ACCEL_4XXX_MASK_SMX_SLICE = BIT(7),
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.h
19
#define ADF_4XXX_BAR_MASK (BIT(0) | BIT(2) | BIT(4))
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.h
60
#define ADF_4XXX_VFLNOTIFY BIT(7)
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.h
64
#define ADF_4XXX_ARB_CONFIG (BIT(31) | BIT(6) | BIT(0))
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.h
78
#define ADF_4XXX_PM_DRV_ACTIVE BIT(20)
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.h
79
#define ADF_4XXX_PM_INIT_STATE BIT(21)
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.h
81
#define ADF_4XXX_PM_SOU BIT(18)
sys/dev/qat/qat_hw/qat_4xxxvf/adf_4xxxvf_hw_data.c
237
ADF_CSR_WR(pmisc_bar_addr, ADF_4XXXIOV_VINTMSKPF2VM_OFFSET, BIT(0));
sys/dev/qat/qat_hw/qat_4xxxvf/adf_4xxxvf_hw_data.c
255
return ((v_sou & ~v_msk) & BIT(0)) ? 1 : 0;
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.h
100
#define ADF_C3XXX_UERRSSMMMP_EN (BIT(3))
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.h
22
#define ADF_C3XXX_POWERGATE_PKE BIT(24)
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.h
23
#define ADF_C3XXX_POWERGATE_CY BIT(23)
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.h
28
#define ADF_C3XXX_ENABLE_AE_ECC_ERR BIT(28)
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.h
29
#define ADF_C3XXX_ENABLE_AE_ECC_PARITY_CORR (BIT(24) | BIT(12))
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.h
32
#define ADF_C3XXX_ERRSSMSH_EN BIT(3)
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.h
37
#define ADF_C3XXX_PPERR_EN (BIT(2))
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.h
45
#define ADF_C3XXX_ERRMSK0_CERR (BIT(24) | BIT(16) | BIT(8) | BIT(0))
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.h
46
#define ADF_C3XXX_ERRMSK1_CERR (BIT(8) | BIT(0))
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.h
50
#define ADF_C3XXX_ERRMSK0_UERR (BIT(25) | BIT(17) | BIT(9) | BIT(1))
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.h
51
#define ADF_C3XXX_ERRMSK1_UERR (BIT(9) | BIT(1))
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.h
53
(BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2) | BIT(0))
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.h
54
#define ADF_C3XXX_ERRMSK5_UERR (BIT(16))
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.h
63
#define ADF_C3XXX_RICPP_EN (BIT(2) | BIT(1) | BIT(0))
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.h
73
#define ADF_C3XXX_TICPP_EN (BIT(3) | BIT(2) | BIT(1) | BIT(0))
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.h
81
#define ADF_C3XXX_CPP_CFC_UE (BIT(1) | BIT(0))
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.h
86
(BIT(20) | BIT(19) | BIT(18) | BIT(17) | BIT(16))
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.h
92
(BIT(11) | BIT(9) | BIT(7) | BIT(5) | BIT(3) | BIT(1))
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.h
96
#define ADF_C3XXX_CERRSSMMMP_EN (BIT(3))
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ae_config.c
30
if (mask & BIT(i))
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ae_config.c
43
if (au_mask == BIT(0))
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1755
ingress_msk |= BIT(j);
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
308
~BIT(13));
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
335
if (doorbell_int & BIT(i)) {
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
180
#define ADF_C4XXX_ERRSOU8_MECORR_MASK BIT(0)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
194
#define ADF_C4XXX_ME_UNCORR_ERROR BIT(0)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
195
#define ADF_C4XXX_CPP_CMD_PAR_ERR BIT(1)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
196
#define ADF_C4XXX_RI_MEM_PAR_ERR BIT(2)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
197
#define ADF_C4XXX_TI_MEM_PAR_ERR BIT(3)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
214
#define ADF_C4XXX_TI_CMD_PAR_ERR BIT(0)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
215
#define ADF_C4XXX_RI_CMD_PAR_ERR BIT(1)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
216
#define ADF_C4XXX_ICI_CMD_PAR_ERR BIT(2)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
217
#define ADF_C4XXX_ICE_CMD_PAR_ERR BIT(3)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
218
#define ADF_C4XXX_ARAM_CMD_PAR_ERR BIT(4)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
219
#define ADF_C4XXX_CFC_CMD_PAR_ERR BIT(5)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
229
#define ADF_C4XXX_RI_MEM_MSIX_TBL_INT_MASK (BIT(22))
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
248
#define ADF_C4XXX_ERRSOU10_PUSHPULL_MASK BIT(12)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
250
#define ADF_C4XXX_IASTATSSM_UERRSSMSH_MASK BIT(0)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
251
#define ADF_C4XXX_IASTATSSM_CERRSSMSH_MASK BIT(1)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
252
#define ADF_C4XXX_IASTATSSM_UERRSSMMMP0_MASK BIT(2)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
253
#define ADF_C4XXX_IASTATSSM_CERRSSMMMP0_MASK BIT(3)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
254
#define ADF_C4XXX_IASTATSSM_UERRSSMMMP1_MASK BIT(4)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
255
#define ADF_C4XXX_IASTATSSM_CERRSSMMMP1_MASK BIT(5)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
256
#define ADF_C4XXX_IASTATSSM_UERRSSMMMP2_MASK BIT(6)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
257
#define ADF_C4XXX_IASTATSSM_CERRSSMMMP2_MASK BIT(7)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
258
#define ADF_C4XXX_IASTATSSM_UERRSSMMMP3_MASK BIT(8)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
259
#define ADF_C4XXX_IASTATSSM_CERRSSMMMP3_MASK BIT(9)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
260
#define ADF_C4XXX_IASTATSSM_UERRSSMMMP4_MASK BIT(10)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
261
#define ADF_C4XXX_IASTATSSM_CERRSSMMMP4_MASK BIT(11)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
262
#define ADF_C4XXX_IASTATSSM_PPERR_MASK BIT(12)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
263
#define ADF_C4XXX_IASTATSSM_SPPPAR_ERR_MASK BIT(14)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
264
#define ADF_C4XXX_IASTATSSM_CPPPAR_ERR_MASK BIT(15)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
265
#define ADF_C4XXX_IASTATSSM_RFPAR_ERR_MASK BIT(16)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
300
#define ADF_C4XXX_EXPRPSSM_FATAL_MASK BIT(2)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
301
#define ADF_C4XXX_EXPRPSSM_SOFT_MASK BIT(3)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
303
#define ADF_C4XXX_PPERR_INTS_CLEAR_MASK BIT(0)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
32
#define ADF_C4XXX_FUSE_PROD_SKU_MASK BIT(31)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
322
#define ADF_C4XXX_ERRMSK11_ERR_DISABLE_ICI_ICE_INTR (BIT(7) | BIT(8))
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
326
#define ADF_C4XXX_TI_MISC BIT(0)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
327
#define ADF_C4XXX_RI_PUSH_PULL_PAR_ERR BIT(1)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
328
#define ADF_C4XXX_TI_PUSH_PULL_PAR_ERR BIT(2)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
329
#define ADF_C4XXX_ARAM_CORR_ERR BIT(3)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
330
#define ADF_C4XXX_ARAM_UNCORR_ERR BIT(4)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
331
#define ADF_C4XXX_TI_PULL_PAR_ERR BIT(5)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
332
#define ADF_C4XXX_RI_PUSH_PAR_ERR BIT(6)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
333
#define ADF_C4XXX_INLINE_INGRESS_INTR BIT(7)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
334
#define ADF_C4XXX_INLINE_EGRESS_INTR BIT(8)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
338
#define ADF_C4XXX_TI_MISC_ERR_MASK (BIT(0))
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
34
#define ADF_C4XXX_LEGFUSE_BASE_SKU_MASK (BIT(2) | BIT(3))
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
345
#define ADF_C4XXX_RI_CPP_INT_STS_PUSH_ERR BIT(0)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
346
#define ADF_C4XXX_RI_CPP_INT_STS_PULL_ERR BIT(1)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
347
#define ADF_C4XXX_RI_CPP_INT_STS_PUSH_DATA_PAR_ERR BIT(2)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
358
#define ADF_C4XXX_RICPP_EN (BIT(3) | BIT(2) | BIT(1) | BIT(0))
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
36
#define ADF_C4XXX_FUSE_DISABLE_INLINE_INGRESS BIT(12)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
362
#define ADF_C4XXX_TI_CPP_INT_STS_PUSH_ERR BIT(0)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
363
#define ADF_C4XXX_TI_CPP_INT_STS_PULL_ERR BIT(1)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
364
#define ADF_C4XXX_TI_CPP_INT_STS_PUSH_DATA_PAR_ERR BIT(2)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
37
#define ADF_C4XXX_FUSE_DISABLE_INLINE_EGRESS BIT(13)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
375
#define ADF_C4XXX_TICPP_EN (BIT(4) | BIT(3) | BIT(2) | BIT(1) | BIT(0))
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
385
#define ADF_C4XXX_CPP_CFC_UE (BIT(1) | BIT(0))
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
391
#define ADF_C4XXX_ARAM_CORR_ERR_MASK (BIT(0))
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
392
#define ADF_C4XXX_ARAM_UNCORR_ERR_MASK (BIT(0))
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
393
#define ADF_C4XXX_CLEAR_CSR_BIT(csr, bit_num) ((csr) &= ~(BIT(bit_num)))
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
399
#define ADF_C4XXX_ARAM_CERR (BIT(3) | BIT(26))
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
405
#define ADF_C4XXX_ARAM_UERR (BIT(3) | BIT(19))
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
413
#define ADF_C4XXX_TGT_UERR (BIT(9) | BIT(8) | BIT(7) | BIT(2))
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
420
(BIT(20) | BIT(19) | BIT(18) | BIT(17) | BIT(16))
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
432
#define ADF_C4XXX_UERRSSMMMP_INTS_CLEAR_MASK ((BIT(16) | BIT(0)))
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
433
#define ADF_C4XXX_CERRSSMMMP_INTS_CLEAR_MASK BIT(0)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
436
#define ADF_C4XXX_UERRSSMMMP_EN BIT(3)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
439
#define ADF_C4XXX_CERRSSMMMP_EN BIT(3)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
470
#define ADF_C4XXX_AE2FUNC_MAP_VALID BIT(8)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
475
#define ADF_C4XXX_GLOBAL_CLK_ENABLE_GENERIC_ICE_ENABLE BIT(4)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
476
#define ADF_C4XXX_GLOBAL_CLK_ENABLE_GENERIC_ICI_ENABLE BIT(3)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
477
#define ADF_C4XXX_GLOBAL_CLK_ENABLE_GENERIC_ARAM BIT(2)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
486
#define ADF_C4XXX_IXP_RESET_GENERIC_INLINE_INGRESS BIT(4)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
487
#define ADF_C4XXX_IXP_RESET_GENERIC_INLINE_EGRESS BIT(3)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
488
#define ADF_C4XXX_IXP_RESET_GENERIC_ARAM BIT(2)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
61
#define ADF_C4XXX_ENABLE_AE_ECC_ERR BIT(28)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
62
#define ADF_C4XXX_ENABLE_AE_ECC_PARITY_CORR (BIT(24) | BIT(12))
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
64
#define ADF_C4XXX_UERRSSMSH_INTS_CLEAR_MASK (~BIT(0) ^ BIT(16))
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
66
#define ADF_C4XXX_CERRSSMSH_INTS_CLEAR_MASK (~BIT(0))
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
67
#define ADF_C4XXX_ERRSSMSH_EN BIT(3)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.h
72
#define ADF_C4XXX_DOORBELL_INT_SRC BIT(10)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
135
#define ADF_C4XXX_BYTE_SWAP_ENABLE BIT(0)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
19
#define ADF_C4XXX_SADB_SIZE_BIT BIT(24)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
39
#define ADF_C4XXX_STATS_REQUEST_ENABLED BIT(16)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
40
#define ADF_C4XXX_STATS_REQUEST_DISABLED ~BIT(16)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
434
#define ADF_C4XXX_PARSER_UERR_INTR BIT(0)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
436
#define ADF_C4XXX_PARSER_MUL_UERR_INTR BIT(18)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
437
#define ADF_C4XXX_PARSER_DESC_UERR_INTR_ENA BIT(20)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
45
#define ADF_C4XXX_MAC_STATS_READY BIT(0)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
450
#define ADF_C4XXX_CD_RF_PAR_ERR_1_INTR (BIT(2) | BIT(3) | BIT(10) | BIT(11))
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
471
(BIT(2) | BIT(3) | BIT(6) | BIT(7) | BIT(10) | BIT(11) | BIT(14) | \
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
472
BIT(15) | BIT(18) | BIT(19) | BIT(22) | BIT(23) | BIT(26) | BIT(27) | \
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
473
BIT(30) | BIT(31))
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
477
(BIT(6) | BIT(7) | BIT(14) | BIT(15) | BIT(18) | BIT(19) | BIT(22) | \
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
478
BIT(23))
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
48
#define ADF_C4XXX_MAC_ERROR_TX_UNDERRUN BIT(6)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
481
#define ADF_C4XXX_CONGESTION_MGMT_CTPB_GLOBAL_CROSSED BIT(1)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
482
#define ADF_C4XXX_CONGESTION_MGMT_XOFF_CIRQ_OUT BIT(2)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
483
#define ADF_C4XXX_CONGESTION_MGMT_XOFF_CIRQ_IN BIT(3)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
488
#define AES128_GCM BIT(0)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
489
#define AES192_GCM BIT(1)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
49
#define ADF_C4XXX_MAC_ERROR_TX_FCS BIT(7)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
490
#define AES256_GCM BIT(2)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
491
#define AES128_CCM BIT(3)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
492
#define CHACHA20_POLY1305 BIT(4)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
496
#define CIPHER_NULL BIT(7)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
497
#define AES128_CBC BIT(8)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
498
#define AES192_CBC BIT(9)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
499
#define AES256_CBC BIT(10)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
50
#define ADF_C4XXX_MAC_ERROR_TX_DATA_CORRUPT BIT(8)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
500
#define AES128_CTR BIT(11)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
501
#define AES192_CTR BIT(12)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
502
#define AES256_CTR BIT(13)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
503
#define _3DES_CBC BIT(14)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
507
#define HMAC_MD5_96 BIT(16)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
508
#define HMAC_SHA1_96 BIT(17)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
509
#define HMAC_SHA256_128 BIT(18)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
51
#define ADF_C4XXX_MAC_ERROR_RX_OVERRUN BIT(9)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
510
#define HMAC_SHA384_192 BIT(19)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
511
#define HMAC_SHA512_256 BIT(20)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
512
#define AES_GMAC_AES_128 BIT(21)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
513
#define AES_XCBC_MAC_96 BIT(22)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
514
#define AES_CMAC_96 BIT(23)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
515
#define AUTH_NULL BIT(24)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
52
#define ADF_C4XXX_MAC_ERROR_RX_RUNT BIT(10)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
53
#define ADF_C4XXX_MAC_ERROR_RX_UNDERSIZE BIT(11)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
532
#define ADF_C4XXX_IPSEC_ESP BIT(0)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
533
#define ADF_C4XXX_IPSEC_AH BIT(1)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
534
#define ADF_C4XXX_UDP_ENCAPSULATION BIT(2)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
535
#define ADF_C4XXX_IPSEC_TUNNEL_MODE BIT(3)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
536
#define ADF_C4XXX_IPSEC_TRANSPORT_MODE BIT(4)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
537
#define ADF_C4XXX_IPSEC_EXT_SEQ_NUM BIT(5)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
54
#define ADF_C4XXX_MAC_ERROR_RX_JABBER BIT(12)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
545
#define ADF_C4XXX_DEFAULT_SA_CTRL_LOCKOUT BIT(0)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
55
#define ADF_C4XXX_MAC_ERROR_RX_OVERSIZE BIT(13)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
56
#define ADF_C4XXX_MAC_ERROR_RX_FCS BIT(14)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
569
#define ADF_C4XXX_INLINE_ENABLED BIT(0)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
57
#define ADF_C4XXX_MAC_ERROR_RX_FRAME BIT(15)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
572
#define ADF_C4XXX_INLINE_INGRESS_ENABLE BIT(0)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
573
#define ADF_C4XXX_INLINE_EGRESS_ENABLE BIT(1)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
58
#define ADF_C4XXX_MAC_ERROR_RX_CODE BIT(16)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
59
#define ADF_C4XXX_MAC_ERROR_RX_PREAMBLE BIT(17)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
60
#define ADF_C4XXX_MAC_RX_LINK_UP BIT(21)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
61
#define ADF_C4XXX_MAC_INVALID_SPEED BIT(31)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
82
#define ADF_C4XXX_ONPI_ENABLE BIT(0)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_inline.h
83
#define ADF_C4XXX_XOFF_ENABLE BIT(10)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_ras.c
733
ADF_CSR_WR(pmisc, ADF_C4XXX_TI_MISC_STS, BIT(0));
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_res_part.c
108
(BIT(partition % ADF_C4XXX_PARTS_PER_GRP));
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_res_part.c
148
if (BIT(i) & au_info->sym_ae_msk)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_res_part.c
152
if (BIT(i) & au_info->asym_ae_msk)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_res_part.c
156
if (BIT(i) & au_info->dc_ae_msk)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_res_part.c
70
(BIT(partition % ADF_C4XXX_PARTS_PER_GRP));
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_res_part.c
88
(BIT(partition % ADF_C4XXX_PARTS_PER_GRP));
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_reset.h
42
#define ADF_C4XXX_IOSFSB_RESET_EVENT BIT(0)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_reset.h
43
#define ADF_C4XXX_IOSFSB_RESET_ACK BIT(7)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_reset.h
50
#define PCIE_C4XXX_VALID_ERR_MASK (~BIT(20) ^ BIT(22))
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_reset.h
53
#define ADF_C4XXX_IOSFSB_TRIGGER BIT(0)
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_reset.h
62
#define ADF_C4XXX_IA2IOSFSB_STATUS_RTS (BIT(0) | BIT(1))
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_reset.h
63
#define ADF_C4XXX_IA2IOSFSB_STATUS_PEND BIT(6)
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.h
23
#define ADF_C62X_POWERGATE_PKE BIT(24)
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.h
24
#define ADF_C62X_POWERGATE_DC BIT(23)
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.h
29
#define ADF_C62X_ENABLE_AE_ECC_ERR BIT(28)
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.h
30
#define ADF_C62X_ENABLE_AE_ECC_PARITY_CORR (BIT(24) | BIT(12))
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.h
35
#define ADF_C62X_ERRSSMSH_EN (BIT(3))
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.h
37
#define ADF_C62X_PPERR_EN (BIT(2))
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.h
45
#define ADF_C62X_ERRMSK0_CERR (BIT(24) | BIT(16) | BIT(8) | BIT(0))
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.h
46
#define ADF_C62X_ERRMSK1_CERR (BIT(24) | BIT(16) | BIT(8) | BIT(0))
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.h
47
#define ADF_C62X_ERRMSK3_CERR (BIT(7))
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.h
48
#define ADF_C62X_ERRMSK4_CERR (BIT(8) | BIT(0))
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.h
52
#define ADF_C62X_ERRMSK0_UERR (BIT(25) | BIT(17) | BIT(9) | BIT(1))
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.h
53
#define ADF_C62X_ERRMSK1_UERR (BIT(25) | BIT(17) | BIT(9) | BIT(1))
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.h
55
(BIT(8) | BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2) | BIT(0))
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.h
56
#define ADF_C62X_ERRMSK4_UERR (BIT(9) | BIT(1))
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.h
57
#define ADF_C62X_ERRMSK5_UERR (BIT(18) | BIT(17) | BIT(16))
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.h
66
#define ADF_C62X_RICPP_EN (BIT(2) | BIT(1) | BIT(0))
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.h
77
#define ADF_C62X_TICPP_EN (BIT(4) | BIT(3) | BIT(2) | BIT(1) | BIT(0))
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.h
85
#define ADF_C62X_CPP_CFC_UE (BIT(1) | BIT(0))
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.h
106
#define ADF_DH895XCC_TGT_UERR (BIT(3) | BIT(2))
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.h
110
#define ADF_DH895XCC_MMP_PWR_UP_MSK (BIT(7) | BIT(6) | BIT(5) | BIT(4) | BIT(3))
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.h
116
(BIT(11) | BIT(9) | BIT(7) | BIT(5) | BIT(3) | BIT(1))
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.h
120
#define ADF_DH895XCC_CERRSSMMMP_EN (BIT(3))
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.h
123
#define ADF_DH895XCC_UERRSSMMMP_EN (BIT(3))
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.h
31
#define ADF_DH895XCC_ENABLE_AE_ECC_ERR BIT(28)
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.h
32
#define ADF_DH895XCC_ENABLE_AE_ECC_PARITY_CORR (BIT(24) | BIT(12))
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.h
35
#define ADF_DH895XCC_ERRSSMSH_EN BIT(3)
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.h
39
#define ADF_DH895XCC_PPERR_EN (BIT(2))
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.h
50
#define ADF_DH895XCC_ERRMSK0_CERR (BIT(24) | BIT(16) | BIT(8) | BIT(0))
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.h
51
#define ADF_DH895XCC_ERRMSK1_CERR (BIT(24) | BIT(16) | BIT(8) | BIT(0))
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.h
52
#define ADF_DH895XCC_ERRMSK3_CERR (BIT(7))
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.h
53
#define ADF_DH895XCC_ERRMSK4_CERR (BIT(24) | BIT(16) | BIT(8) | BIT(0))
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.h
57
#define ADF_DH895XCC_ERRMSK0_UERR (BIT(25) | BIT(17) | BIT(9) | BIT(1))
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.h
58
#define ADF_DH895XCC_ERRMSK1_UERR (BIT(25) | BIT(17) | BIT(9) | BIT(1))
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.h
60
(BIT(8) | BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2) | BIT(0))
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.h
61
#define ADF_DH895XCC_ERRMSK4_UERR (BIT(25) | BIT(17) | BIT(9) | BIT(1))
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.h
62
#define ADF_DH895XCC_ERRMSK5_UERR (BIT(19) | BIT(18) | BIT(17) | BIT(16))
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.h
70
#define ADF_DH895XCC_RICPP_EN (BIT(1) | BIT(0))
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.h
78
#define ADF_DH895XCC_TICPP_EN (BIT(1) | BIT(0))
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.h
86
#define ADF_DH895XCC_CPP_SHAC_UE (BIT(1) | BIT(0))
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.h
91
#define ADF_DH895XCC_ESRAM_CERR (BIT(3))
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.h
99
#define ADF_DH895XCC_ESRAM_UERR (BIT(17) | BIT(3))
sys/dev/qlnx/qlnxe/qlnx_os.c
7602
if (!(*tlvs & BIT(ECORE_IOV_VP_UPDATE_ACCEPT_PARAM)))
sys/dev/sound/pcm/feeder_matrix.c
110
#define FEEDMATRIX_CLIP_CHECK(v, BIT) do { \
sys/dev/sound/pcm/feeder_matrix.c
111
if ((v) < PCM_S##BIT##_MIN || (v) > PCM_S##BIT##_MAX) \
sys/dev/sound/pcm/feeder_rate.c
443
#define Z_DECLARE_LINEAR(SIGN, BIT, ENDIAN) \
sys/dev/sound/pcm/feeder_rate.c
445
z_feed_linear_##SIGN##BIT##ENDIAN(struct z_info *info, uint8_t *dst) \
sys/dev/sound/pcm/feeder_rate.c
455
PCM_##BIT##_BPS); \
sys/dev/sound/pcm/feeder_rate.c
456
sy = sx - (info->channels * PCM_##BIT##_BPS); \
sys/dev/sound/pcm/feeder_rate.c
461
x = pcm_sample_read(sx, AFMT_##SIGN##BIT##_##ENDIAN); \
sys/dev/sound/pcm/feeder_rate.c
462
y = pcm_sample_read(sy, AFMT_##SIGN##BIT##_##ENDIAN); \
sys/dev/sound/pcm/feeder_rate.c
463
x = Z_LINEAR_INTERPOLATE_##BIT(z, x, y); \
sys/dev/sound/pcm/feeder_rate.c
464
pcm_sample_write(dst, x, AFMT_##SIGN##BIT##_##ENDIAN); \
sys/dev/sound/pcm/feeder_rate.c
465
sx += PCM_##BIT##_BPS; \
sys/dev/sound/pcm/feeder_rate.c
466
sy += PCM_##BIT##_BPS; \
sys/dev/sound/pcm/feeder_rate.c
467
dst += PCM_##BIT##_BPS; \
sys/dev/sound/pcm/feeder_rate.c
479
#define Z_CLIP_CHECK(v, BIT) do { \
sys/dev/sound/pcm/feeder_rate.c
480
if ((v) > PCM_S##BIT##_MAX) { \
sys/dev/sound/pcm/feeder_rate.c
482
(intmax_t)(v), (intmax_t)PCM_S##BIT##_MAX); \
sys/dev/sound/pcm/feeder_rate.c
483
} else if ((v) < PCM_S##BIT##_MIN) { \
sys/dev/sound/pcm/feeder_rate.c
485
(intmax_t)(v), (intmax_t)PCM_S##BIT##_MIN); \
sys/dev/sound/pcm/feeder_rate.c
498
#define _Z_SINC_ACCUMULATE(SIGN, BIT, ENDIAN, adv) \
sys/dev/sound/pcm/feeder_rate.c
502
x = pcm_sample_read(p, AFMT_##SIGN##BIT##_##ENDIAN); \
sys/dev/sound/pcm/feeder_rate.c
503
v += Z_NORM_##BIT((intpcm64_t)x * coeff); \
sys/dev/sound/pcm/feeder_rate.c
505
p adv##= info->channels * PCM_##BIT##_BPS
sys/dev/sound/pcm/feeder_rate.c
523
#define Z_DECLARE_SINC(SIGN, BIT, ENDIAN) \
sys/dev/sound/pcm/feeder_rate.c
525
z_feed_sinc_##SIGN##BIT##ENDIAN(struct z_info *info, uint8_t *dst) \
sys/dev/sound/pcm/feeder_rate.c
536
ch = info->channels * PCM_##BIT##_BPS; \
sys/dev/sound/pcm/feeder_rate.c
540
dst -= PCM_##BIT##_BPS; \
sys/dev/sound/pcm/feeder_rate.c
541
ch -= PCM_##BIT##_BPS; \
sys/dev/sound/pcm/feeder_rate.c
546
info->channels * PCM_##BIT##_BPS) + ch; \
sys/dev/sound/pcm/feeder_rate.c
548
Z_SINC_ACCUMULATE(SIGN, BIT, ENDIAN, +); \
sys/dev/sound/pcm/feeder_rate.c
552
PCM_##BIT##_BPS) + ch; \
sys/dev/sound/pcm/feeder_rate.c
554
Z_SINC_ACCUMULATE(SIGN, BIT, ENDIAN, -); \
sys/dev/sound/pcm/feeder_rate.c
556
v = Z_SCALE_##BIT(v, info->z_scale); \
sys/dev/sound/pcm/feeder_rate.c
558
v >>= Z_COEFF_SHIFT - Z_GUARD_BIT_##BIT; \
sys/dev/sound/pcm/feeder_rate.c
559
Z_CLIP_CHECK(v, BIT); \
sys/dev/sound/pcm/feeder_rate.c
560
pcm_sample_write(dst, pcm_clamp(v, AFMT_##SIGN##BIT##_##ENDIAN),\
sys/dev/sound/pcm/feeder_rate.c
561
AFMT_##SIGN##BIT##_##ENDIAN); \
sys/dev/sound/pcm/feeder_rate.c
565
#define Z_DECLARE_SINC_POLYPHASE(SIGN, BIT, ENDIAN) \
sys/dev/sound/pcm/feeder_rate.c
567
z_feed_sinc_polyphase_##SIGN##BIT##ENDIAN(struct z_info *info, uint8_t *dst) \
sys/dev/sound/pcm/feeder_rate.c
574
ch = info->channels * PCM_##BIT##_BPS; \
sys/dev/sound/pcm/feeder_rate.c
579
dst -= PCM_##BIT##_BPS; \
sys/dev/sound/pcm/feeder_rate.c
580
ch -= PCM_##BIT##_BPS; \
sys/dev/sound/pcm/feeder_rate.c
586
x = pcm_sample_read(p, AFMT_##SIGN##BIT##_##ENDIAN); \
sys/dev/sound/pcm/feeder_rate.c
587
v += Z_NORM_##BIT((intpcm64_t)x * *z_pcoeff); \
sys/dev/sound/pcm/feeder_rate.c
589
p += info->channels * PCM_##BIT##_BPS; \
sys/dev/sound/pcm/feeder_rate.c
590
x = pcm_sample_read(p, AFMT_##SIGN##BIT##_##ENDIAN); \
sys/dev/sound/pcm/feeder_rate.c
591
v += Z_NORM_##BIT((intpcm64_t)x * *z_pcoeff); \
sys/dev/sound/pcm/feeder_rate.c
593
p += info->channels * PCM_##BIT##_BPS; \
sys/dev/sound/pcm/feeder_rate.c
596
v = Z_SCALE_##BIT(v, info->z_scale); \
sys/dev/sound/pcm/feeder_rate.c
598
v >>= Z_COEFF_SHIFT - Z_GUARD_BIT_##BIT; \
sys/dev/sound/pcm/feeder_rate.c
599
Z_CLIP_CHECK(v, BIT); \
sys/dev/sound/pcm/feeder_rate.c
600
pcm_sample_write(dst, pcm_clamp(v, AFMT_##SIGN##BIT##_##ENDIAN),\
sys/dev/sound/pcm/feeder_rate.c
601
AFMT_##SIGN##BIT##_##ENDIAN); \
sys/dev/sound/pcm/feeder_rate.c
605
#define Z_DECLARE(SIGN, BIT, ENDIAN) \
sys/dev/sound/pcm/feeder_rate.c
606
Z_DECLARE_LINEAR(SIGN, BIT, ENDIAN) \
sys/dev/sound/pcm/feeder_rate.c
607
Z_DECLARE_SINC(SIGN, BIT, ENDIAN) \
sys/dev/sound/pcm/feeder_rate.c
608
Z_DECLARE_SINC_POLYPHASE(SIGN, BIT, ENDIAN)
sys/dev/sound/pcm/feeder_rate.c
638
#define Z_RESAMPLER_ENTRY(SIGN, BIT, ENDIAN) \
sys/dev/sound/pcm/feeder_rate.c
640
AFMT_##SIGN##BIT##_##ENDIAN, \
sys/dev/sound/pcm/feeder_rate.c
643
[Z_RESAMPLER_LINEAR] = z_feed_linear_##SIGN##BIT##ENDIAN, \
sys/dev/sound/pcm/feeder_rate.c
644
[Z_RESAMPLER_SINC] = z_feed_sinc_##SIGN##BIT##ENDIAN, \
sys/dev/sound/pcm/feeder_rate.c
646
z_feed_sinc_polyphase_##SIGN##BIT##ENDIAN \
sys/dev/sound/pcm/feeder_volume.c
102
#define FEEDVOLUME_ENTRY(SIGN, BIT, ENDIAN) \
sys/dev/sound/pcm/feeder_volume.c
104
AFMT_##SIGN##BIT##_##ENDIAN, \
sys/dev/sound/pcm/feeder_volume.c
105
feed_volume_##SIGN##BIT##ENDIAN \
sys/dev/sound/pcm/feeder_volume.c
51
#define FEEDVOLUME_DECLARE(SIGN, BIT, ENDIAN) \
sys/dev/sound/pcm/feeder_volume.c
53
feed_volume_##SIGN##BIT##ENDIAN(int *vol, int *matrix, \
sys/dev/sound/pcm/feeder_volume.c
56
intpcm##BIT##_t v; \
sys/dev/sound/pcm/feeder_volume.c
60
dst += count * PCM_##BIT##_BPS * channels; \
sys/dev/sound/pcm/feeder_volume.c
64
dst -= PCM_##BIT##_BPS; \
sys/dev/sound/pcm/feeder_volume.c
67
AFMT_##SIGN##BIT##_##ENDIAN); \
sys/dev/sound/pcm/feeder_volume.c
68
v = FEEDVOLUME_CALC##BIT(x, vol[matrix[i]]); \
sys/dev/sound/pcm/feeder_volume.c
70
AFMT_##SIGN##BIT##_##ENDIAN); \
sys/dev/sound/pcm/feeder_volume.c
72
AFMT_##SIGN##BIT##_##ENDIAN); \
sys/dev/tpm/tpm_crb.c
54
#define TPM_LOC_STATE_ESTB BIT(0)
sys/dev/tpm/tpm_crb.c
55
#define TPM_LOC_STATE_ASSIGNED BIT(1)
sys/dev/tpm/tpm_crb.c
57
#define TPM_LOC_STATE_VALID BIT(7)
sys/dev/tpm/tpm_crb.c
62
#define TPM_LOC_CTRL_REQUEST BIT(0)
sys/dev/tpm/tpm_crb.c
63
#define TPM_LOC_CTRL_RELINQUISH BIT(1)
sys/dev/tpm/tpm_crb.c
65
#define TPM_CRB_CTRL_REQ_GO_READY BIT(0)
sys/dev/tpm/tpm_crb.c
66
#define TPM_CRB_CTRL_REQ_GO_IDLE BIT(1)
sys/dev/tpm/tpm_crb.c
68
#define TPM_CRB_CTRL_STS_ERR_BIT BIT(0)
sys/dev/tpm/tpm_crb.c
69
#define TPM_CRB_CTRL_STS_IDLE_BIT BIT(1)
sys/dev/tpm/tpm_crb.c
74
#define TPM_CRB_CTRL_START_CMD BIT(0)
sys/dev/tpm/tpm_crb.c
76
#define TPM_CRB_INT_ENABLE_BIT BIT(31)
sys/dev/tpm/tpm_tis_core.c
48
#define TPM_ACCESS_LOC_REQ BIT(1)
sys/dev/tpm/tpm_tis_core.c
49
#define TPM_ACCESS_LOC_Seize BIT(3)
sys/dev/tpm/tpm_tis_core.c
50
#define TPM_ACCESS_LOC_ACTIVE BIT(5)
sys/dev/tpm/tpm_tis_core.c
51
#define TPM_ACCESS_LOC_RELINQUISH BIT(5)
sys/dev/tpm/tpm_tis_core.c
52
#define TPM_ACCESS_VALID BIT(7)
sys/dev/tpm/tpm_tis_core.c
54
#define TPM_INT_ENABLE_GLOBAL_ENABLE BIT(31)
sys/dev/tpm/tpm_tis_core.c
55
#define TPM_INT_ENABLE_CMD_RDY BIT(7)
sys/dev/tpm/tpm_tis_core.c
56
#define TPM_INT_ENABLE_LOC_CHANGE BIT(2)
sys/dev/tpm/tpm_tis_core.c
57
#define TPM_INT_ENABLE_STS_VALID BIT(1)
sys/dev/tpm/tpm_tis_core.c
58
#define TPM_INT_ENABLE_DATA_AVAIL BIT(0)
sys/dev/tpm/tpm_tis_core.c
60
#define TPM_INT_STS_CMD_RDY BIT(7)
sys/dev/tpm/tpm_tis_core.c
61
#define TPM_INT_STS_LOC_CHANGE BIT(2)
sys/dev/tpm/tpm_tis_core.c
62
#define TPM_INT_STS_VALID BIT(1)
sys/dev/tpm/tpm_tis_core.c
63
#define TPM_INT_STS_DATA_AVAIL BIT(0)
sys/dev/tpm/tpm_tis_core.c
68
#define TPM_STS_VALID BIT(7)
sys/dev/tpm/tpm_tis_core.c
69
#define TPM_STS_CMD_RDY BIT(6)
sys/dev/tpm/tpm_tis_core.c
70
#define TPM_STS_CMD_START BIT(5)
sys/dev/tpm/tpm_tis_core.c
71
#define TPM_STS_DATA_AVAIL BIT(4)
sys/dev/tpm/tpm_tis_core.c
72
#define TPM_STS_DATA_EXPECTED BIT(3)
sys/gdb/gdb_main.c
253
*feat |= BIT(i);
sys/libkern/strcspn.c
61
bit = BIT(*charset);
sys/libkern/strcspn.c
67
bit = BIT(*s1);
sys/libkern/strspn.c
60
bit = BIT(*charset);
sys/libkern/strspn.c
66
bit = BIT(*s1);
sys/net80211/ieee80211_crypto_gcm.c
132
if (x[i] & BIT(7 - j)) {
sys/ofed/drivers/infiniband/core/ib_cache.c
697
gid_type_mask &= ~BIT(IB_GID_TYPE_ROCE_UDP_ENCAP);
sys/ofed/drivers/infiniband/core/ib_cma.c
4227
if (rec.join_state == BIT(SENDONLY_FULLMEMBER_JOIN)) {
sys/ofed/drivers/infiniband/core/ib_cma.c
4316
send_only = mc->join_state == BIT(SENDONLY_FULLMEMBER_JOIN);
sys/ofed/drivers/infiniband/core/ib_ucma.c
1356
join_state = BIT(FULLMEMBER_JOIN);
sys/ofed/drivers/infiniband/core/ib_ucma.c
1358
join_state = BIT(SENDONLY_FULLMEMBER_JOIN);
sys/ofed/drivers/infiniband/core/ib_uverbs_cmd.c
2789
if ((ntohl(ib_spec->ipv6.mask.flow_label)) >= BIT(20) ||
sys/ofed/drivers/infiniband/core/ib_uverbs_cmd.c
2790
(ntohl(ib_spec->ipv6.val.flow_label)) >= BIT(20))
sys/ofed/drivers/infiniband/core/ib_uverbs_cmd.c
2816
if ((ntohl(ib_spec->tunnel.mask.tunnel_id)) >= BIT(24) ||
sys/ofed/drivers/infiniband/core/ib_uverbs_cmd.c
2817
(ntohl(ib_spec->tunnel.val.tunnel_id)) >= BIT(24))
sys/ofed/include/rdma/ib_hdrs.h
66
#define IB_BTH_REQ_ACK BIT(31)
sys/ofed/include/rdma/ib_hdrs.h
67
#define IB_BTH_SOLICITED BIT(23)
sys/ofed/include/rdma/ib_hdrs.h
68
#define IB_BTH_MIG_REQ BIT(22)
sys/ofed/include/rdma/ib_sa.h
111
#define IB_SA_CAP_MASK2_SENDONLY_FULL_MEM_SUPPORT BIT(12)
sys/ofed/include/rdma/ib_verbs.h
2991
RDMA_CREATE_AH_SLEEPABLE = BIT(0),
sys/ofed/include/rdma/ib_verbs.h
3072
RDMA_DESTROY_AH_SLEEPABLE = BIT(0),
sys/ofed/include/rdma/rdmavt_qp.h
391
#define RVT_QPN_MAX BIT(24)
tools/tools/net80211/w00t/libw00t/w00t.c
208
if (present & BIT(IEEE80211_RADIOTAP_FLAGS)) {
tools/tools/net80211/w00t/libw00t/w00t.c
209
if (present & BIT(IEEE80211_RADIOTAP_TSFT))
tools/tools/net80211/wesside/wesside/wesside.c
2331
if (present & BIT(IEEE80211_RADIOTAP_FLAGS)) {
tools/tools/net80211/wesside/wesside/wesside.c
2332
if (present & BIT(IEEE80211_RADIOTAP_TSFT))
tools/tools/net80211/wlaninject/wlaninject.c
490
if (present & BIT(IEEE80211_RADIOTAP_FLAGS)) {
tools/tools/net80211/wlaninject/wlaninject.c
491
if (present & BIT(IEEE80211_RADIOTAP_TSFT))
usr.bin/lastcomm/lastcomm.c
215
BIT(ASU, 'S');
usr.bin/lastcomm/lastcomm.c
216
BIT(AFORK, 'F');
usr.bin/lastcomm/lastcomm.c
217
BIT(ACOMPAT, 'C');
usr.bin/lastcomm/lastcomm.c
218
BIT(ACORE, 'D');
usr.bin/lastcomm/lastcomm.c
219
BIT(AXSIG, 'X');
usr.bin/systat/convtbl.c
65
[SC_BIT] = { BIT, BITS, "b", "bit" },
usr.bin/systat/convtbl.c
66
[SC_KILOBIT] = { BIT, KILOBIT, "Kb", "kbit" },
usr.bin/systat/convtbl.c
67
[SC_MEGABIT] = { BIT, MEGABIT, "Mb", "mbit" },
usr.bin/systat/convtbl.c
68
[SC_GIGABIT] = { BIT, GIGABIT, "Gb", "gbit" },
usr.bin/systat/convtbl.c
69
[SC_TERABIT] = { BIT, TERABIT, "Tb", "tbit" },