SDHCI_INT_DATA_END
} else if ((reg & SDHCI_INT_DATA_END) != 0) {
#define DATA_XFER_MASK (DATA_PENDING_MASK | SDHCI_INT_DATA_END)
~(SDHCI_INT_ERROR|SDHCI_INT_DATA_AVAIL|SDHCI_INT_DATA_END);
sc->sdhci_int_status |= SDHCI_INT_DATA_END;
sc->sdhci_int_status &= ~SDHCI_INT_DATA_END;
sc->r1bfix_intmask |= SDHCI_INT_DATA_END;
intmask = RD4(sc, SDHCI_INT_STATUS) & SDHCI_INT_DATA_END;
if (intmask & SDHCI_INT_DATA_END) {
SDHCI_INT_DMA_END | SDHCI_INT_DATA_END | SDHCI_INT_RESPONSE |
#define SDHCI_INT_DATA_MASK (SDHCI_INT_DATA_END | SDHCI_INT_DMA_END | \