SDHCI_CLOCK_CONTROL
case SDHCI_CLOCK_CONTROL:
case SDHCI_CLOCK_CONTROL:
if (off == SDHCI_CLOCK_CONTROL) {
val32 = RD4(sc, SDHCI_CLOCK_CONTROL);
if (off == SDHCI_CLOCK_CONTROL) {
val32 = RD4(sc, SDHCI_CLOCK_CONTROL);
WR4(sc, SDHCI_CLOCK_CONTROL, val32);
if (off == SDHCI_CLOCK_CONTROL) {
if (off == SDHCI_CLOCK_CONTROL) {
val32 = RD4(sc, SDHCI_CLOCK_CONTROL);
WR4(sc, SDHCI_CLOCK_CONTROL, val32 & ~SDHC_CLK_SDCLKEN);
WR4(sc, SDHCI_CLOCK_CONTROL, val32);
RD1(slot, SDHCI_WAKE_UP_CONTROL), RD2(slot, SDHCI_CLOCK_CONTROL));
clk = RD2(slot, SDHCI_CLOCK_CONTROL);
WR2(slot, SDHCI_CLOCK_CONTROL, clk & ~SDHCI_CLOCK_CARD_EN);
WR2(slot, SDHCI_CLOCK_CONTROL, clk);
WR2(slot, SDHCI_CLOCK_CONTROL, clk);
while (!((clk = RD2(slot, SDHCI_CLOCK_CONTROL))
WR2(slot, SDHCI_CLOCK_CONTROL, clk);
val32 = RD4(sc, SDHCI_CLOCK_CONTROL);
WR4(sc, SDHCI_CLOCK_CONTROL, val32 & ~SDHCI_FSL_CLK_SDCLKEN);
WR4(sc, SDHCI_CLOCK_CONTROL, val32);
case SDHCI_CLOCK_CONTROL:
case SDHCI_CLOCK_CONTROL:
val = RD4(sc, SDHCI_CLOCK_CONTROL);
WR4(sc, SDHCI_CLOCK_CONTROL, val & ~SDHCI_FSL_CLK_SDCLKEN);
reg = bus_read_4(sc->mem_res, SDHCI_CLOCK_CONTROL);
bus_write_4(sc->mem_res, SDHCI_CLOCK_CONTROL, reg);
reg = bus_read_4(sc->mem_res, SDHCI_CLOCK_CONTROL);
bus_write_4(sc->mem_res, SDHCI_CLOCK_CONTROL, reg);