S32
HH ( d, a, b, c, in[ 8], S32, 2272392833UL); /* 34 */
HH ( d, a, b, c, in[ 4], S32, 1272893353UL); /* 38 */
HH ( d, a, b, c, in[ 0], S32, 3936430074UL); /* 42 */
HH ( d, a, b, c, in[12], S32, 3873151461UL); /* 46 */
#define Sigma0_256(x) (S32(2, (x)) ^ S32(13, (x)) ^ S32(22, (x)))
#define Sigma1_256(x) (S32(6, (x)) ^ S32(11, (x)) ^ S32(25, (x)))
#define sigma0_256(x) (S32(7, (x)) ^ S32(18, (x)) ^ R(3 , (x)))
#define sigma1_256(x) (S32(17, (x)) ^ S32(19, (x)) ^ R(10, (x)))
HH ( d, a, b, c, in[ 8], S32, UL(2272392833)); /* 34 */
HH ( d, a, b, c, in[ 4], S32, UL(1272893353)); /* 38 */
HH ( d, a, b, c, in[ 0], S32, UL(3936430074)); /* 42 */
HH ( d, a, b, c, in[12], S32, UL(3873151461)); /* 46 */
HH (d, a, b, c, x[ 8], S32); /* 34 */
HH (d, a, b, c, x[10], S32); /* 38 */
HH (d, a, b, c, x[ 9], S32); /* 42 */
HH (d, a, b, c, x[11], S32); /* 46 */
S32 sci_sas_address_compare(
S32 High;
typedef S32 *PS32;
S32 High;
typedef S32 *PS32;
S32 High;
typedef S32 *PS32;
S32 High;
typedef S32 *PS32;
bit32 S32[2];
SA_DBG4(("siDisableMSIX_V_Interrupts: VI %d U 0x%08X L 0x%08X\n",interruptVectorIndex,u64.S32[1],u64.S32[0]));
ossaHwRegWriteExt(agRoot, PCIBAR0,V_Outbound_Doorbell_Mask_Set_RegisterU,u64.S32[1]);
ossaHwRegWriteExt(agRoot, PCIBAR0,V_Outbound_Doorbell_Mask_Set_Register, u64.S32[0]);
SA_DBG4(("siDisableLegacy_V_Interrupts: VI %d U 0x%08X L 0x%08X\n",interruptVectorIndex,u64.S32[1],u64.S32[0]));
ossaHwRegWriteExt(agRoot, PCIBAR0,V_Outbound_Doorbell_Mask_Set_Register,u64.S32[1] );
ossaHwRegWriteExt(agRoot, PCIBAR0,V_Outbound_Doorbell_Mask_Set_RegisterU,u64.S32[0]);
SA_DBG4(("siReenableMSIX_V_Interrupts: VI %d U 0x%08X L 0x%08X\n",interruptVectorIndex,u64.S32[1],u64.S32[0]));
ossaHwRegWriteExt(agRoot, PCIBAR0,V_Outbound_Doorbell_Mask_Clear_RegisterU,u64.S32[1] );
ossaHwRegWriteExt(agRoot, PCIBAR0,V_Outbound_Doorbell_Mask_Clear_Register,u64.S32[0]);
S32 cardNameIndex; /* structure index */
S32 cardNameIndex;
void agtiapi_Setup(S08 *, S32 *);
S32 ag_encryption_enable = 0;
S32 i = milisec/msecsPerTick;