AW_CLK_M
case AW_CLK_M:
{ .type = AW_CLK_M, .clk.m = &spdif_clk},
{ .type = AW_CLK_M, .clk.m = &dram_clk},
{ .type = AW_CLK_M, .clk.m = &de_clk},
{ .type = AW_CLK_M, .clk.m = &tcon1_clk},
{ .type = AW_CLK_M, .clk.m = &deinterlace_clk},
{ .type = AW_CLK_M, .clk.m = &csi_sclk_clk},
{ .type = AW_CLK_M, .clk.m = &csi_mclk_clk},
{ .type = AW_CLK_M, .clk.m = &ve_clk},
{ .type = AW_CLK_M, .clk.m = &hdmi_clk},
{ .type = AW_CLK_M, .clk.m = &mbus_clk},
{ .type = AW_CLK_M, .clk.m = &gpu_clk},
{ .type = AW_CLK_M, .clk.m = &usb_ohci0_clk },
{ .type = AW_CLK_M, .clk.m = &usb_ohci1_clk },
{ .type = AW_CLK_M, .clk.m = &dsi_clk },
{ .type = AW_CLK_M, .clk.m = &tvd_clk },
{ .type = AW_CLK_M, .clk.m = &csi_top_clk },
{ .type = AW_CLK_M, .clk.m = &csi_mclk },
{ .type = AW_CLK_M, .clk.m = &tpadc_clk },
{ .type = AW_CLK_M, .clk.m = &dsp_clk },
{ .type = AW_CLK_M, .clk.m = &riscv_clk },
{ .type = AW_CLK_M, .clk.m = &pll_periph0_2x_clk },
{ .type = AW_CLK_M, .clk.m = &pll_periph0_800m_clk },
{ .type = AW_CLK_M, .clk.m = &pll_video0_4x_clk },
{ .type = AW_CLK_M, .clk.m = &pll_video1_4x_clk },
{ .type = AW_CLK_M, .clk.m = &pll_audio1_div2_clk },
{ .type = AW_CLK_M, .clk.m = &pll_audio1_div5_clk },
{ .type = AW_CLK_M, .clk.m = &cpux_clk },
{ .type = AW_CLK_M, .clk.m = &cpux_axi_clk },
{ .type = AW_CLK_M, .clk.m = &cpux_apb_clk },
{ .type = AW_CLK_M, .clk.m = &de_clk },
{ .type = AW_CLK_M, .clk.m = &di_clk },
{ .type = AW_CLK_M, .clk.m = &g2d_clk },
{ .type = AW_CLK_M, .clk.m = &ve_clk },
{ .type = AW_CLK_M, .clk.m = &emac_25m_clk },