sys/arm/mv/a37x0_spi.c

120

if ((A37X0_SPI_READ(sc, reg) & mask) == 0)

sys/arm/mv/a37x0_spi.c

173

reg = A37X0_SPI_READ(sc, A37X0_SPI_CONTROL);

sys/arm/mv/a37x0_spi.c

177

reg = A37X0_SPI_READ(sc, A37X0_SPI_CONF);

sys/arm/mv/a37x0_spi.c

188

reg = A37X0_SPI_READ(sc, A37X0_SPI_CONF);

sys/arm/mv/a37x0_spi.c

197

reg = A37X0_SPI_READ(sc, A37X0_SPI_INTR_STAT);

sys/arm/mv/a37x0_spi.c

260

p[read] = A37X0_SPI_READ(sc, A37X0_SPI_DATA_IN) & 0xff;

sys/arm/mv/a37x0_spi.c

292

reg = A37X0_SPI_READ(sc, A37X0_SPI_CONF);

sys/arm/mv/a37x0_spi.c

304

reg = A37X0_SPI_READ(sc, A37X0_SPI_CONF);

sys/arm/mv/a37x0_spi.c

316

reg = A37X0_SPI_READ(sc, A37X0_SPI_CONF);

sys/arm/mv/a37x0_spi.c

351

status = A37X0_SPI_READ(sc, A37X0_SPI_INTR_STAT);

sys/arm/mv/a37x0_spi.c

428

reg = A37X0_SPI_READ(sc, A37X0_SPI_INTR_STAT);

sys/arm/mv/a37x0_spi.c

439

reg = A37X0_SPI_READ(sc, A37X0_SPI_CONTROL);

sys/arm/mv/a37x0_spi.c

450

reg = A37X0_SPI_READ(sc, A37X0_SPI_CONTROL);