A37X0_SPI_INTR_STAT
reg = A37X0_SPI_READ(sc, A37X0_SPI_INTR_STAT);
A37X0_SPI_WRITE(sc, A37X0_SPI_INTR_STAT, reg);
status = A37X0_SPI_READ(sc, A37X0_SPI_INTR_STAT);
A37X0_SPI_WRITE(sc, A37X0_SPI_INTR_STAT, status);
reg = A37X0_SPI_READ(sc, A37X0_SPI_INTR_STAT);
A37X0_SPI_WRITE(sc, A37X0_SPI_INTR_STAT, reg);