MLX5_SET64
MLX5_SET64(ipsec_obj, obj, modify_field_select,
MLX5_SET64(create_eq_in, in, event_bitmask, mask);
MLX5_SET64(wq, wq, dbr_addr, in->db_record);
MLX5_SET64(srqc, srqc, dbr_addr, in->db_record);
MLX5_SET64(nic_vport_context, nic_vport_context, node_guid, node_guid);
MLX5_SET64(nic_vport_context, nic_vport_context, port_guid, port_guid);
MLX5_SET64(sw_tls_cntx, ptls_tag->crypto_params,
MLX5_SET64(sw_tls_rx_cntx, ptag->crypto_params,
MLX5_SET64(sw_tls_rx_cntx, ctx, param.initial_record_number, tls_sn_he);
MLX5_SET64(wq, wq, dbr_addr, iq->wq_ctrl.db.dma);
MLX5_SET64(wq, wq, dbr_addr, rq->wq_ctrl.db.dma);
MLX5_SET64(wq, wq, dbr_addr, sq->wq_ctrl.db.dma);
MLX5_SET64(cqc, cqc, dbr_addr, cq->wq_ctrl.db.dma);
MLX5_SET64(modify_tir_in, in, modify_bitmask,
MLX5_SET64(modify_sq_in, in, modify_bitmask, 1);
MLX5_SET64(fpga_access_reg, in, address, addr);
MLX5_SET64(cqc, cqc, dbr_addr, conn->cq.wq_ctrl.db.dma);
MLX5_SET64(qpc, qpc, dbr_addr, conn->qp.wq_ctrl.db.dma);
MLX5_SET64(qpc, qpc, dbr_addr, conn->qp.wq_ctrl.db.dma);
MLX5_SET64(fpga_shell_qp_packet, header, address, trans->addr);
MLX5_SET64(cqc, cqc, dbr_addr, cq->db.dma);
MLX5_SET64(umem, umem, num_of_mtt, obj->ncont);
MLX5_SET64(mkc, mkc, start_addr, 0);
MLX5_SET64(mkc, mkc, start_addr, virt_addr);
MLX5_SET64(mkc, mkc, len, length);
MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr));
MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr));
MLX5_SET64(qpc, qpc, dbr_addr, qp->db.dma);
MLX5_SET64(modify_rq_in, in, modify_bitmask,
MLX5_SET64(wq, wq, dbr_addr, rwq->db.dma);
MLX5_SET64(cqc, cqc, dbr_addr, cq->wq_ctrl.db.dma);
MLX5_SET64(wq, wq, dbr_addr, sq->wq_ctrl.db.dma);