MASK
id.mantissa2 = ((vd.mantissa2 & MASK(3)) << 29) |
((vd.mantissa4 >> 3) & MASK(13));
vd.mantissa2 = ((id.mantissa1 & MASK(13)) << 3) |
cp = c_uid + (uid & MASK);
cp = c_gid + (gid & MASK);
id.mantissa2 = ((vd.mantissa2 & MASK(3)) << 29) |
((vd.mantissa4 >> 3) & MASK(13));
vd.mantissa2 = ((id.mantissa1 & MASK(13)) << 3) |
#define GETFRAC(bits, n) ((bits) & ~(MASK << (n)))
struct sockaddr_in *min = sintab[MASK];
if (which == MASK) {
if (sintab[ADDR]->sin_len != 0 && sintab[MASK]->sin_len == 0 && newaddr) {
afp->af_getprefix(addr, MASK);
if (which == MASK)
if (which != MASK)
if (which != MASK)
in6_getprefix(p + 1, MASK);
afp->af_getaddr(addr, MASK);
| INET MASK NUMBER {
| INET6 MASK NUMBER {
%token LIMITER ID RATE SOURCE ENTRIES ABOVE BELOW MASK NOMATCH
{ "mask", MASK},
#define SKEIN_T1_BLK_TYPE_MASK SKEIN_T1_BLK_TYPE(MASK) /* field bit mask */
if (field_type != MASK && value == 0) {
case MASK:
if ((node->symbol->type == MASK
process_field(MASK, $2, $3.value);
case MASK:
case MASK:
case MASK:
case MASK:
case MASK:
#define BHND_PCIE_DMA64_MASK _BHND_PCIE_DMA64(MASK) /**< PCIe-Gen1 DMA64 translation mask */
#define PCI_MASK_CONFIG(DEV,REG,MASK,SIZE) \
pci_write_config(DEV, REG, pci_read_config(DEV, REG, SIZE) MASK, SIZE)
#define PCI_MASK_CONFIG(DEV,REG,MASK,SIZE) \
pci_write_config(DEV, REG, pci_read_config(DEV, REG, SIZE) MASK, SIZE)
SCR_JUMP ^ IFFALSE (MASK (HF_DATA_IN, HF_DATA_IN)),
SCR_JUMP ^ IFTRUE (MASK (HF_DATA_IN, HF_DATA_IN)),
SCR_JUMP ^ IFFALSE (MASK (HF_DATA_IN, HF_DATA_IN)),
SCR_JUMP ^ IFTRUE (MASK (HF_DATA_IN, HF_DATA_IN)),
SCR_JUMP ^ IFTRUE (MASK (0x00, 0xf0)),
SCR_JUMP ^ IFTRUE (MASK (0x10, 0xf0)),
SCR_JUMP ^ IFFALSE (MASK (0x20, 0xf0)),
SCR_JUMPR ^ IFFALSE (MASK (WSR, WSR)),
SCR_INT ^ IFTRUE (MASK (SEM, SEM)),
SCR_JUMPR ^ IFFALSE (MASK (HF_HINT_IARB, HF_HINT_IARB)),
SCR_JUMPR ^ IFTRUE (MASK (IRST, IRST)),
SCR_JUMP ^ IFFALSE (MASK (WSR, WSR)),
SCR_JUMP ^ IFFALSE (MASK (WSS, WSS)),
SCR_JUMP ^ IFTRUE (MASK (0 ,(HF_SENSE|HF_EXT_ERR))),
SCR_JUMP ^ IFFALSE (MASK (SYM_QUIRK_AUTOSAVE, SYM_QUIRK_AUTOSAVE)),
SCR_JUMP ^ IFTRUE (MASK (0x80, 0xbf)),
SCR_INT ^ IFFALSE (MASK (0x80, 0x80)),
SCR_JUMP ^ IFFALSE (MASK (HF_DATA_IN, HF_DATA_IN)),
SCR_JUMP ^ IFTRUE (MASK (HF_DATA_IN, HF_DATA_IN)),
SCR_JUMP ^ IFFALSE (MASK (HF_DATA_IN, HF_DATA_IN)),
SCR_JUMP ^ IFTRUE (MASK (HF_DATA_IN, HF_DATA_IN)),
SCR_JUMP ^ IFTRUE (MASK (0x00, 0xf0)),
SCR_JUMP ^ IFTRUE (MASK (0x10, 0xf0)),
SCR_JUMP ^ IFFALSE (MASK (0x20, 0xf0)),
SCR_JUMPR ^ IFFALSE (MASK (WSR, WSR)),
SCR_JUMP ^ IFTRUE (MASK (0, (HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED))),
SCR_JUMPR ^ IFFALSE (MASK (HF_DP_SAVED, HF_DP_SAVED)),
SCR_JUMP ^ IFTRUE (MASK (0, (HF_IN_PM0 | HF_IN_PM1))),
SCR_JUMPR ^ IFFALSE (MASK (HF_IN_PM0, HF_IN_PM0)),
SCR_JUMP ^ IFTRUE (MASK (HF_ACT_PM, HF_ACT_PM)),
SCR_CALL ^ IFTRUE (MASK (WSR, WSR)),
SCR_CALL ^ IFTRUE (MASK (WSR, WSR)),
SCR_INT ^ IFTRUE (MASK (SEM, SEM)),
SCR_JUMPR ^ IFFALSE (MASK (HF_HINT_IARB, HF_HINT_IARB)),
SCR_JUMPR ^ IFTRUE (MASK (IRST, IRST)),
SCR_JUMP ^ IFFALSE (MASK (WSR, WSR)),
SCR_JUMP ^ IFFALSE (MASK (WSS, WSS)),
SCR_JUMPR ^ IFTRUE (MASK (0 ,(HF_SENSE|HF_EXT_ERR))),
SCR_JUMP ^ IFFALSE (MASK (SYM_QUIRK_AUTOSAVE, SYM_QUIRK_AUTOSAVE)),
SCR_JUMP ^ IFTRUE (MASK (0x80, 0xbf)),
SCR_INT ^ IFFALSE (MASK (0x80, 0x80)),
mask = MASK(s->cmp_num_entries_log2);
mask = MASK(s->msg_num_entries_log2);
e = ring + (s->req_prod_idx & MASK(req_num_entries_log2));
#define PVSCSI_INTR_CMPL_MASK MASK(2)
#define PVSCSI_INTR_MSG_MASK (MASK(2) << 2)
#define PVSCSI_INTR_ALL_SUPPORTED MASK(4)
#define PVSCSI_FLAG_RESERVED_MASK (~MASK(5))
entry->protection & MASK(entry));
{ 180, "Channels supported for this country", MASK },
{ 193, "Supported transmission rates", MASK },
{ 195, "Supported basic transmission rates", MASK },
nr1 = deck[n1]&MASK;
nr2 = deck[nr1]&MASK;
i = t2[(t3[(t1[(i+nr1)&MASK]+nr2)&MASK]-nr2)&MASK]-nr1;
ic = (rnd&MASK)%(k+1);
ic = (rnd&MASK)%(k+1);
ic = (rnd&MASK) % k;
t2[t1[i]&MASK] = i;