sys/arm/freescale/imx/imx6_audmux.c

52

#define READ4(_sc, _reg) \

sys/arm/freescale/imx/imx6_sdma.c

62

#define READ4(_sc, _reg) \

sys/arm/freescale/imx/imx6_ssi.c

59

#define READ4(_sc, _reg) \

sys/arm/freescale/imx/imx_gpio.c

73

#define READ4(_sc, _r) \

sys/arm/freescale/imx/imx_gpt.c

52

#define READ4(_sc, _r) \

sys/arm/freescale/vybrid/vf_common.h

29

#define READ4(_sc, _reg) \

sys/arm/ti/clk/ti_clk_clkctrl.c

72

#define READ4(_clk, off, val) \

sys/arm/ti/clk/ti_clk_dpll.c

64

#define READ4(_clk, off, val) \

sys/arm64/freescale/imx/clk/imx_clk_composite.c

58

#define READ4(_clk, off, val) \

sys/arm64/freescale/imx/clk/imx_clk_frac_pll.c

44

#define READ4(_clk, off, val) \

sys/arm64/freescale/imx/clk/imx_clk_sscg_pll.c

44

#define READ4(_clk, off, val) \

sys/dev/agp/agp_amd.c

56

#define READ4(off) bus_space_read_4(sc->bst, sc->bsh, off)

sys/dev/agp/agp_ati.c

57

#define READ4(off) bus_space_read_4(sc->bst, sc->bsh, off)

sys/dev/clk/allwinner/aw_clk_frac.c

69

#define READ4(_clk, off, val) \

sys/dev/clk/allwinner/aw_clk_m.c

61

#define READ4(_clk, off, val) \

sys/dev/clk/allwinner/aw_clk_mipi.c

67

#define READ4(_clk, off, val) \

sys/dev/clk/allwinner/aw_clk_nkmp.c

64

#define READ4(_clk, off, val) \

sys/dev/clk/allwinner/aw_clk_nm.c

62

#define READ4(_clk, off, val) \

sys/dev/clk/allwinner/aw_clk_nmm.c

62

#define READ4(_clk, off, val) \

sys/dev/clk/allwinner/aw_clk_np.c

61

#define READ4(_clk, off, val) \

sys/dev/clk/allwinner/aw_clk_prediv_mux.c

60

#define READ4(_clk, off, val) \

sys/dev/clk/rockchip/rk_clk_armclk.c

62

#define READ4(_clk, off, val) \

sys/dev/clk/rockchip/rk_clk_composite.c

57

#define READ4(_clk, off, val) \

sys/dev/clk/rockchip/rk_clk_pll.c

55

#define READ4(_clk, off, val) \

sys/dev/clk/starfive/jh7110_clk.c

45

#define READ4(_sc, _off) \

sys/dev/dwc/if_dwcvar.h

118

#define READ4(_sc, _reg) \

sys/dev/flash/cqspi.c

80

#define READ4(_sc, _reg) bus_read_4((_sc)->res[0], _reg)

sys/dev/gpio/dwgpio/dwgpio.c

64

#define READ4(_sc, _reg) DWGPIO_READ((_sc)->parent, _reg)

sys/dev/mmc/host/dwmmc.c

88

#define READ4(_sc, _reg) \

sys/dev/rtsx/rtsx.c

318

#define READ4(sc, reg) \

sys/dev/xdma/controller/pl330.c

75

#define READ4(_sc, _reg) \

sys/dev/xilinx/axi_quad_spi.c

64

#define READ4(_sc, _reg) \