#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <sys/module.h>
#include <sys/bus.h>
#include <sys/rman.h>
#include <sys/thread2.h>
#include <bus/pci/pcireg.h>
#include <bus/pci/pcivar.h>
#include <bus/cam/scsi/scsi_all.h>
#include "dpt.h"
#define DPT_VENDOR_ID 0x1044
#define DPT_DEVICE_ID 0xa400
#define DPT_PCI_IOADDR PCIR_MAPS
#define DPT_PCI_MEMADDR (PCIR_MAPS + 4)
#define ISA_PRIMARY_WD_ADDRESS 0x1f8
static int dpt_pci_probe (device_t);
static int dpt_pci_attach (device_t);
static int
dpt_pci_probe (device_t dev)
{
if ((pci_get_vendor(dev) == DPT_VENDOR_ID) &&
(pci_get_device(dev) == DPT_DEVICE_ID)) {
device_set_desc(dev, "DPT Caching SCSI RAID Controller");
return (0);
}
return (ENXIO);
}
static int
dpt_pci_attach (device_t dev)
{
dpt_softc_t * dpt;
struct resource *io = NULL;
struct resource *irq = NULL;
int rid;
void * ih;
int error = 0;
int iotype = 0;
u_int32_t command;
command = pci_read_config(dev, PCIR_COMMAND, 1);
#ifdef DPT_ALLOW_MMIO
if ((command & PCIM_CMD_MEMEN) != 0) {
rid = DPT_PCI_MEMADDR;
iotype = SYS_RES_MEMORY;
io = bus_alloc_resource(dev, iotype, &rid, 0, ~0, 1, RF_ACTIVE);
}
#endif
if (io == NULL && (command & PCIM_CMD_PORTEN) != 0) {
rid = DPT_PCI_IOADDR;
iotype = SYS_RES_IOPORT;
io = bus_alloc_resource(dev, iotype, &rid, 0, ~0, 1, RF_ACTIVE);
}
if (io == NULL) {
device_printf(dev, "can't allocate register resources\n");
error = ENOMEM;
goto bad;
}
rid = 0;
irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1,
RF_ACTIVE | RF_SHAREABLE);
if (!irq) {
device_printf(dev, "No irq?!\n");
error = ENOMEM;
goto bad;
}
command |= PCIM_CMD_BUSMASTEREN;
pci_write_config(dev, PCIR_COMMAND, command, 1);
if (rman_get_start(io) == (ISA_PRIMARY_WD_ADDRESS - 0x10)) {
#ifdef DPT_DEBUG_WARN
device_printf(dev, "Mapped as an IDE controller. "
"Disabling SCSI setup\n");
#endif
error = ENXIO;
goto bad;
}
dpt = dpt_alloc(dev, rman_get_bustag(io), rman_get_bushandle(io) + 0x10);
if (dpt == NULL) {
error = ENXIO;
goto bad;
}
if (bus_dma_tag_create( NULL,
1,
0,
BUS_SPACE_MAXADDR_32BIT,
BUS_SPACE_MAXADDR,
BUS_SPACE_MAXSIZE_32BIT,
BUS_SPACE_UNRESTRICTED,
BUS_SPACE_MAXSIZE_32BIT,
0,
&dpt->parent_dmat) != 0) {
dpt_free(dpt);
error = ENXIO;
goto bad;
}
crit_enter();
if (dpt_init(dpt) != 0) {
dpt_free(dpt);
error = ENXIO;
crit_exit();
goto bad;
}
dpt_attach(dpt);
crit_exit();
error = bus_setup_intr(dev, irq, 0, dpt_intr, dpt,
&ih, NULL);
if (error) {
device_printf(dev, "Unable to register interrupt handler\n");
error = ENXIO;
goto bad;
}
return (error);
bad:
if (io)
bus_release_resource(dev, iotype, 0, io);
if (irq)
bus_release_resource(dev, SYS_RES_IRQ, 0, irq);
return (error);
}
static device_method_t dpt_pci_methods[] = {
DEVMETHOD(device_probe, dpt_pci_probe),
DEVMETHOD(device_attach, dpt_pci_attach),
DEVMETHOD_END
};
static driver_t dpt_pci_driver = {
"dpt",
dpt_pci_methods,
sizeof(dpt_softc_t),
};
static devclass_t dpt_devclass;
DRIVER_MODULE(dpt, pci, dpt_pci_driver, dpt_devclass, NULL, NULL);